Revision 4e2474d6

b/target-mips/translate.c
1124 1124
                          int base, int16_t offset)
1125 1125
{
1126 1126
    const char *opn = "flt_ldst";
1127
    TCGv t0 = tcg_temp_local_new();
1127
    TCGv t0 = tcg_temp_new();
1128 1128

  
1129 1129
    if (base == 0) {
1130 1130
        tcg_gen_movi_tl(t0, offset);
......
7152 7152
{
7153 7153
    const char *opn = "extended float load/store";
7154 7154
    int store = 0;
7155
    TCGv t0 = tcg_temp_local_new();
7156
    TCGv t1 = tcg_temp_local_new();
7155
    TCGv t0 = tcg_temp_new();
7156
    TCGv t1 = tcg_temp_new();
7157 7157

  
7158 7158
    if (base == 0) {
7159 7159
        gen_load_gpr(t0, index);
......
7165 7165
    }
7166 7166
    /* Don't do NOP if destination is zero: we must perform the actual
7167 7167
       memory access. */
7168
    save_cpu_state(ctx, 0);
7168 7169
    switch (opc) {
7169 7170
    case OPC_LWXC1:
7170 7171
        check_cop1x(ctx);
......
7241 7242
        opn = "suxc1";
7242 7243
        store = 1;
7243 7244
        break;
7244
    default:
7245
        MIPS_INVAL(opn);
7246
        generate_exception(ctx, EXCP_RI);
7247
        tcg_temp_free(t0);
7248
        tcg_temp_free(t1);
7249
        return;
7250 7245
    }
7251 7246
    tcg_temp_free(t0);
7252 7247
    tcg_temp_free(t1);

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