Archipelago » qemu

    int irq;

    uint8_t config;

    uint8_t aux1, aux2;

} MiscState;

#define MISC_MAXADDR 1

{

    MiscState *s = opaque;

    s->config = s->aux1 = s->aux2 = s->mctrl = 0;

}

	break;

    case 0x1f00000:

	MISC_DPRINTF("Write system control %2.2x\n", val & 0xff);

	    qemu_system_reset_request();

	break;

    case 0xa000000:

	MISC_DPRINTF("Write power management %2.2x\n", val & 0xff);

	break;

    case 0x1f00000:

	MISC_DPRINTF("Read system control %2.2x\n", ret);

	break;

    case 0xa000000:

	MISC_DPRINTF("Read power management %2.2x\n", ret);

    qemu_put_8s(f, &s->aux2);

    qemu_put_8s(f, &s->diag);

    qemu_put_8s(f, &s->mctrl);

}

static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)

    qemu_get_8s(f, &s->aux2);

    qemu_get_8s(f, &s->diag);

    qemu_get_8s(f, &s->mctrl);

    return 0;

}