qdev: Introduce lost tick policy property
Potentially tick-generating timer devices will gain a common property:lock_tick_policy. It allows to encode 4 different ways how to deal withtick events the guest did not process in time:
discard - ignore lost ticks (e.g. if the guest compensates for them...
m48t59: use rtc_clock for alarm timer
This lets the RTC get adjustments from the host NTP client.The watchdog still uses the vm_clock. The previous behavior isavailable with "-rtc clock=vm".
Cc: Andreas Färber <afaerber@suse.de>Reviewed-by: Andreas Färber <afaerber@suse.de>...
GRLIB UART: Add RX channel
This patch implements the RX channel of GRLIB UART with a FIFO toimprove data rate.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
unin_pci: Fix typos in device names
Commit 999e12bbe85c5dcf49bef13bce4f97399c7105f4 (sysbus: apic: ioapic:convert to QEMU Object Model) introduced two typos, one of which brokethe mac99 machine.
Signed-off-by: Andreas Färber <afaerber@suse.de>Cc: Anthony Liguori <aliguori@us.ibm.com>...
virtio-s390: convert to QEMU Object Model
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
qdev: change ambiguous qdev names
Reported-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
unin_pci: Drop unused reset handler
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
pci: convert to QEMU Object Model
sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.Converting subclasses independently of their base class is prohibitively hard.
ide: convert to QEMU Object Model
scsi: convert to QEMU Object Model
spapr: convert to QEMU Object Model (v2)
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>---v1 -> v2 - use QOM to check for the default console
virtio-serial: convert to QEMU Object Model
unin_pci: Clean up qdev names
Add -pcihost to SysBus devices to resolve name conflicts,and clarify PCI vs. Internal PCI.
unin_pci: Drop duplicate busdev
PCIHostState already has a busdev.
hda-codec: convert to QEMU Object Model
qdev: prepare source tree for code conversion
These are various small stylistic changes which help make things moreconsistent such that the automated conversion script can be simpler.
It's not necessary to agree or disagree with these style changes because all...
isa: pic: convert to QEMU Object Model
This converts two devices at once because PIC subclasses ISA and convertingsubclasses independently is extremely hard.
usb: convert to QEMU Object Model
ccid: convert to QEMU Object Model
ssi: convert to QEMU Object Model
i2c: rename i2c_slave -> I2CSlave
i2c: smbus: convert to QEMU Object Model
This converts two types because smbus is implemented as a subclass of i2c. It'sextremely difficult to convert these two independently.
qdev: use a wrapper to access reset and promote reset to a class method
qdev: add a interface to register subclasses
In order to introduce inheritance while still using the qdev registrationinterfaces, we need to be able to use a parent other than TYPE_DEVICE. Add anew interface that allows this.
qdev: add class_init to DeviceInfo
Since we are still dynamically creating TypeInfo, we need to chain theclass_init function in order to be able to make use of it within subclasses ofTYPE_DEVICE.
This will disappear once we register TypeInfos directly....
qdev: don't access name through info
We already have a QOM interface for this so let's use it.
qdev: move qdev->info to class
Right now, DeviceInfo acts as the class for qdev. In order to switch to aproper ObjectClass derivative, we need to ween all of the callers off ofinteracting directly with the info pointer.
macio: convert to qdev
This is a "shallow", half hearted, and untested conversion.
openpic: remove dead code to make a PCI device version
bus is always NULL so the code in this if clause is dead (and thereforeuntested).
pci: call reset unconditionally
Because now all PCI devices are converted to qdev.
qdev: integrate with QEMU Object Model (v2)
This is a very shallow integration. We register a TYPE_DEVICE but only useQOM as basically a memory allocator. This will make all devices show up asQOM objects but they will all carry the TYPE_DEVICE.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into staging
Merge remote-tracking branch 'kwolf/for-anthony' into staging
pcnet: Preserve link state across device reset
A device reset does not affect the link state, only set_link does.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
e1000: Preserve link state across device reset
qdev-property: Make bit property parsing stricter
By using strncasecmp, we allow for arbitrary characters after the"on"/"off" string. Fix this by switching to strcasecmp.
Reviewed-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Markus Armbruster <armbru@redhat.com>...
virtio-blk: add virtio_blk_handle_read trace event
There already exists a virtio_blk_handle_write trace event as well ascompletion events. Add the virtio_blk_handle_read event so it's easy totrace virtio-blk requests for both read and write operations....
scsi: Guard against buflen exceeding req->cmd.xfer in scsi_disk_emulate_command
Limit the return value (corresponding to the length of the buffer to beDMAed back to the intiator) to the value in req->cmd.xfer, which is theamount of data that the initiator expects. Eliminate now-duplicate code...
arm_boot: support board IDs more than 16 bits wide
Support passing a board ID value to the kernel in r1that is more than 16 bits wide. This is needed to passthe '-1 == invalid' value for boards which only supportdevice tree booting.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
arm: SoC model for Calxeda Highbank
Adds support for Calxeda's Highbank SoC.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
arm: add secondary cpu boot callbacks to arm_boot.c
Create two functions, write_secondary_boot() and secondary_cpu_reset_hook(),to allow platforms more control of how secondary CPUs are brought up. Thenew functions default to NULL and aren't called unless they are populated...
Add xgmac ethernet model
This adds very basic support for the xgmac ethernet core. Missing thingsinclude:
- statistics counters- WoL support- rx checksum offload- chained descriptors (only linear descriptor ring)- broadcast and multicast handling
Signed-off-by: Rob Herring <rob.herring@calxeda.com>...
ahci: add support for non-PCI based controllers
Add support for ahci on sysbus.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
vga: compile cirrus_vga in hwlib
Remove target dependencies and compile Cirrus VGA in hwlib.
Address masking can be removed since memory API handles that now.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
memory: change dirty setting APIs to take a size
Instead of each target knowing or guessing the guest page size,just pass the desired size of dirtied memory area.
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
Merge remote-tracking branch 'afaerber/prep-up' into staging
e1000: bounds packet size against buffer size
Otherwise we can write beyond the buffer and corrupt memory. This is trackedas CVE-2012-0029.
sga: fix copypasta
Fix the name of the init function.
Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
vga: make Cirrus ISA device optional
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
vga: improve VGA logic
Improve VGA selection logic, push check for device availabilty to vl.c.Create the devices at board level unconditionally.
Remove now unused pci_try_create*() functions.
Make PCI VGA devices optional.
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>...
grackle_pci: Clean up qdev names
Rename SysBus device from 'grackle' to 'grackle-pcihost' to resolve aname conflict.
Also mark both devices as no_user.
Signed-off-by: Andreas Färber <afaerber@suse.de>Cc: Alexander Graf <agraf@suse.de>Cc: Anthony Liguori <aliguori@us.ibm.com>...
pseries: Support PCI extended config space in RTAS calls
On the pseries machine (which expexts a paravirtualized guest), guestaccess to PCI config space is via host-provided RTAS functions. Thispatch extends these RTAS functions to permit access to PCI extended...
pseries: Use correct dispatcher for PCI config space accesses
The pseries machine expects a para-virtualized guest and so supplies RTASfunctions (via a hypercall) for performing PCI config space access.Currently the implementation of these calls intopci_default_{read,write}_config(). However this would be incorrect for...
pseries: SLOF PCI flag day
Currently on the pseries machine the SLOF firmware is used normally,but we bypass it when -kernel is specified. Having these two
different boot paths can cause some confusion.
In particular at present we need to "probe" the (emulated) PCI bus and...
PPC: Pseries: Check for PCI boundaries
We call pci_host_config_{read,write}_common() which perform PCI configaccesses. However they don't do all limit checking the way we expectit to.
So let's introduce a small wrapper around them, making them behave the...
PPC: 4xx: Qdevify the 440 PCI host controller
Due to popular demand, this qdevifies the PCI host controller of 4xx SoCsthe same way as e500.
We have to introduce a small stub function for pci init that will beremoved in a later patch, once we qdev'ified the board, to keep the build...
PPC: Bamboo: fold ppc440.c and ppc440_bamboo.c into a single file
The separation of ppc440 and ppc440_bamboo makes some sense, since ppc440is the SoC while ppc440_bamboo is the actual board. But the separationmakes things harder for us for no good reason, so let's just fold them...
PPC: Bamboo: Integrate SoC instatiation, use qdev for PCI
Now that we have the SoC init function in the same file, let's integrateit with the board initialization.
While at it, also make use of the newly qdev'ified PCI host controller.
Signed-off-by: Alexander Graf <agraf@suse.de>
virtio-pci: Fix endianness of virtio config
The virtio config area in PIO space is a bit special. The initialheader is little endian but the rest (device specific) is guestnative endian.
The PIO accessors for PCI on machines that don't have native IO ports...
virtio: change memcpy to guest reads
When accessing the device specific virtio config space, we memcpythe data into a variable in QEMU. At that point we're basicallypulling host endianness into the game which is a really bad idea.
So instead, let's use the target specific load/store helpers for...
load_image_targphys() should enforce the max size
load_image_targphys() gets passed a max size for the file, but doesn'tenforce it at all. Add a check and return -1 (error) if the file istoo big, without loading it. Fix the bracing style in the function...
Correct types in bmdma_addr_{read,write}
Back when I made patches introducing dma_addr_t and various PCI DMAwrapper functions, I made a mistake. The bmdma_addr_{read,write} functionsneed to take target_phys_addr_t not dma_addr_t, since they are assigned...
PPC: Bamboo: Set initial TLB entry
Back in the day when the bamboo target got introduced, the initial TLB wasdictated by KVM. TCG has been missing initial TLB values ever since, renderingthe target unusable for TCG usage.
This patch adds linear TLB maps the way Linux expects them, making the target...
PPC: 440: Ignore invalid PCI IRQs
When running a 440 target, we currently get invalid irq_num values (-1)which completely confuse the IRQ setting code.
This is most likely due to the missing qdev conversion.
While this shouldn't happen in the first place and should really rather...
PPC: 440: Default to 440EP CPU
Today we're exposing a Virtex 440 CPU to the guest despite the factthat we're telling the guest that we're running on a 440EP one in thedevice tree.
So let's better default to a real 440EP to make things synced again.
PPC: bamboo: remove old machine descriptions
Nobody needs to run bamboo in 0.12 compat mode. Remove the machine.
PPC: bamboo: fix whitespace
Tabs followed by spaces are a no-go. My editor shows it red, distractingme from actual work! :)
PPC: 440EP: Initialize timer
When using TCG with a BookE PowerPC core, we need to explicitly initializethe BookE timers with the correct frequencies.
This was missing for 440EP, since that code came from KVM and was never usedwith TCG.
PPC: Bamboo: Register CPU reset
To be able to support CPU reset, we need to put all register initializationand initial state into a CPU reset hook instead of a function that is onlycalled once on bootup.
This is a preparation step for the initial TLB setting code and brings bamboo...
prep: Use i82378 PCI->ISA bridge for 'prep' machine
Speaker I/O, ISA bus, i8259 PIC, RTC and DMA are no longer set upindividually by the machine. Effectively, no-op speaker I/O is replacedby pcspk; PIT and i82374 DMA are introduced.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>...
prep: Fix offset of BIOS MemoryRegion
Since 0c90c52fab5ea92d7f12b29bfe26a7cd75d9efcb (ppc_prep: convert to memoryAPI) OHW was "Trying to execute code outside RAM or ROM at 0xfff00700".
The BIOS MemoryRegion is created with a fixed size of 1 MiB.Ensure that the full size can be accessed since the exception...
prep: Use ISA m48t59
This simplifies the code later when the i8259 moves to the i82378PCI->ISA bridge and happens to fix a SysBus m48t59 io_base issueintroduced by commit 0fb56ffc5edd66f12ccfc0d71af5f9c79c0a2612 (m48t59:drop obsolete address base arithmetic). Suggested by Hervé and Jan....
prep: qdev'ify Raven host bridge (PCIDevice)
Move initialization of vendor ID, etc. to PCIDeviceInfo.Introduce VMState.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>Reviewed-by: Alexander Graf <agraf@suse.de>Cc: Hervé Poussineau <hpoussin@reactos.org>...
prep_pci: Simplify I/O endianness
The prep PowerPC CPU is Big Endian. An explicit byte swap thereforeeffectively becomes Little Endian.
Remove explicit byte swaps and mark as Little Endian.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>Reviewed-by: Alexander Graf <agraf@suse.de>...
prep_pci: Update I/O to MemoryRegion ops
Convert to new-style read/write callbacks.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>Cc: Alexander Graf <agraf@suse.de>Cc: Michael S. Tsirkin <mst@redhat.com>Cc: Avi Kivity <avi@redhat.com>Cc: Benoît Canet <benoit.canet@gmail.com>
prep: qdev'ify Raven host bridge (SysBus)
Drop pci_prep_init() in favor of extended device state. Inspired bypatches from Hervé and Alex.
Assign the 4 IRQs from the board after device instantiation. This movesthe knowledge out of prep_pci and allows for future machines with...
prep: Add i82374 DMA emulation
Prepare Intel 82374 emulation for use by Intel 82378 PCI->ISA bridge.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Confine to CONFIG_I82374. Add VMState.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>Reviewed-by: Alexander Graf <agraf@suse.de>
prep: Add i82378 PCI-to-ISA bridge emulation
Prepare Intel 82378 emulation for use by PReP platforms.
Create ISA bus in this device (suggested by Markus).Rebase onto Memory API, mark memory ops as Little Endian....
Merge remote-tracking branch 'spice/spice.v47' into staging
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Merge remote-tracking branch 'kraxel/usb.37' into staging
kvm: x86: Establish IRQ0 override control
KVM is forced to disable the IRQ0 override when we run with in-kernelirqchip but without IRQ routing support of the kernel. Set the fwcfgvalue correspondingly. This aligns us with qemu-kvm.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
kvm: x86: Add user space part for in-kernel APIC
This introduces the alternative APIC device which makes use of KVM'sin-kernel device model. External NMI injection via LINT1 is emulated bychecking the current state of the in-kernel APIC, only injecting a NMI...
kvm: x86: Add user space part for in-kernel i8259
Introduce the alternative 'kvm-i8259' device model that exploits KVMin-kernel acceleration.
The PIIX3 initialization code is furthermore extended by KVM specificIRQ route setup. GSI injection differs in KVM mode from the user space...
kvm: x86: Add user space part for in-kernel IOAPIC
This introduces the KVM-accelerated IOAPIC model 'kvm-ioapic' andextends the IRQ routing setup by the 0->2 redirection when needed.
The kvm-ioapic model has a property that allows to define its GSI base...
ioapic: Drop post-load irr initialization
As all devices undergo a reset prior to vmloa, and the reset value ofirr is 0, we do not need to do this clearing for older vmstatesexplicitly. Dropping this redundant code will also make KVM integrationa bit simpler....
ioapic: Factor out base class for KVM reuse
Split up the IOAPIC analogously to APIC and i8259. KVM will share theIOAPICCommonState, the vmstate, reset logic and certain init parts withthe user space model.
apic: Inject external NMI events via LINT1
On real hardware, NMI button events are injected via the LINT1 line ofthe APICs. E.g. kdump expect this wiring and gets upset if the per-APICLINT1 mask is not respected, i.e. if NMIs are injected to VCPUs that...
apic: Introduce apic_report_irq_delivered
The in-kernel i8259 and IOAPIC backends for KVM will need this, soencapsulate the shared bits.
apic: Factor out base class for KVM reuse
The KVM in-kernel APIC model will reuse parts of the user space modelwhile providing the same frontend view to guest and most managementinterfaces.
Factor out an APIC base class to encapsulate those parts that will be...
apic: Open-code timer save/restore
To enable migration between accelerated and non-accelerated APIC models,we will need to handle the timer saving and restoring specially and canno longer rely on the automatics of VMSTATE_TIMER. Specifically,accelerated model will not start any QEMUTimer....
i8259: Completely privatize PicState
Use DeviceState instead of PicState in the public i8259 API. This iscleaner and allows to reorganize the PIC data structures for KVM reuse.
i8259: Factor out base class for KVM reuse
Analogously to the APIC, we will reuse some parts of the user spacei8259 model for KVM. The base class provides a common device state, thevmstate, the property list, a reset core and some shared init bits.
This also introduces a common helper to instantiate a single i8259 chip...
msi: Generalize msix_supported to msi_supported
Rename msix_supported to msi_supported and control MSI and MSI-Xactivation this way. That was likely to original intention for thisflag, but MSI support came after MSI-X.
kvm: Move kvmclock into hw/kvm folder
More KVM-specific devices will come, so let's start with moving thekvmclock into a dedicated folder.
apic: Stop timer on reset
All LVTs are masked on reset, so the timer becomes ineffective. Lettingit tick nevertheless is harmless, but will at least create a spurioustrace event.
lm32: Fix mixup of uint32 and uint32_t
Commit d23948b15a9920fb7f6374b55a6db1ecff81f3ee (lm32: add MilkymistVGAFB support) introduced a stray usage of the softfloat uint32 type.
Use uint32_t instead.
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Michael Walle <michael@walle.cc>...