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root / target-sparc @ 4f690853

# Date Author Comment
4f690853 01/27/2010 07:47 pm Igor V. Kovalenko

sparc64: correct write extra bits to cwp

- correctly fit to cwp if provided window number is out of range

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

15e7c451 01/23/2010 10:11 am Artyom Tarasenko

sparc32 fix np dereference in do_unassigned_access

fix a potential null pointer dereference introduced in
commit 576c2cdc767ab9e2dc038fa4c99f22e53287a3de

Signed-off-by: Artyom Tarasenko <>
Signed-off-by: Blue Swirl <>

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

43bb98bf 01/17/2010 06:51 pm Blue Swirl

Sparc: improve CPU register dump

Common: * Remove unnecessary 0x prefix * Print %y * Fix NZVC flag print order to match CPU bit order

Sparc64 specific: * Print registers without line wrapping * Print %f40-%f63 * Pretty print CCR flags * Print %fsr and %fprs in full precision...

576c2cdc 01/15/2010 11:33 pm Artyom Tarasenko

sparc32 do_unassigned_access overhaul v2

According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller
User's Manual":

1. "A lower priority fault may not overwrite the
MFSR status of a higher priority fault."
2. The MFAR is overwritten according to the policy defined for the MFSR...

701eed4b 01/13/2010 08:49 pm Blue Swirl

Sparc32: remove unused variable, spotted by clang

Signed-off-by: Blue Swirl <>

d532b26c 01/08/2010 07:25 pm Igor V. Kovalenko

sparc64: interrupt trap handling

- handle SOFTINT register TICK and STICK timer bits
- only check interrupt levels greater than PIL value
- handle preemption by higher level traps

- handle CPU_INTERRUPT_HARD only if interrupts are enabled...

2df6c2d0 01/08/2010 07:16 pm Igor V. Kovalenko

sparc64: move cpu_interrupts_enabled to cpu.h

- to be used by cpu_check_irqs

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

709f2c1b 01/08/2010 07:15 pm Igor V. Kovalenko

sparc64: add macros to deal with softint and timer interrupt

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

4dc28134 01/08/2010 07:15 pm Igor V. Kovalenko

sparc64: check for pending irq when pil, pstate or softint is changed

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

1fae7b70 01/08/2010 07:14 pm Igor V. Kovalenko

sparc64: use helper_wrpil to check pending irq on write

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

68e8a3f0 01/08/2010 07:13 pm Igor V. Kovalenko

sparc64: add PIL to cpu state dump

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

7e8695ed 01/08/2010 07:12 pm Igor V. Kovalenko

sparc64: trace pstate and global register set changes

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

d780a466 01/08/2010 07:12 pm Igor V. Kovalenko

sparc64: change_pstate should have 32bit argument

- pstate is 32bit variable, no need to pass 64bit value around

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

95372a39 01/07/2010 10:02 pm Blue Swirl

Sparc32: clear exception_index with -1 value

See also 821b19fe923ac49a24cdb4af902584fdd019cee6.

Spotted by Artyom Tarasenko and Igor Kovalenko.

Signed-off-by: Blue Swirl <>

821b19fe 01/06/2010 07:35 pm Igor V. Kovalenko

sparc64: clear exception_index with -1 value

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

dffbe217 01/03/2010 02:19 pm Igor V. Kovalenko

pass env to raise_exception if called outside of op_helper code

- this fixes stepping with gdb, where do_unassigned_access
may be called from gdb handler, outside of generated code

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

87f6d3f6 01/03/2010 02:16 pm Igor V. Kovalenko

sparc64: switch to MMU global registers in more MMU related traps

- extended range of MMU related traps which use MMU global registers,
as listed in Ultrasparc-IIi document
- no visible changes, since emulation do not cause added traps

Signed-off-by: Igor V. Kovalenko <>...

2a90358f 12/05/2009 01:14 pm Blue Swirl

Sparc64: handle MMU global bit and nucleus context

Signed-off-by: Blue Swirl <>

31a68d57 12/04/2009 06:16 pm Blue Swirl

Sparc64: fix compilation with DEBUG_MMU

Signed-off-by: Blue Swirl <>

b55a37c9 11/07/2009 12:37 pm Blue Swirl

user: move CPU reset call to main.c for x86/PPC/Sparc

Signed-off-by: Blue Swirl <>

a01d6ef4 11/07/2009 10:55 am Blue Swirl

sparc32 (mostly): remove unneeded calls to device reset

Signed-off-by: Blue Swirl <>

3e6ba503 11/04/2009 09:38 pm Artyom Tarasenko

Sparc: fix carry flag handling (Solaris bootblk fix)

The page 108 of the SPARC Version 8 Architecture Manual describes
that addcc and addxcc shall compute carry flag the same way.
The page 110 claims the same about subcc and subxcc instructions.
This patch fixes carry computation in corner cases and removes redundant code....

3723cd09 10/13/2009 07:48 pm Igor V. Kovalenko

sparc64: fix done instruction pc

Fix done instruction to resume with pc=tnpc, npc=tnpc+4

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

c227f099 10/02/2009 12:12 am Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem. Something
like this must be presented on the list first so people can provide input...

99a0949b 10/01/2009 09:45 pm malc

Get rid of _t suffix

Some not so obvious bits, slirp and Xen were left alone for the time

Signed-off-by: malc <>

01b5d4e5 09/23/2009 11:00 pm Igor V. Kovalenko


Sparc64 alternate space load/store helpers expect 8 bit ASI value,
while wrasi implementation sign-extends ASI operand causing
for example 0x80 to appear as 0xFFFFFF80. Resulting value falls
out of switch in helpers and causes obscure load/store faults....

72cf2d4f 09/12/2009 10:36 am Blue Swirl

Fix sys-queue.h conflict for good

Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...

0b5c1ce8 08/24/2009 04:21 pm Nathan Froyd

cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal

handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations. This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets...

4c6aa085 08/22/2009 02:54 pm Blue Swirl

sparc32 remove an unnecessary cpu irq set

Signed-off-by: Artyom Tarasenko <>
Signed-off-by: Blue Swirl <>

c27e2752 08/22/2009 02:46 pm Blue Swirl

Sparc32/64: fix jmpl followed by branch

Fix a case where 'jmpl' instruction followed by a branch instruction was
handled incorrectly.

Signed-off-by: Blue Swirl <>

6b743278 08/18/2009 09:04 pm Blue Swirl

Sparc32/64: Fix user emulator breakage

Signed-off-by: Blue Swirl <>

cfa90513 08/15/2009 07:52 pm Blue Swirl

Fix desynchronization of condition code state when a memory access traps

Signed-off-by: Blue Swirl <>

8194f35a 08/04/2009 11:22 pm Igor Kovalenko

Sparc64: replace tsptr with helper routine

tl and tsptr of members sparc64 cpu state must be changed
simultaneously to keep trap state window in sync with current
trap level. Currently translation of store to tl does not change
tsptr, which leads to corrupt trap state on corresponding...

14ed7adc 07/31/2009 09:48 am Igor Kovalenko

sparc64 flush pending conditional evaluations before exposing cpu state

If translation block is interrupted by e.g. mmu exception
we need to compute conditional flags for inclusion into
saved cpu state. Otherwise after return from trap
conditional instructions would use stale psr/xcc data....

e2542fe2 07/27/2009 10:09 pm Juan Quintela


Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

f707726e 07/27/2009 08:43 am Igor Kovalenko

sparc64 really implement itlb/dtlb automatic replacement writes

- implement "used" bit in tlb translation entry
- mark tlb entry used if qemu code/data translation succeeds
- fold i/d mmu replacement writes code into replace_tlb_1bit_lru which
adds 1bit lru replacement algorithm; previously code tried to replace...

6e8e7d4c 07/27/2009 08:43 am Igor Kovalenko

sparc64 name mmu registers and general cleanup

- add names to mmu registers, this helps understanding the code which
uses/modifies them.
- fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries
- extract demap_tlb routine (code duplication)...

0bf9e31a 07/20/2009 08:19 pm Blue Swirl

Fix most warnings (errors with -Werror) when debugging is enabled

I used the following command to enable debugging:
perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * /* *//*

Signed-off-by: Blue Swirl <>

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

5210977a 07/12/2009 11:46 am Igor Kovalenko

sparc64: trap handling corrections

On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<> wrote:

On 7/12/09, Igor Kovalenko <> wrote:

Good trap handling is required to process interrupts.
 This patch fixes the following:...

5b0f0bec 07/12/2009 10:44 am Igor Kovalenko

sparc64: fix helper_st_asi little endian case typo

On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<> wrote:

On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote:

It is clear that intention is to byte-swap value to be written, not...

e8807b14 07/12/2009 10:41 am Igor Kovalenko

sparc64: mmu bypass mode correction

This Implement physical address truncation in mmu bypass mode.
IMMU bypass is also active when cpu enters RED_STATE


Kind regards,
Igor V. Kovalenko

536ba015 07/12/2009 10:41 am Igor Kovalenko

sparc64: unify mmu tag matching code

This patch extracts common part of sparc64 tag
matching code used by IMMU and DMMU lookups.


Kind regards,
Igor V. Kovalenko

25517f99 06/06/2009 04:54 am Paul Brook

Use correct type for SPARC cpu_cc_op

Signed-off-by: Paul Brook <>

f80f9ec9 05/21/2009 04:47 pm Anthony Liguori

Convert machine registration to use module init functions

This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.

Signed-off-by: Anthony Liguori <>

1ad2134f 05/19/2009 06:17 pm Paul Brook

Hardware convenience library

The only target dependency for most hardware is sizeof(target_phys_addr_t).
Build these files into a convenience library, and use that instead of
building for every target.

Remove and poison various target specific macros to avoid bogus target...

55616505 05/13/2009 10:54 pm Paul Brook

Include assert.h from qemu-common.h

Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks

Signed-off-by: Paul Brook <>

001faf32 05/13/2009 08:53 pm Blue Swirl

Replace gcc variadic macro extension with C99 version

Signed-off-by: Blue Swirl <>

d084469c 05/10/2009 10:43 am Blue Swirl

Convert mulscc

Signed-off-by: Blue Swirl <>

6c78ea32 05/10/2009 10:42 am Blue Swirl

Convert udiv/sdiv

Signed-off-by: Blue Swirl <>

3b2d1e92 05/10/2009 10:38 am Blue Swirl

Convert tagged ops

Signed-off-by: Blue Swirl <>

38482a77 05/10/2009 10:38 am Blue Swirl

Convert logical operations and umul/smul

Signed-off-by: Blue Swirl <>

d4b0d468 05/10/2009 10:38 am Blue Swirl

Convert sub

Signed-off-by: Blue Swirl <>

2ca1d92b 05/10/2009 10:38 am Blue Swirl

Convert subx

Signed-off-by: Blue Swirl <>

789c91ef 05/10/2009 10:19 am Blue Swirl

Convert addx

Signed-off-by: Blue Swirl <>

bdf9f35d 05/10/2009 10:19 am Blue Swirl

Convert add

Signed-off-by: Blue Swirl <>

8393617c 05/10/2009 10:19 am Blue Swirl

Use dynamical computation for condition codes

Signed-off-by: Blue Swirl <>

719f66a7 05/03/2009 09:51 pm Blue Swirl

Optimize cmp x, 0 case

Signed-off-by: Blue Swirl <>

dc1a6971 05/03/2009 09:51 pm Blue Swirl


Signed-off-by: Blue Swirl <>

b89e94af 05/02/2009 11:19 pm Blue Swirl

Improve instruction name comments for easier searching

Signed-off-by: Blue Swirl <>

7ab463cb 05/02/2009 10:52 pm Blue Swirl

Clarify: dmmuregs1 is not a typo

Signed-off-by: Blue Swirl <>

41d72852 05/02/2009 10:14 pm Blue Swirl

Optimize operations with immediate parameters

67526b20 05/02/2009 09:58 pm Blue Swirl

Fix Sparc64 sign extension problems

Signed-off-by: Blue Swirl <>

417728d8 04/28/2009 06:59 pm Igor Kovalenko

sparc64 fix context value for ITLB fault

Revert previous change to get_physical_address_code:
I/D MMU context register is shared, so using dmmuregs1 is correct

Signed-off-by: Igor V. Kovalenko <>

82f2cfc3 04/27/2009 10:14 pm Igor Kovalenko

sparc64 fix TLB match code

TLB match code must respect page size, otherwise 4M page mappings may
be not found.

Also correct a typo in get_physical_address_code which should use IMMU

Signed-off-by: Igor V. Kovalenko <>...

9c22a623 04/25/2009 07:28 pm Blue Swirl

Fix a warning in sparc64-linux-user build

697a77e6 04/25/2009 06:17 pm Igor Kovalenko

sparc64 support TSB related MMU registers

Posting updated patch to the list...

On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <> wrote:
 > Nice, though I didn't notice any visible improvement in my tests.

This early in boot process there is not much to output; and I test...

0bf46a40 04/24/2009 09:03 pm aliguori

qemu: introduce qemu_init_vcpu (Marcelo Tosatti)

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

6a4955a8 04/24/2009 09:03 pm aliguori

qemu: per-arch cpu_has_work (Marcelo Tosatti)

Blue Swirl: fix Sparc32 breakage

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

1b530a6d 04/05/2009 11:08 pm aurel32

Add new command line option -singlestep for tcg single stepping.

This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode....

d78f3995 03/16/2009 06:33 pm blueswir1

Delete some unused macros detected with -Wp,-Wunused-macros use

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

c2764719 03/07/2009 05:24 pm pbrook

The _exit syscall is used for both thread termination in NPTL applications,
and process termination in legacy applications. Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.

Signed-off-by: Paul Brook <>...

415fc906 02/21/2009 01:13 pm blueswir1

Turn MMUs and caches off on reset

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

0d0266a5 02/06/2009 12:06 am aliguori

targets: remove error handling from qemu_malloc() callers (Avi Kivity)

Signed-off-by: Avi Kivity <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

eca1bdf4 01/26/2009 09:54 pm aliguori

Log reset events (Jan Kiszka)

Original idea&code by Kevin Wolf, split-up in two patches and added more

This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).

Signed-off-by: Jan Kiszka <>...

8fec2b8c 01/16/2009 12:36 am aliguori

global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)

These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

93fcfe39 01/16/2009 12:34 am aliguori

Convert references to logfile/loglevel to use qemu_log*() macros

This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

72d239ed 01/14/2009 09:40 pm aurel32

Get rid of user_mode_only

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

afdf8109 01/12/2009 11:12 pm blueswir1

Fix TLB access (Jakub Jermar)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

fad6cb1a 01/05/2009 12:05 am aurel32

Update FSF address in GPL/LGPL boilerplate

The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <>
Signed-off-by: Aurelien Jarno <>...

4017190e 12/23/2008 05:30 pm blueswir1

Add SuperSPARC MMU breakpoint registers (Robert Reif)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

963262de 12/23/2008 05:06 pm blueswir1

Better SuperSPARC emulation (Robert Reif)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

8fa211e8 12/23/2008 10:47 am blueswir1

Implement tick interrupt disable bits

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

b1503cda 12/22/2008 10:33 pm malc

Use the ARRAY_SIZE() macro where appropriate.

Change from v1:
Avoid changing the existing coding style in certain files.

Signed-off-by: Stuart Brady <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

1d6198c3 12/13/2008 11:32 am blueswir1

Remove unnecessary trailing newlines

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

f4a5a5ba 12/11/2008 07:29 pm blueswir1

Add missing "static"

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

2cbd949d 11/30/2008 06:23 pm aurel32

Common cpu_loop_exit prototype

All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Aurelien Jarno <>...

c0ce998e 11/26/2008 12:13 am aliguori

Use sys-queue.h for break/watchpoint managment (Jan Kiszka)

This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in

Signed-off-by: Jan Kiszka <>...

a1d1bb31 11/18/2008 10:07 pm aliguori

Refactor and enhance break/watchpoint API (Jan Kiszka)

This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists....

6b917547 11/18/2008 09:46 pm aliguori

Refactor translation block CPU state handling (Jan Kiszka)

This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()...

622ed360 11/18/2008 09:36 pm aliguori

Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)

as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

2576d836 11/09/2008 09:52 pm blueswir1

Use TCG not op

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

81b5b816 11/09/2008 09:50 pm blueswir1

Use andc, orc, nor and nand
Also fix which argument gets negated in fandnot12 and fornot12

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

527067d8 11/01/2008 03:44 pm blueswir1

Fix TCGv size mismatches

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

797d5db0 10/07/2008 10:12 pm blueswir1

Add static (spotted by sparse)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

c55bda30 10/07/2008 09:54 pm blueswir1

Fix error in fexpand (spotted by sparse)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

e18231a3 10/06/2008 09:46 pm blueswir1

Show size for unassigned accesses (Robert Reif)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

f4b1a842 10/03/2008 10:04 pm blueswir1

Rearrange tick functions

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162