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sparc32 fix np dereference in do_unassigned_access
fix a potential null pointer dereference introduced incommit 576c2cdc767ab9e2dc038fa4c99f22e53287a3de
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32 do_unassigned_access overhaul v2
According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache ControllerUser's Manual":
1. "A lower priority fault may not overwrite the MFSR status of a higher priority fault." 2. The MFAR is overwritten according to the policy defined for the MFSR...
sparc64: check for pending irq when pil, pstate or softint is changed
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc64: use helper_wrpil to check pending irq on write
sparc64: trace pstate and global register set changes
sparc64: change_pstate should have 32bit argument
- pstate is 32bit variable, no need to pass 64bit value around
Sparc32: clear exception_index with -1 value
See also 821b19fe923ac49a24cdb4af902584fdd019cee6.
Spotted by Artyom Tarasenko and Igor Kovalenko.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc64: clear exception_index with -1 value
pass env to raise_exception if called outside of op_helper code
- this fixes stepping with gdb, where do_unassigned_access may be called from gdb handler, outside of generated code
sparc64: switch to MMU global registers in more MMU related traps
- extended range of MMU related traps which use MMU global registers, as listed in Ultrasparc-IIi document- no visible changes, since emulation do not cause added traps
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>...
Sparc: fix carry flag handling (Solaris bootblk fix)
The page 108 of the SPARC Version 8 Architecture Manual describesthat addcc and addxcc shall compute carry flag the same way.The page 110 claims the same about subcc and subxcc instructions.This patch fixes carry computation in corner cases and removes redundant code....
sparc64: fix done instruction pc
Fix done instruction to resume with pc=tnpc, npc=tnpc+4
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
sparc64-8bit-asi
Sparc64 alternate space load/store helpers expect 8 bit ASI value,while wrasi implementation sign-extends ASI operand causingfor example 0x80 to appear as 0xFFFFFF80. Resulting value fallsout of switch in helpers and causes obscure load/store faults....
Sparc64: replace tsptr with helper routine
tl and tsptr of members sparc64 cpu state must be changedsimultaneously to keep trap state window in sync with currenttrap level. Currently translation of store to tl does not changetsptr, which leads to corrupt trap state on corresponding...
rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
sparc64 really implement itlb/dtlb automatic replacement writes
- implement "used" bit in tlb translation entry- mark tlb entry used if qemu code/data translation succeeds- fold i/d mmu replacement writes code into replace_tlb_1bit_lru whichadds 1bit lru replacement algorithm; previously code tried to replace...
sparc64 name mmu registers and general cleanup
- add names to mmu registers, this helps understanding the code whichuses/modifies them.- fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries- extract demap_tlb routine (code duplication)...
Fix most warnings (errors with -Werror) when debugging is enabled
I used the following command to enable debugging:perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * /* *//*
sparc64: trap handling corrections
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote: Good trap handling is required to process interrupts. This patch fixes the following:...
On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
Good trap handling is required to process interrupts. This patch fixes the following:...
sparc64: fix helper_st_asi little endian case typo
On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<sdbrady@ntlworld.com> wrote:
On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote: It is clear that intention is to byte-swap value to be written, not...
On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote:
It is clear that intention is to byte-swap value to be written, not...
Replace gcc variadic macro extension with C99 version
Convert udiv/sdiv
Convert tagged ops
Convert logical operations and umul/smul
Convert sub
Convert subx
Convert addx
Convert add
Use dynamical computation for condition codes
Fix a warning in sparc64-linux-user build
sparc64 support TSB related MMU registers
Posting updated patch to the list...
On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <blauwirbel@gmail.com> wrote: > > Nice, though I didn't notice any visible improvement in my tests. This early in boot process there is not much to output; and I test...
On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <blauwirbel@gmail.com> wrote: > > Nice, though I didn't notice any visible improvement in my tests.
This early in boot process there is not much to output; and I test...
Delete some unused macros detected with -Wp,-Wunused-macros use
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Add SuperSPARC MMU breakpoint registers (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162
Add missing "static"
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5977 c046a42c-6fe2-441c-8c8c-71466251a162
TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
Fix error in fexpand (spotted by sparse)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5438 c046a42c-6fe2-441c-8c8c-71466251a162
Show size for unassigned accesses (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
Rearrange tick functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
Fix MXCC printf warning (based on patch by Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
Add mmu tlb demap support (Igor Kovalenko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
Implement some UA2007 block ASIs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
Implement UA2005 hypervisor traps
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
Move also DEBUG_PCALL (see r5085)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
Add software and timer interrupt support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
Fix arguments used in cas/casx, thanks to Igor Kovalenko for spotting
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
Use the new concat_i32_i64 op for std and stda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
Fix array subscript above array bounds error
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
Convert rest of ops using float32 to TCG, remove FT0 and FT1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
Partially convert float128 conversion ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
Convert basic 64 bit VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
Convert basic 32 bit VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
Convert basic float32 ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
Implement no-fault loads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
Fix Sparc64 boot on i386 host: - move do_interrupt() back to op_helper.c - move non-helper prototypes from helper.h to exec.h - move some prototypes from cpu.h to exec.h - do not export either set_cwp() or cpu_set_cwp() from op_helper.c, but instead provide inline functions...
Fix udiv and sdiv on Sparc64 (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
Use initial CPU definition structure for some CPU fields instead of copyingthem around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
Fix faligndata (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4992 c046a42c-6fe2-441c-8c8c-71466251a162
Fix I/D MMU tag reads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
Make MAXTL dynamic, bounds check tl when indexing
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
Make UA200x features selectable, add MMU types
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
Remove unused variable
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4908 c046a42c-6fe2-441c-8c8c-71466251a162
Implement nucleus quad ldda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
Fix saving and loading of trap state
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4883 c046a42c-6fe2-441c-8c8c-71466251a162
Support for address masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
Fix MMU registers, add more E-cache ASIs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4881 c046a42c-6fe2-441c-8c8c-71466251a162
Implement some Ultrasparc cache ASIs used by SILO
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4858 c046a42c-6fe2-441c-8c8c-71466251a162
Fix boot problem on i386 host introduced in r4690
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4758 c046a42c-6fe2-441c-8c8c-71466251a162
Allow NWINDOWS selection (CPU feature with model specific defaults)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
Move non-op functions from op_helper.c to helper.c and vice versa.Rearrange interrupt handling to match other targets.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
Fix off-by-one unwinding error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
Remove currently unnecessary alignment masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4505 c046a42c-6fe2-441c-8c8c-71466251a162
Wrap long lines
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
suppressed fixed registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
Fix compiler warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
CPU feature selection support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
Move #include to speed up compilation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
Complete the TCG conversion
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
Revert the previous patch
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4236 c046a42c-6fe2-441c-8c8c-71466251a162
Move 128-bit float emulation under linux-user
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4234 c046a42c-6fe2-441c-8c8c-71466251a162
Convert align checks to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
Convert save, restore, saved, restored, and flushw to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4092 c046a42c-6fe2-441c-8c8c-71466251a162
Convert other float and VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4091 c046a42c-6fe2-441c-8c8c-71466251a162
Convert udiv and sdiv ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
Convert CCR and CWP ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4086 c046a42c-6fe2-441c-8c8c-71466251a162
Convert array8/16/32 and alignaddr to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4085 c046a42c-6fe2-441c-8c8c-71466251a162
Convert ldfsr and stfsr to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4067 c046a42c-6fe2-441c-8c8c-71466251a162
Convert Sparc64 trap state ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
Convert float helpers to TCG, fix fabsq in the process
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
Modify Sparc32/64 to use TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
Sparc32 MMU register fixes (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
More ASIs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
Nicer debug output for exceptions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
Initial support for Sun4d machines (SS-1000, SS-2000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162