Archipelago » qemu

    uint32_t reset3;

    uint32_t snapshot;

    PXA2xxTimer4 tm4[8];

};

                if (s->tm4[i].tm.level && (value & 1))

                    s->tm4[i].tm.level = 0;

            if (!(s->events & 0xff0))

        }

        break;

    case OWER:	/* XXX: Reset on OSMR3 match? */

        t->clock = 0;

    if (t->control & (1 << 6))

        pxa2xx_timer_update4(i, qemu_get_clock(vm_clock), t->tm.num - 4);

}

static int pxa25x_timer_post_load(void *opaque, int version_id)

    int i;

    int iomemtype;

    PXA2xxTimerInfo *s;

    s = FROM_SYSBUS(PXA2xxTimerInfo, dev);

    s->irq_enabled = 0;

                        pxa2xx_timer_tick, &s->timer[i]);

    }

    if (s->flags & (1 << PXA2XX_TIMER_HAVE_TM4)) {

        for (i = 0; i < 8; i ++) {

            s->tm4[i].tm.value = 0;

            s->tm4[i].control = 0x0;

            s->tm4[i].tm.qtimer = qemu_new_timer(vm_clock,

                        pxa2xx_timer_tick4, &s->tm4[i]);

        }

    }