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Revision 4ffb9ae2

ID4ffb9ae2e1227d2ffa14355acbecd37677fe0374

Added by Edgar E. Iglesias about 12 years ago

cris: Mask interrupts on dslots for CRISv10.

CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).

Signed-off-by: Edgar E. Iglesias <>

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