Revision 502a5395 vl.h
| b/vl.h | ||
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| 593 | 593 |
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| 594 | 594 |
#define PCI_ROM_SLOT 6 |
| 595 | 595 |
#define PCI_NUM_REGIONS 7 |
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#define PCI_DEVICES_MAX 64 |
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#define PCI_VENDOR_ID 0x00 /* 16 bits */ |
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#define PCI_DEVICE_ID 0x02 /* 16 bits */ |
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#define PCI_COMMAND 0x04 /* 16 bits */ |
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#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
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#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
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#define PCI_CLASS_DEVICE 0x0a /* Device class */ |
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#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
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#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
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#define PCI_MIN_GNT 0x3e /* 8 bits */ |
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#define PCI_MAX_LAT 0x3f /* 8 bits */ |
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| 596 | 610 |
struct PCIDevice {
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| 597 | 611 |
/* PCI config space */ |
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uint8_t config[256]; |
| ... | ... | |
| 606 | 620 |
/* do not access the following fields */ |
| 607 | 621 |
PCIConfigReadFunc *config_read; |
| 608 | 622 |
PCIConfigWriteFunc *config_write; |
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/* ??? This is a PC-specific hack, and should be removed. */ |
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| 609 | 624 |
int irq_index; |
| 610 | 625 |
}; |
| 611 | 626 |
|
| ... | ... | |
| 627 | 642 |
void generic_pci_save(QEMUFile* f, void *opaque); |
| 628 | 643 |
int generic_pci_load(QEMUFile* f, void *opaque, int version_id); |
| 629 | 644 |
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| 630 |
extern struct PIIX3State *piix3_state; |
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typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic, |
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int irq_num, int level); |
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PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min); |
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void pci_nic_init(PCIBus *bus, NICInfo *nd); |
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| 650 |
void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
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uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
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int pci_bus_num(PCIBus *s); |
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void pci_for_each_device(void (*fn)(PCIDevice *d)); |
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| 631 | 654 |
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PCIBus *i440fx_init(void); |
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void piix3_init(PCIBus *bus); |
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void pci_bios_init(void); |
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| 635 | 655 |
void pci_info(void); |
| 636 | 656 |
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/* temporary: will be moved in platform specific file */ |
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void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque); |
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/* prep_pci.c */ |
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| 639 | 658 |
PCIBus *pci_prep_init(void); |
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PCIBus *pci_grackle_init(uint32_t base); |
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PCIBus *pci_pmac_init(void); |
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PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base); |
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| 643 | 659 |
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void pci_nic_init(PCIBus *bus, NICInfo *nd); |
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/* grackle_pci.c */ |
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PCIBus *pci_grackle_init(uint32_t base, void *pic); |
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/* unin_pci.c */ |
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PCIBus *pci_pmac_init(void *pic); |
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/* apb_pci.c */ |
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PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, |
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void *pic); |
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PCIBus *pci_vpb_init(void *pic); |
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/* piix_pci.c */ |
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PCIBus *i440fx_init(void); |
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int piix3_init(PCIBus *bus); |
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void pci_bios_init(void); |
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| 645 | 676 |
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| 646 | 677 |
/* openpic.c */ |
| 647 | 678 |
typedef struct openpic_t openpic_t; |
| ... | ... | |
| 726 | 757 |
BlockDriverState *hd0, BlockDriverState *hd1); |
| 727 | 758 |
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
| 728 | 759 |
int secondary_ide_enabled); |
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void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table); |
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void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
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int pmac_ide_init (BlockDriverState **hd_table, |
| 731 | 762 |
SetIRQFunc *set_irq, void *irq_opaque, int irq); |
| 732 | 763 |
|
| ... | ... | |
| 843 | 874 |
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/* acpi.c */ |
| 845 | 876 |
extern int acpi_enabled; |
| 846 |
void piix4_pm_init(PCIBus *bus); |
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void piix4_pm_init(PCIBus *bus, int devfn);
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| 847 | 878 |
void acpi_bios_init(void); |
| 848 | 879 |
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| 849 | 880 |
/* pc.c */ |
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