Revision 5105c556
b/tcg/tcg-op.h | ||
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589 | 589 |
tcg_temp_free_i32(t0); |
590 | 590 |
} |
591 | 591 |
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592 |
static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret, |
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593 |
TCGv_i32 arg1, TCGv_i32 arg2) |
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594 |
{ |
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595 |
tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond); |
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596 |
} |
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597 |
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598 |
static inline void tcg_gen_setcondi_i32(int cond, TCGv_i32 ret, TCGv_i32 arg1, |
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599 |
int32_t arg2) |
|
600 |
{ |
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601 |
TCGv_i32 t0 = tcg_const_i32(arg2); |
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602 |
tcg_gen_setcond_i32(cond, ret, arg1, t0); |
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603 |
tcg_temp_free_i32(t0); |
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604 |
} |
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605 |
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592 | 606 |
static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) |
593 | 607 |
{ |
594 | 608 |
tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2); |
... | ... | |
851 | 865 |
TCGV_HIGH(arg2), cond, label_index); |
852 | 866 |
} |
853 | 867 |
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868 |
static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret, |
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869 |
TCGv_i64 arg1, TCGv_i64 arg2) |
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870 |
{ |
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871 |
tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret), |
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872 |
TCGV_LOW(arg1), TCGV_HIGH(arg1), |
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873 |
TCGV_LOW(arg2), TCGV_HIGH(arg2), cond); |
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874 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
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875 |
} |
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876 |
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854 | 877 |
static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) |
855 | 878 |
{ |
856 | 879 |
TCGv_i64 t0; |
... | ... | |
1081 | 1104 |
tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
1082 | 1105 |
} |
1083 | 1106 |
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1107 |
static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret, |
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1108 |
TCGv_i64 arg1, TCGv_i64 arg2) |
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1109 |
{ |
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1110 |
tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond); |
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1111 |
} |
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1112 |
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1084 | 1113 |
static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) |
1085 | 1114 |
{ |
1086 | 1115 |
tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2); |
... | ... | |
1184 | 1213 |
tcg_temp_free_i64(t0); |
1185 | 1214 |
} |
1186 | 1215 |
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1216 |
static inline void tcg_gen_setcondi_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1, |
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1217 |
int64_t arg2) |
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1218 |
{ |
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1219 |
TCGv_i64 t0 = tcg_const_i64(arg2); |
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1220 |
tcg_gen_setcond_i64(cond, ret, arg1, t0); |
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1221 |
tcg_temp_free_i64(t0); |
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1222 |
} |
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1223 |
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1187 | 1224 |
static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) |
1188 | 1225 |
{ |
1189 | 1226 |
TCGv_i64 t0 = tcg_const_i64(arg2); |
... | ... | |
1821 | 1858 |
} |
1822 | 1859 |
} |
1823 | 1860 |
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1824 |
static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret, |
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1825 |
TCGv_i32 arg1, TCGv_i32 arg2) |
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1826 |
{ |
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1827 |
tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond); |
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1828 |
} |
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1829 |
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1830 |
static inline void tcg_gen_setcondi_i32(int cond, TCGv_i32 ret, TCGv_i32 arg1, |
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1831 |
int32_t arg2) |
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1832 |
{ |
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1833 |
TCGv_i32 t0 = tcg_const_i32(arg2); |
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1834 |
tcg_gen_setcond_i32(cond, ret, arg1, t0); |
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1835 |
tcg_temp_free_i32(t0); |
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1836 |
} |
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1837 |
|
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1838 |
static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret, |
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1839 |
TCGv_i64 arg1, TCGv_i64 arg2) |
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1840 |
{ |
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1841 |
#if TCG_TARGET_REG_BITS == 64 |
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1842 |
tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond); |
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1843 |
#else |
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1844 |
tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret), |
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1845 |
TCGV_LOW(arg1), TCGV_HIGH(arg1), |
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1846 |
TCGV_LOW(arg2), TCGV_HIGH(arg2), cond); |
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1847 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
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1848 |
#endif |
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1849 |
} |
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1850 |
|
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1851 |
static inline void tcg_gen_setcondi_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1, |
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1852 |
int64_t arg2) |
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1853 |
{ |
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1854 |
TCGv_i64 t0 = tcg_const_i64(arg2); |
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1855 |
tcg_gen_setcond_i64(cond, ret, arg1, t0); |
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1856 |
tcg_temp_free_i64(t0); |
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1857 |
} |
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1858 |
|
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1859 | 1861 |
/***************************************/ |
1860 | 1862 |
/* QEMU specific operations. Their type depend on the QEMU CPU |
1861 | 1863 |
type. */ |
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