Revision 513691b7
| b/hw/pcie_aer.c | ||
|---|---|---|
| 273 | 273 |
return cmd; |
| 274 | 274 |
} |
| 275 | 275 |
|
| 276 |
static void pcie_aer_root_notify(PCIDevice *dev) |
|
| 277 |
{
|
|
| 278 |
if (msix_enabled(dev)) {
|
|
| 279 |
msix_notify(dev, pcie_aer_root_get_vector(dev)); |
|
| 280 |
} else if (msi_enabled(dev)) {
|
|
| 281 |
msi_notify(dev, pcie_aer_root_get_vector(dev)); |
|
| 282 |
} else {
|
|
| 283 |
qemu_set_irq(dev->irq[dev->exp.aer_intx], 1); |
|
| 284 |
} |
|
| 285 |
} |
|
| 286 |
|
|
| 276 | 287 |
/* |
| 277 | 288 |
* 6.2.6 Error Message Control |
| 278 | 289 |
* Figure 6-3 |
| ... | ... | |
| 344 | 355 |
return; |
| 345 | 356 |
} |
| 346 | 357 |
|
| 347 |
if (msix_enabled(dev)) {
|
|
| 348 |
msix_notify(dev, pcie_aer_root_get_vector(dev)); |
|
| 349 |
} else if (msi_enabled(dev)) {
|
|
| 350 |
msi_notify(dev, pcie_aer_root_get_vector(dev)); |
|
| 351 |
} else {
|
|
| 352 |
qemu_set_irq(dev->irq[dev->exp.aer_intx], 1); |
|
| 353 |
} |
|
| 358 |
pcie_aer_root_notify(dev); |
|
| 354 | 359 |
} |
| 355 | 360 |
|
| 356 | 361 |
/* |
| ... | ... | |
| 760 | 765 |
return; |
| 761 | 766 |
} |
| 762 | 767 |
|
| 763 |
if (msix_enabled(dev)) {
|
|
| 764 |
msix_notify(dev, pcie_aer_root_get_vector(dev)); |
|
| 765 |
} else if (msi_enabled(dev)) {
|
|
| 766 |
msi_notify(dev, pcie_aer_root_get_vector(dev)); |
|
| 767 |
} else {
|
|
| 768 |
abort(); |
|
| 769 |
} |
|
| 768 |
pcie_aer_root_notify(dev); |
|
| 770 | 769 |
} |
| 771 | 770 |
|
| 772 | 771 |
static const VMStateDescription vmstate_pcie_aer_err = {
|
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