Revision 51789c41 target-ppc/translate.c
| b/target-ppc/translate.c | ||
|---|---|---|
| 1109 | 1109 |
{
|
| 1110 | 1110 |
target_ulong mask; |
| 1111 | 1111 |
uint32_t mb, me, sh; |
| 1112 |
int n; |
|
| 1113 | 1112 |
|
| 1114 | 1113 |
mb = MB(ctx->opcode); |
| 1115 | 1114 |
me = ME(ctx->opcode); |
| 1116 | 1115 |
sh = SH(ctx->opcode); |
| 1117 |
n = me + 1 - mb; |
|
| 1118 | 1116 |
if (likely(sh == 0)) {
|
| 1119 | 1117 |
if (likely(mb == 0 && me == 31)) {
|
| 1120 | 1118 |
gen_op_load_gpr_T0(rS(ctx->opcode)); |
| ... | ... | |
| 1231 | 1229 |
{ \
|
| 1232 | 1230 |
gen_##name(ctx, 1, 1); \ |
| 1233 | 1231 |
} |
| 1232 |
|
|
| 1233 |
static inline void gen_rldinm (DisasContext *ctx, uint32_t mb, uint32_t me, |
|
| 1234 |
uint32_t sh) |
|
| 1235 |
{
|
|
| 1236 |
gen_op_load_gpr_T0(rS(ctx->opcode)); |
|
| 1237 |
if (likely(sh == 0)) {
|
|
| 1238 |
goto do_mask; |
|
| 1239 |
} |
|
| 1240 |
if (likely(mb == 0)) {
|
|
| 1241 |
if (likely(me == 63)) {
|
|
| 1242 |
gen_op_rotli32_T0(sh); |
|
| 1243 |
goto do_store; |
|
| 1244 |
} else if (likely(me == (63 - sh))) {
|
|
| 1245 |
gen_op_sli_T0(sh); |
|
| 1246 |
goto do_store; |
|
| 1247 |
} |
|
| 1248 |
} else if (likely(me == 63)) {
|
|
| 1249 |
if (likely(sh == (64 - mb))) {
|
|
| 1250 |
gen_op_srli_T0(mb); |
|
| 1251 |
goto do_store; |
|
| 1252 |
} |
|
| 1253 |
} |
|
| 1254 |
gen_op_rotli64_T0(sh); |
|
| 1255 |
do_mask: |
|
| 1256 |
gen_op_andi_T0(MASK(mb, me)); |
|
| 1257 |
do_store: |
|
| 1258 |
gen_op_store_T0_gpr(rA(ctx->opcode)); |
|
| 1259 |
if (unlikely(Rc(ctx->opcode) != 0)) |
|
| 1260 |
gen_set_Rc0(ctx); |
|
| 1261 |
} |
|
| 1234 | 1262 |
/* rldicl - rldicl. */ |
| 1235 | 1263 |
static inline void gen_rldicl (DisasContext *ctx, int mbn, int shn) |
| 1236 | 1264 |
{
|
| 1237 |
int sh, mb;
|
|
| 1265 |
uint32_t sh, mb;
|
|
| 1238 | 1266 |
|
| 1239 | 1267 |
sh = SH(ctx->opcode) | (1 << shn); |
| 1240 | 1268 |
mb = (MB(ctx->opcode) << 1) | mbn; |
| 1241 |
/* XXX: TODO */ |
|
| 1242 |
RET_INVAL(ctx); |
|
| 1269 |
gen_rldinm(ctx, mb, 63, sh); |
|
| 1243 | 1270 |
} |
| 1244 |
GEN_PPC64_R4(rldicl, 0x1E, 0x00) |
|
| 1271 |
GEN_PPC64_R4(rldicl, 0x1E, 0x00);
|
|
| 1245 | 1272 |
/* rldicr - rldicr. */ |
| 1246 | 1273 |
static inline void gen_rldicr (DisasContext *ctx, int men, int shn) |
| 1247 | 1274 |
{
|
| 1248 |
int sh, me;
|
|
| 1275 |
uint32_t sh, me;
|
|
| 1249 | 1276 |
|
| 1250 | 1277 |
sh = SH(ctx->opcode) | (1 << shn); |
| 1251 | 1278 |
me = (MB(ctx->opcode) << 1) | men; |
| 1252 |
/* XXX: TODO */ |
|
| 1253 |
RET_INVAL(ctx); |
|
| 1279 |
gen_rldinm(ctx, 0, me, sh); |
|
| 1254 | 1280 |
} |
| 1255 |
GEN_PPC64_R4(rldicr, 0x1E, 0x02) |
|
| 1281 |
GEN_PPC64_R4(rldicr, 0x1E, 0x02);
|
|
| 1256 | 1282 |
/* rldic - rldic. */ |
| 1257 | 1283 |
static inline void gen_rldic (DisasContext *ctx, int mbn, int shn) |
| 1258 | 1284 |
{
|
| 1259 |
int sh, mb;
|
|
| 1285 |
uint32_t sh, mb;
|
|
| 1260 | 1286 |
|
| 1261 | 1287 |
sh = SH(ctx->opcode) | (1 << shn); |
| 1262 | 1288 |
mb = (MB(ctx->opcode) << 1) | mbn; |
| 1263 |
/* XXX: TODO */ |
|
| 1264 |
RET_INVAL(ctx); |
|
| 1289 |
gen_rldinm(ctx, mb, 63 - sh, sh); |
|
| 1265 | 1290 |
} |
| 1266 |
GEN_PPC64_R4(rldic, 0x1E, 0x04) |
|
| 1291 |
GEN_PPC64_R4(rldic, 0x1E, 0x04); |
|
| 1292 |
|
|
| 1293 |
static inline void gen_rldnm (DisasContext *ctx, uint32_t mb, uint32_t me) |
|
| 1294 |
{
|
|
| 1295 |
gen_op_load_gpr_T0(rS(ctx->opcode)); |
|
| 1296 |
gen_op_load_gpr_T1(rB(ctx->opcode)); |
|
| 1297 |
gen_op_rotl64_T0_T1(); |
|
| 1298 |
if (unlikely(mb != 0 || me != 63)) {
|
|
| 1299 |
gen_op_andi_T0(MASK(mb, me)); |
|
| 1300 |
} |
|
| 1301 |
gen_op_store_T0_gpr(rA(ctx->opcode)); |
|
| 1302 |
if (unlikely(Rc(ctx->opcode) != 0)) |
|
| 1303 |
gen_set_Rc0(ctx); |
|
| 1304 |
} |
|
| 1305 |
|
|
| 1267 | 1306 |
/* rldcl - rldcl. */ |
| 1268 | 1307 |
static inline void gen_rldcl (DisasContext *ctx, int mbn) |
| 1269 | 1308 |
{
|
| 1270 |
int mb;
|
|
| 1309 |
uint32_t mb;
|
|
| 1271 | 1310 |
|
| 1272 | 1311 |
mb = (MB(ctx->opcode) << 1) | mbn; |
| 1273 |
/* XXX: TODO */ |
|
| 1274 |
RET_INVAL(ctx); |
|
| 1312 |
gen_rldnm(ctx, mb, 63); |
|
| 1275 | 1313 |
} |
| 1276 | 1314 |
GEN_PPC64_R2(rldcl, 0x1E, 0x08) |
| 1277 | 1315 |
/* rldcr - rldcr. */ |
| 1278 | 1316 |
static inline void gen_rldcr (DisasContext *ctx, int men) |
| 1279 | 1317 |
{
|
| 1280 |
int me;
|
|
| 1318 |
uint32_t me;
|
|
| 1281 | 1319 |
|
| 1282 | 1320 |
me = (MB(ctx->opcode) << 1) | men; |
| 1283 |
/* XXX: TODO */ |
|
| 1284 |
RET_INVAL(ctx); |
|
| 1321 |
gen_rldnm(ctx, 0, me); |
|
| 1285 | 1322 |
} |
| 1286 | 1323 |
GEN_PPC64_R2(rldcr, 0x1E, 0x09) |
| 1287 | 1324 |
/* rldimi - rldimi. */ |
| 1288 | 1325 |
static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) |
| 1289 | 1326 |
{
|
| 1290 |
int sh, mb; |
|
| 1327 |
uint64_t mask; |
|
| 1328 |
uint32_t sh, mb; |
|
| 1291 | 1329 |
|
| 1292 | 1330 |
sh = SH(ctx->opcode) | (1 << shn); |
| 1293 | 1331 |
mb = (MB(ctx->opcode) << 1) | mbn; |
| 1294 |
/* XXX: TODO */ |
|
| 1295 |
RET_INVAL(ctx); |
|
| 1332 |
if (likely(sh == 0)) {
|
|
| 1333 |
if (likely(mb == 0)) {
|
|
| 1334 |
gen_op_load_gpr_T0(rS(ctx->opcode)); |
|
| 1335 |
goto do_store; |
|
| 1336 |
} else if (likely(mb == 63)) {
|
|
| 1337 |
gen_op_load_gpr_T0(rA(ctx->opcode)); |
|
| 1338 |
goto do_store; |
|
| 1339 |
} |
|
| 1340 |
gen_op_load_gpr_T0(rS(ctx->opcode)); |
|
| 1341 |
gen_op_load_gpr_T1(rA(ctx->opcode)); |
|
| 1342 |
goto do_mask; |
|
| 1343 |
} |
|
| 1344 |
gen_op_load_gpr_T0(rS(ctx->opcode)); |
|
| 1345 |
gen_op_load_gpr_T1(rA(ctx->opcode)); |
|
| 1346 |
gen_op_rotli64_T0(SH(ctx->opcode)); |
|
| 1347 |
do_mask: |
|
| 1348 |
mask = MASK(mb, 63 - sh); |
|
| 1349 |
gen_op_andi_T0(mask); |
|
| 1350 |
gen_op_andi_T1(~mask); |
|
| 1351 |
gen_op_or(); |
|
| 1352 |
do_store: |
|
| 1353 |
gen_op_store_T0_gpr(rA(ctx->opcode)); |
|
| 1354 |
if (unlikely(Rc(ctx->opcode) != 0)) |
|
| 1355 |
gen_set_Rc0(ctx); |
|
| 1296 | 1356 |
} |
| 1297 | 1357 |
GEN_PPC64_R4(rldimi, 0x1E, 0x06) |
| 1298 | 1358 |
#endif |
Also available in: Unified diff