Revision 52621688

b/cpu-exec.c
409 409
                        !(env->hflags & HF_INHIBIT_IRQ_MASK)) {
410 410
                        int intno;
411 411
                        svm_check_intercept(SVM_EXIT_INTR);
412
                        env->interrupt_request &= ~CPU_INTERRUPT_HARD;
412
                        env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
413 413
                        intno = cpu_get_pic_interrupt(env);
414 414
                        if (loglevel & CPU_LOG_TB_IN_ASM) {
415 415
                            fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno);
......
428 428
                         int intno;
429 429
                         /* FIXME: this should respect TPR */
430 430
                         env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
431
                         stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl),
432
                                  ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl)) & ~V_IRQ_MASK);
431
                         svm_check_intercept(SVM_EXIT_VINTR);
433 432
                         intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
434 433
                         if (loglevel & CPU_LOG_TB_IN_ASM)
435 434
                             fprintf(logfile, "Servicing virtual hardware INT=0x%02x\n", intno);
436 435
	                 do_interrupt(intno, 0, 0, -1, 1);
436
                         stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl),
437
                                  ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl)) & ~V_IRQ_MASK);
437 438
#if defined(__sparc__) && !defined(HOST_SOLARIS)
438 439
                         tmp_T0 = 0;
439 440
#else
b/target-i386/helper.c
4120 4120
        if (loglevel & CPU_LOG_TB_IN_ASM)
4121 4121
            fprintf(logfile, " %#x %#x\n", env->exception_index, env->error_code);
4122 4122
    }
4123
    if (int_ctl & V_IRQ_MASK)
4123
    if ((int_ctl & V_IRQ_MASK) || (env->intercept & INTERCEPT_VINTR)) {
4124 4124
        env->interrupt_request |= CPU_INTERRUPT_VIRQ;
4125
    }
4125 4126

  
4126 4127
    cpu_loop_exit();
4127 4128
}
......
4283 4284
                ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)),
4284 4285
                EIP);
4285 4286

  
4287
    if(env->hflags & HF_INHIBIT_IRQ_MASK) {
4288
        stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_state), SVM_INTERRUPT_SHADOW_MASK);
4289
        env->hflags &= ~HF_INHIBIT_IRQ_MASK;
4290
    } else {
4291
        stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_state), 0);
4292
    }
4293

  
4286 4294
    /* Save the VM state in the vmcb */
4287 4295
    SVM_SAVE_SEG(env->vm_vmcb, segs[R_ES], es);
4288 4296
    SVM_SAVE_SEG(env->vm_vmcb, segs[R_CS], cs);
b/target-i386/translate.c
5551 5551
                    gen_op_set_inhibit_irq();
5552 5552
                /* give a chance to handle pending irqs */
5553 5553
                gen_jmp_im(s->pc - s->cs_base);
5554
                if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_VINTR))
5555
                    break;
5556 5554
                gen_eob(s);
5557 5555
            } else {
5558 5556
                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);

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