Revision 52705890

b/exec.c
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#define SMC_BITMAP_USE_THRESHOLD 10


  		





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#if defined(TARGET_SPARC64)


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 41


  		





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#elif defined(TARGET_SPARC)


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 36


  		





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#elif defined(TARGET_ALPHA)


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 42


  		





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#define TARGET_VIRT_ADDR_SPACE_BITS 42


  		





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#elif defined(TARGET_PPC64)


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 42


  		





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#elif defined(TARGET_X86_64)


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 42


  		





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#elif defined(TARGET_I386)


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 36


  		





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#else


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





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#endif


  		





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static TranslationBlock *tbs;


  		





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int code_gen_max_blocks;


  		





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TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];


  		












  

    
      b/target-alpha/cpu.h
    
  






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#define TARGET_PAGE_BITS 13


  		





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#define VA_BITS 43


  		





  
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/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44.  */


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS	44


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS	(30 + TARGET_PAGE_BITS)


  		





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/* Alpha major type */


  		





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enum {


  		












  

    
      b/target-arm/cpu.h
    
  






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#define TARGET_PAGE_BITS 10


  		





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#endif


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#define cpu_init cpu_arm_init


  		





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#define cpu_exec cpu_arm_exec


  		





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#define cpu_gen_code cpu_arm_gen_code


  		












  

    
      b/target-cris/cpu.h
    
  






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#define TARGET_PAGE_BITS 13


  		





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#define MMAP_SHIFT TARGET_PAGE_BITS


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#define cpu_init cpu_cris_init


  		





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#define cpu_exec cpu_cris_exec


  		





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#define cpu_gen_code cpu_cris_gen_code


  		












  

    
      b/target-i386/cpu.h
    
  






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#define TARGET_PAGE_BITS 12


  		





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#ifdef TARGET_X86_64


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 52


  		





  
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/* ??? This is really 48 bits, sign-extended, but the only thing


  		





  
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   accessible to userland with bit 48 set is the VSYSCALL, and that


  		





  
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   is handled via other mechanisms.  */


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 47


  		





  
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#else


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 36


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#endif


  		





  
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#define cpu_init cpu_x86_init


  		





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#define cpu_exec cpu_x86_exec


  		





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#define cpu_gen_code cpu_x86_gen_code


  		












  

    
      b/target-m68k/cpu.h
    
  






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#define TARGET_PAGE_BITS 10


  		





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#endif


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#define cpu_init cpu_m68k_init


  		





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#define cpu_exec cpu_m68k_exec


  		





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#define cpu_gen_code cpu_m68k_gen_code


  		












  

    
      b/target-microblaze/cpu.h
    
  






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#define TARGET_PAGE_BITS 12


  		





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#define MMAP_SHIFT TARGET_PAGE_BITS


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#define cpu_init cpu_mb_init


  		





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#define cpu_exec cpu_mb_exec


  		





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#define cpu_gen_code cpu_mb_gen_code


  		












  

    
      b/target-mips/mips-defs.h
    
  






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#define TARGET_PAGE_BITS 12


  		





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#define MIPS_TLB_MAX 128


  		





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/* ??? MIPS64 no doubt has a larger address space.  */


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#if defined(TARGET_MIPS64)


  		





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#define TARGET_LONG_BITS 64


  		





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#else


  		












  

    
      b/target-ppc/cpu.h
    
  






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#define TARGET_LONG_BITS 64


  		





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#define TARGET_PAGE_BITS 12


  		





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/* Note that the official physical address space bits is 62-M where M


  		





  
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   is implementation dependent.  I've not looked up M for the set of


  		





  
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   cpus we emulate at the system level.  */


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 62


  		





  
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/* Note that the PPC environment architecture talks about 80 bit virtual


  		





  
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   addresses, with segmentation.  Obviously that's not all visible to a


  		





  
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   single process, which is all we're concerned with here.  */


  		





  
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#ifdef TARGET_ABI32


  		





  
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# define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#else


  		





  
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# define TARGET_VIRT_ADDR_SPACE_BITS 64


  		





  
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#endif


  		





  
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#else /* defined (TARGET_PPC64) */


  		





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/* PowerPC 32 definitions */


  		





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#define TARGET_LONG_BITS 32


  		





  ......




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#define TARGET_PAGE_BITS 12


  		





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#endif /* defined(TARGET_PPCEMB) */


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#endif /* defined (TARGET_PPC64) */


  		





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#define CPUState struct CPUPPCState


  		












  

    
      b/target-s390x/cpu.h
    
  






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#define TARGET_PAGE_BITS 12


  		





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/* ??? This is certainly wrong for 64-bit s390x, but given that only KVM


  		





  
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   emulation actually works, this is good enough for a placeholder.  */


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#ifndef CONFIG_USER_ONLY


  		





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extern int s390_virtio_hypercall(CPUState *env);


  		





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extern void kvm_s390_virtio_irq(CPUState *env, int config_change, uint64_t token);


  		












  

    
      b/target-sh4/cpu.h
    
  






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#define TARGET_PAGE_BITS 12	/* 4k XXXXX */


  		





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#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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#define SR_MD (1 << 30)


  		





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#define SR_RB (1 << 29)


  		





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#define SR_BL (1 << 28)


  		












  

    
      b/target-sparc/cpu.h
    
  






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#define TARGET_LONG_BITS 32


  		





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#define TARGET_FPREGS 32


  		





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#define TARGET_PAGE_BITS 12 /* 4k */


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 41


  		





  
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# ifdef TARGET_ABI32


  		





  
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#  define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  
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# else


  		





  
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#  define TARGET_VIRT_ADDR_SPACE_BITS 44


  		





  
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# endif


  		





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#else


  		





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#define TARGET_LONG_BITS 64


  		





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#define TARGET_FPREGS 64


  		





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#define TARGET_PAGE_BITS 13 /* 8k */


  		





  
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#define TARGET_PHYS_ADDR_SPACE_BITS 36


  		





  
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#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





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#endif


  		





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#define CPUState struct CPUSPARCState


  		












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