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root / target-ppc @ 52705890

Name Size
STATUS 10.6 kB
cpu.h 68.3 kB
exec.h 1.5 kB
helper.c 93.7 kB
helper.h 14.3 kB
helper_regs.h 3.3 kB
kvm.c 7.7 kB
kvm_ppc.c 2.6 kB
kvm_ppc.h 469 Bytes
machine.c 5.6 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op_helper.c 124 kB
translate.c 334.8 kB
translate_init.c 414.3 kB

Latest revisions

# Date Author Comment
52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....
0aef4261 03/11/2010 10:29 pm Aurelien Jarno

target-ppc: fix evsrwu and evsrws (second try)

Signed-off-by: Aurelien Jarno <>
26b14dc4 03/11/2010 10:22 pm Aurelien Jarno

target-ppc: fix evsrwu and evsrws

Signed-off-by: Aurelien Jarno <>
e29ef9fa 03/11/2010 10:14 pm Aurelien Jarno

target-ppc: fix evslw instruction

Signed-off-by: Aurelien Jarno <>
ea375f9a 03/04/2010 05:29 am Jan Kiszka

KVM: Rework VCPU state writeback API

This grand cleanup drops all reset and vmsave/load related
synchronization points in favor of four(!) generic hooks:

- cpu_synchronize_all_states in qemu_savevm_state_complete
(initial sync from kernel before vmsave)...
db9a231d 02/28/2010 05:36 pm Aurelien Jarno

Revert "target-ppc: stop translation after a trap instruction"

This reverts commit 6454e7be1b2504533f7ffb190d54ebe2993cb434.
6c712321 02/28/2010 05:36 pm Aurelien Jarno

target-ppc: don't print invalid opcode messages on the console

Invalid opcode messages can be perfectly normal, for example if this
code is never executed. Don't print an error message on the console,
but keep the message in the log for debugging purposes....
6454e7be 02/28/2010 03:11 pm Aurelien Jarno

target-ppc: stop translation after a trap instruction

Signed-off-by: Aurelien Jarno <>
ae01847f 02/27/2010 05:10 pm Nathan Froyd

target-ppc: fix SPE evsplat* instructions

The shifts in the gen_evsplat* functions were expecting rA to be masked,
not extracted, and so used the wrong shift amounts to sign-extend or pad
with zeroes.

Signed-off-by: Nathan Froyd <>...
e6bba2ef 02/27/2010 05:10 pm Nathan Froyd

target-ppc: fix SPE evcmp* instructions

The CRF_{CH,CL,CH_OR_CL,CH_AND_CL} constants were all off by one bit
position. Because of this, the SPE evcmp* family of instructions would
store values in the result condition register that were also off by one
bit position....

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