Revision 53a89e26 hw/i386/pc.c
b/hw/i386/pc.c | ||
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#include "qemu/bitmap.h" |
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#include "qemu/config-file.h" |
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#include "hw/acpi/acpi.h" |
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#include "hw/cpu/icc_bus.h" |
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/* debug PC/ISA interrupts */ |
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//#define DEBUG_IRQ |
... | ... | |
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void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) |
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{ |
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int i; |
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X86CPU *cpu = NULL; |
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Error *error = NULL; |
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/* init CPUs */ |
... | ... | |
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} |
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for (i = 0; i < smp_cpus; i++) { |
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pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), |
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icc_bridge, &error); |
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cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
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icc_bridge, &error);
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if (error) { |
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fprintf(stderr, "%s\n", error_get_pretty(error)); |
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error_free(error); |
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exit(1); |
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} |
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} |
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|
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/* map APIC MMIO area if CPU has APIC */ |
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if (cpu && cpu->env.apic_state) { |
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/* XXX: what if the base changes? */ |
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sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0, |
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APIC_DEFAULT_ADDRESS, 0x1000); |
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} |
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} |
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void pc_acpi_init(const char *default_dsdt) |
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