Archipelago » qemu

/* For compatibility with 32-bit code, data reference in user mode

   with Status_UX = 0 should be casted to 32-bit and sign extended.

   See the MIPS64 PRA manual, section 4.10. */

    if ((env->hflags & MIPS_HFLAG_UM) &&

        !(env->CP0_Status & (1 << CP0St_UX)))

        T0 = (int64_t)(int32_t)(T0 + T1);

    RETURN();

}

/* Arithmetic */

void op_dadd (void)

{

    RETURN();

}

#endif

/* Logical */

void op_and (void)

    RETURN();

}

#if TARGET_LONG_BITS > HOST_LONG_BITS

/* Those might call libgcc functions.  */

    }

    RETURN();

}

/* 64 bits arithmetic */

#if TARGET_LONG_BITS > HOST_LONG_BITS

}

#endif /* TARGET_LONG_BITS > HOST_LONG_BITS */

void op_dmult (void)

{

    CALL_FROM_TB4(muls64, &(env->HI[0][env->current_tc]), &(env->LO[0][env->current_tc]), T0, T1);

    RETURN();

}

void op_save_btarget64 (void)

{

    env->btarget = ((uint64_t)PARAM1 << 32) | (uint32_t)PARAM2;

    /* 1k pages not implemented */

    val = T0 & ((TARGET_PAGE_MASK << 1) | 0xFF);

    val &= env->SEGMask;

#endif

    old = env->CP0_EntryHi;

    RETURN();

}

void op_dmfc0_yqmask (void)

{

    T0 = env->CP0_YQMask;

    T0 = env->CP0_ErrorEPC;

    RETURN();

}

/* MIPS MT functions */

void op_mftgpr(void)

    RETURN();

}

void op_save_pc64 (void)

{

    env->PC[env->current_tc] = ((uint64_t)PARAM1 << 32) | (uint32_t)PARAM2;

    RETURN();

}

void op_dext(void)

{

    unsigned int pos = PARAM1;