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/*
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**
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** File: fmopl.c -- software implementation of FM sound generator
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**
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** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmurator development
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**
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** Version 0.37a
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**
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*/
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/*
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        preliminary :
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        Problem :
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        note:
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*/
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/* This version of fmopl.c is a fork of the MAME one, relicensed under the LGPL.
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#define INLINE                __inline
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#define HAS_YM3812        1
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdarg.h>
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#include <math.h>
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//#include "driver.h"                /* use M.A.M.E. */
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#include "fmopl.h"
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#ifndef PI
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#define PI 3.14159265358979323846
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#endif
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/* -------------------- for debug --------------------- */
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/* #define OPL_OUTPUT_LOG */
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#ifdef OPL_OUTPUT_LOG
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static FILE *opl_dbg_fp = NULL;
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static FM_OPL *opl_dbg_opl[16];
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static int opl_dbg_maxchip,opl_dbg_chip;
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#endif
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/* -------------------- preliminary define section --------------------- */
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/* attack/decay rate time rate */
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#define OPL_ARRATE     141280  /* RATE 4 =  2826.24ms @ 3.6MHz */
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#define OPL_DRRATE    1956000  /* RATE 4 = 39280.64ms @ 3.6MHz */
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#define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */
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#define FREQ_BITS 24                        /* frequency turn          */
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/* counter bits = 20 , octerve 7 */
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#define FREQ_RATE   (1<<(FREQ_BITS-20))
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#define TL_BITS    (FREQ_BITS+2)
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/* final output shift , limit minimum and maximum */
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#define OPL_OUTSB   (TL_BITS+3-16)                /* OPL output final shift 16bit */
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#define OPL_MAXOUT (0x7fff<<OPL_OUTSB)
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#define OPL_MINOUT (-0x8000<<OPL_OUTSB)
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/* -------------------- quality selection --------------------- */
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/* sinwave entries */
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/* used static memory = SIN_ENT * 4 (byte) */
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#define SIN_ENT 2048
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/* output level entries (envelope,sinwave) */
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/* envelope counter lower bits */
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#define ENV_BITS 16
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/* envelope output entries */
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#define EG_ENT   4096
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/* used dynamic memory = EG_ENT*4*4(byte)or EG_ENT*6*4(byte) */
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/* used static  memory = EG_ENT*4 (byte)                     */
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#define EG_OFF   ((2*EG_ENT)<<ENV_BITS)  /* OFF          */
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#define EG_DED   EG_OFF
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#define EG_DST   (EG_ENT<<ENV_BITS)      /* DECAY  START */
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#define EG_AED   EG_DST
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#define EG_AST   0                       /* ATTACK START */
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#define EG_STEP (96.0/EG_ENT) /* OPL is 0.1875 dB step  */
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/* LFO table entries */
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#define VIB_ENT 512
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#define VIB_SHIFT (32-9)
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#define AMS_ENT 512
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#define AMS_SHIFT (32-9)
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#define VIB_RATE 256
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/* -------------------- local defines , macros --------------------- */
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/* register number to channel number , slot offset */
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#define SLOT1 0
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#define SLOT2 1
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/* envelope phase */
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#define ENV_MOD_RR  0x00
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#define ENV_MOD_DR  0x01
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#define ENV_MOD_AR  0x02
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/* -------------------- tables --------------------- */
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static const int slot_array[32]=
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{
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         0, 2, 4, 1, 3, 5,-1,-1,
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         6, 8,10, 7, 9,11,-1,-1,
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        12,14,16,13,15,17,-1,-1,
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        -1,-1,-1,-1,-1,-1,-1,-1
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};
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/* key scale level */
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/* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */
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#define DV (EG_STEP/2)
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static const UINT32 KSL_TABLE[8*16]=
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{
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        /* OCT 0 */
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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        /* OCT 1 */
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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         0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
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         1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
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        /* OCT 2 */
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         0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
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         0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
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         3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
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         4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
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        /* OCT 3 */
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         0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
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         3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
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         6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
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         7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
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        /* OCT 4 */
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         0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
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         6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
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         9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
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        10.875/DV,11.250/DV,11.625/DV,12.000/DV,
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        /* OCT 5 */
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         0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
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         9.000/DV,10.125/DV,10.875/DV,11.625/DV,
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        12.000/DV,12.750/DV,13.125/DV,13.500/DV,
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        13.875/DV,14.250/DV,14.625/DV,15.000/DV,
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        /* OCT 6 */
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         0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
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        12.000/DV,13.125/DV,13.875/DV,14.625/DV,
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        15.000/DV,15.750/DV,16.125/DV,16.500/DV,
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        16.875/DV,17.250/DV,17.625/DV,18.000/DV,
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        /* OCT 7 */
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         0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
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        15.000/DV,16.125/DV,16.875/DV,17.625/DV,
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        18.000/DV,18.750/DV,19.125/DV,19.500/DV,
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        19.875/DV,20.250/DV,20.625/DV,21.000/DV
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};
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#undef DV
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/* sustain lebel table (3db per step) */
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/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
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#define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST
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static const INT32 SL_TABLE[16]={
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 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
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 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
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};
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#undef SC
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#define TL_MAX (EG_ENT*2) /* limit(tl + ksr + envelope) + sinwave */
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/* TotalLevel : 48 24 12  6  3 1.5 0.75 (dB) */
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/* TL_TABLE[ 0      to TL_MAX          ] : plus  section */
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/* TL_TABLE[ TL_MAX to TL_MAX+TL_MAX-1 ] : minus section */
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static INT32 *TL_TABLE;
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/* pointers to TL_TABLE with sinwave output offset */
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static INT32 **SIN_TABLE;
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/* LFO table */
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static INT32 *AMS_TABLE;
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static INT32 *VIB_TABLE;
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/* envelope output curve table */
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/* attack + decay + OFF */
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static INT32 ENV_CURVE[2*EG_ENT+1];
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/* multiple table */
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#define ML 2
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static const UINT32 MUL_TABLE[16]= {
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/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */
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   0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
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   8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
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};
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#undef ML
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/* dummy attack / decay rate ( when rate == 0 ) */
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static INT32 RATE_0[16]=
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{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
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/* -------------------- static state --------------------- */
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/* lock level of common table */
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static int num_lock = 0;
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/* work table */
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static void *cur_chip = NULL;        /* current chip point */
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/* currenct chip state */
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/* static OPLSAMPLE  *bufL,*bufR; */
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static OPL_CH *S_CH;
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static OPL_CH *E_CH;
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OPL_SLOT *SLOT7_1,*SLOT7_2,*SLOT8_1,*SLOT8_2;
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static INT32 outd[1];
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static INT32 ams;
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static INT32 vib;
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INT32  *ams_table;
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INT32  *vib_table;
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static INT32 amsIncr;
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static INT32 vibIncr;
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static INT32 feedback2;                /* connect for SLOT 2 */
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/* log output level */
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#define LOG_ERR  3      /* ERROR       */
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#define LOG_WAR  2      /* WARNING     */
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#define LOG_INF  1      /* INFORMATION */
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//#define LOG_LEVEL LOG_INF
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#define LOG_LEVEL        LOG_ERR
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//#define LOG(n,x) if( (n)>=LOG_LEVEL ) logerror x
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#define LOG(n,x)
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/* --------------------- subroutines  --------------------- */
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INLINE int Limit( int val, int max, int min ) {
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        if ( val > max )
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                val = max;
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        else if ( val < min )
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                val = min;
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        return val;
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}
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/* status set and IRQ handling */
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INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag)
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{
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        /* set status flag */
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        OPL->status |= flag;
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        if(!(OPL->status & 0x80))
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        {
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                if(OPL->status & OPL->statusmask)
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                {        /* IRQ on */
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                        OPL->status |= 0x80;
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                        /* callback user interrupt handler (IRQ is OFF to ON) */
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                        if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
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                }
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        }
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}
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/* status reset and IRQ handling */
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INLINE void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
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{
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        /* reset status flag */
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        OPL->status &=~flag;
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        if((OPL->status & 0x80))
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        {
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                if (!(OPL->status & OPL->statusmask) )
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                {
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                        OPL->status &= 0x7f;
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                        /* callback user interrupt handler (IRQ is ON to OFF) */
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                        if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0);
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                }
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        }
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}
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/* IRQ mask set */
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INLINE void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
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{
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        OPL->statusmask = flag;
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        /* IRQ handling check */
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        OPL_STATUS_SET(OPL,0);
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        OPL_STATUS_RESET(OPL,0);
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}
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/* ----- key on  ----- */
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INLINE void OPL_KEYON(OPL_SLOT *SLOT)
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{
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        /* sin wave restart */
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        SLOT->Cnt = 0;
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        /* set attack */
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        SLOT->evm = ENV_MOD_AR;
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        SLOT->evs = SLOT->evsa;
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        SLOT->evc = EG_AST;
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        SLOT->eve = EG_AED;
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}
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/* ----- key off ----- */
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INLINE void OPL_KEYOFF(OPL_SLOT *SLOT)
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{
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        if( SLOT->evm > ENV_MOD_RR)
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        {
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                /* set envelope counter from envleope output */
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                SLOT->evm = ENV_MOD_RR;
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                if( !(SLOT->evc&EG_DST) )
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                        //SLOT->evc = (ENV_CURVE[SLOT->evc>>ENV_BITS]<<ENV_BITS) + EG_DST;
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                        SLOT->evc = EG_DST;
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                SLOT->eve = EG_DED;
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                SLOT->evs = SLOT->evsr;
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        }
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}
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/* ---------- calcrate Envelope Generator & Phase Generator ---------- */
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/* return : envelope output */
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INLINE UINT32 OPL_CALC_SLOT( OPL_SLOT *SLOT )
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{
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        /* calcrate envelope generator */
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        if( (SLOT->evc+=SLOT->evs) >= SLOT->eve )
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        {
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                switch( SLOT->evm ){
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                case ENV_MOD_AR: /* ATTACK -> DECAY1 */
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                        /* next DR */
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                        SLOT->evm = ENV_MOD_DR;
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                        SLOT->evc = EG_DST;
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                        SLOT->eve = SLOT->SL;
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                        SLOT->evs = SLOT->evsd;
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                        break;
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                case ENV_MOD_DR: /* DECAY -> SL or RR */
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                        SLOT->evc = SLOT->SL;
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                        SLOT->eve = EG_DED;
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                        if(SLOT->eg_typ)
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                        {
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                                SLOT->evs = 0;
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                        }
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                        else
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                        {
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                                SLOT->evm = ENV_MOD_RR;
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                                SLOT->evs = SLOT->evsr;
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                        }
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                        break;
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                case ENV_MOD_RR: /* RR -> OFF */
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                        SLOT->evc = EG_OFF;
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                        SLOT->eve = EG_OFF+1;
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                        SLOT->evs = 0;
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                        break;
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                }
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        }
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        /* calcrate envelope */
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        return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0);
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}
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/* set algorythm connection */
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static void set_algorythm( OPL_CH *CH)
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{
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        INT32 *carrier = &outd[0];
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        CH->connect1 = CH->CON ? carrier : &feedback2;
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        CH->connect2 = carrier;
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}
369 85571bc7 bellard
370 85571bc7 bellard
/* ---------- frequency counter for operater update ---------- */
371 85571bc7 bellard
INLINE void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
372 85571bc7 bellard
{
373 85571bc7 bellard
        int ksr;
374 85571bc7 bellard
375 85571bc7 bellard
        /* frequency step counter */
376 85571bc7 bellard
        SLOT->Incr = CH->fc * SLOT->mul;
377 85571bc7 bellard
        ksr = CH->kcode >> SLOT->KSR;
378 85571bc7 bellard
379 85571bc7 bellard
        if( SLOT->ksr != ksr )
380 85571bc7 bellard
        {
381 85571bc7 bellard
                SLOT->ksr = ksr;
382 85571bc7 bellard
                /* attack , decay rate recalcration */
383 85571bc7 bellard
                SLOT->evsa = SLOT->AR[ksr];
384 85571bc7 bellard
                SLOT->evsd = SLOT->DR[ksr];
385 85571bc7 bellard
                SLOT->evsr = SLOT->RR[ksr];
386 85571bc7 bellard
        }
387 85571bc7 bellard
        SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
388 85571bc7 bellard
}
389 85571bc7 bellard
390 85571bc7 bellard
/* set multi,am,vib,EG-TYP,KSR,mul */
391 85571bc7 bellard
INLINE void set_mul(FM_OPL *OPL,int slot,int v)
392 85571bc7 bellard
{
393 85571bc7 bellard
        OPL_CH   *CH   = &OPL->P_CH[slot/2];
394 85571bc7 bellard
        OPL_SLOT *SLOT = &CH->SLOT[slot&1];
395 85571bc7 bellard
396 85571bc7 bellard
        SLOT->mul    = MUL_TABLE[v&0x0f];
397 85571bc7 bellard
        SLOT->KSR    = (v&0x10) ? 0 : 2;
398 85571bc7 bellard
        SLOT->eg_typ = (v&0x20)>>5;
399 85571bc7 bellard
        SLOT->vib    = (v&0x40);
400 85571bc7 bellard
        SLOT->ams    = (v&0x80);
401 85571bc7 bellard
        CALC_FCSLOT(CH,SLOT);
402 85571bc7 bellard
}
403 85571bc7 bellard
404 85571bc7 bellard
/* set ksl & tl */
405 85571bc7 bellard
INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v)
406 85571bc7 bellard
{
407 85571bc7 bellard
        OPL_CH   *CH   = &OPL->P_CH[slot/2];
408 85571bc7 bellard
        OPL_SLOT *SLOT = &CH->SLOT[slot&1];
409 85571bc7 bellard
        int ksl = v>>6; /* 0 / 1.5 / 3 / 6 db/OCT */
410 85571bc7 bellard
411 85571bc7 bellard
        SLOT->ksl = ksl ? 3-ksl : 31;
412 85571bc7 bellard
        SLOT->TL  = (v&0x3f)*(0.75/EG_STEP); /* 0.75db step */
413 85571bc7 bellard
414 85571bc7 bellard
        if( !(OPL->mode&0x80) )
415 85571bc7 bellard
        {        /* not CSM latch total level */
416 85571bc7 bellard
                SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
417 85571bc7 bellard
        }
418 85571bc7 bellard
}
419 85571bc7 bellard
420 85571bc7 bellard
/* set attack rate & decay rate  */
421 85571bc7 bellard
INLINE void set_ar_dr(FM_OPL *OPL,int slot,int v)
422 85571bc7 bellard
{
423 85571bc7 bellard
        OPL_CH   *CH   = &OPL->P_CH[slot/2];
424 85571bc7 bellard
        OPL_SLOT *SLOT = &CH->SLOT[slot&1];
425 85571bc7 bellard
        int ar = v>>4;
426 85571bc7 bellard
        int dr = v&0x0f;
427 85571bc7 bellard
428 85571bc7 bellard
        SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0;
429 85571bc7 bellard
        SLOT->evsa = SLOT->AR[SLOT->ksr];
430 85571bc7 bellard
        if( SLOT->evm == ENV_MOD_AR ) SLOT->evs = SLOT->evsa;
431 85571bc7 bellard
432 85571bc7 bellard
        SLOT->DR = dr ? &OPL->DR_TABLE[dr<<2] : RATE_0;
433 85571bc7 bellard
        SLOT->evsd = SLOT->DR[SLOT->ksr];
434 85571bc7 bellard
        if( SLOT->evm == ENV_MOD_DR ) SLOT->evs = SLOT->evsd;
435 85571bc7 bellard
}
436 85571bc7 bellard
437 85571bc7 bellard
/* set sustain level & release rate */
438 85571bc7 bellard
INLINE void set_sl_rr(FM_OPL *OPL,int slot,int v)
439 85571bc7 bellard
{
440 85571bc7 bellard
        OPL_CH   *CH   = &OPL->P_CH[slot/2];
441 85571bc7 bellard
        OPL_SLOT *SLOT = &CH->SLOT[slot&1];
442 85571bc7 bellard
        int sl = v>>4;
443 85571bc7 bellard
        int rr = v & 0x0f;
444 85571bc7 bellard
445 85571bc7 bellard
        SLOT->SL = SL_TABLE[sl];
446 85571bc7 bellard
        if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL;
447 85571bc7 bellard
        SLOT->RR = &OPL->DR_TABLE[rr<<2];
448 85571bc7 bellard
        SLOT->evsr = SLOT->RR[SLOT->ksr];
449 85571bc7 bellard
        if( SLOT->evm == ENV_MOD_RR ) SLOT->evs = SLOT->evsr;
450 85571bc7 bellard
}
451 85571bc7 bellard
452 85571bc7 bellard
/* operator output calcrator */
453 85571bc7 bellard
#define OP_OUT(slot,env,con)   slot->wavetable[((slot->Cnt+con)/(0x1000000/SIN_ENT))&(SIN_ENT-1)][env]
454 85571bc7 bellard
/* ---------- calcrate one of channel ---------- */
455 85571bc7 bellard
INLINE void OPL_CALC_CH( OPL_CH *CH )
456 85571bc7 bellard
{
457 85571bc7 bellard
        UINT32 env_out;
458 85571bc7 bellard
        OPL_SLOT *SLOT;
459 85571bc7 bellard
460 85571bc7 bellard
        feedback2 = 0;
461 85571bc7 bellard
        /* SLOT 1 */
462 85571bc7 bellard
        SLOT = &CH->SLOT[SLOT1];
463 85571bc7 bellard
        env_out=OPL_CALC_SLOT(SLOT);
464 85571bc7 bellard
        if( env_out < EG_ENT-1 )
465 85571bc7 bellard
        {
466 85571bc7 bellard
                /* PG */
467 85571bc7 bellard
                if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
468 85571bc7 bellard
                else          SLOT->Cnt += SLOT->Incr;
469 85571bc7 bellard
                /* connectoion */
470 85571bc7 bellard
                if(CH->FB)
471 85571bc7 bellard
                {
472 85571bc7 bellard
                        int feedback1 = (CH->op1_out[0]+CH->op1_out[1])>>CH->FB;
473 85571bc7 bellard
                        CH->op1_out[1] = CH->op1_out[0];
474 85571bc7 bellard
                        *CH->connect1 += CH->op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
475 85571bc7 bellard
                }
476 85571bc7 bellard
                else
477 85571bc7 bellard
                {
478 85571bc7 bellard
                        *CH->connect1 += OP_OUT(SLOT,env_out,0);
479 85571bc7 bellard
                }
480 85571bc7 bellard
        }else
481 85571bc7 bellard
        {
482 85571bc7 bellard
                CH->op1_out[1] = CH->op1_out[0];
483 85571bc7 bellard
                CH->op1_out[0] = 0;
484 85571bc7 bellard
        }
485 85571bc7 bellard
        /* SLOT 2 */
486 85571bc7 bellard
        SLOT = &CH->SLOT[SLOT2];
487 85571bc7 bellard
        env_out=OPL_CALC_SLOT(SLOT);
488 85571bc7 bellard
        if( env_out < EG_ENT-1 )
489 85571bc7 bellard
        {
490 85571bc7 bellard
                /* PG */
491 85571bc7 bellard
                if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
492 85571bc7 bellard
                else          SLOT->Cnt += SLOT->Incr;
493 85571bc7 bellard
                /* connectoion */
494 85571bc7 bellard
                outd[0] += OP_OUT(SLOT,env_out, feedback2);
495 85571bc7 bellard
        }
496 85571bc7 bellard
}
497 85571bc7 bellard
498 85571bc7 bellard
/* ---------- calcrate rythm block ---------- */
499 85571bc7 bellard
#define WHITE_NOISE_db 6.0
500 85571bc7 bellard
INLINE void OPL_CALC_RH( OPL_CH *CH )
501 85571bc7 bellard
{
502 85571bc7 bellard
        UINT32 env_tam,env_sd,env_top,env_hh;
503 85571bc7 bellard
        int whitenoise = (rand()&1)*(WHITE_NOISE_db/EG_STEP);
504 85571bc7 bellard
        INT32 tone8;
505 85571bc7 bellard
506 85571bc7 bellard
        OPL_SLOT *SLOT;
507 85571bc7 bellard
        int env_out;
508 85571bc7 bellard
509 85571bc7 bellard
        /* BD : same as FM serial mode and output level is large */
510 85571bc7 bellard
        feedback2 = 0;
511 85571bc7 bellard
        /* SLOT 1 */
512 85571bc7 bellard
        SLOT = &CH[6].SLOT[SLOT1];
513 85571bc7 bellard
        env_out=OPL_CALC_SLOT(SLOT);
514 85571bc7 bellard
        if( env_out < EG_ENT-1 )
515 85571bc7 bellard
        {
516 85571bc7 bellard
                /* PG */
517 85571bc7 bellard
                if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
518 85571bc7 bellard
                else          SLOT->Cnt += SLOT->Incr;
519 85571bc7 bellard
                /* connectoion */
520 85571bc7 bellard
                if(CH[6].FB)
521 85571bc7 bellard
                {
522 85571bc7 bellard
                        int feedback1 = (CH[6].op1_out[0]+CH[6].op1_out[1])>>CH[6].FB;
523 85571bc7 bellard
                        CH[6].op1_out[1] = CH[6].op1_out[0];
524 85571bc7 bellard
                        feedback2 = CH[6].op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
525 85571bc7 bellard
                }
526 85571bc7 bellard
                else
527 85571bc7 bellard
                {
528 85571bc7 bellard
                        feedback2 = OP_OUT(SLOT,env_out,0);
529 85571bc7 bellard
                }
530 85571bc7 bellard
        }else
531 85571bc7 bellard
        {
532 85571bc7 bellard
                feedback2 = 0;
533 85571bc7 bellard
                CH[6].op1_out[1] = CH[6].op1_out[0];
534 85571bc7 bellard
                CH[6].op1_out[0] = 0;
535 85571bc7 bellard
        }
536 85571bc7 bellard
        /* SLOT 2 */
537 85571bc7 bellard
        SLOT = &CH[6].SLOT[SLOT2];
538 85571bc7 bellard
        env_out=OPL_CALC_SLOT(SLOT);
539 85571bc7 bellard
        if( env_out < EG_ENT-1 )
540 85571bc7 bellard
        {
541 85571bc7 bellard
                /* PG */
542 85571bc7 bellard
                if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
543 85571bc7 bellard
                else          SLOT->Cnt += SLOT->Incr;
544 85571bc7 bellard
                /* connectoion */
545 85571bc7 bellard
                outd[0] += OP_OUT(SLOT,env_out, feedback2)*2;
546 85571bc7 bellard
        }
547 85571bc7 bellard
548 85571bc7 bellard
        // SD  (17) = mul14[fnum7] + white noise
549 85571bc7 bellard
        // TAM (15) = mul15[fnum8]
550 85571bc7 bellard
        // TOP (18) = fnum6(mul18[fnum8]+whitenoise)
551 85571bc7 bellard
        // HH  (14) = fnum7(mul18[fnum8]+whitenoise) + white noise
552 85571bc7 bellard
        env_sd =OPL_CALC_SLOT(SLOT7_2) + whitenoise;
553 85571bc7 bellard
        env_tam=OPL_CALC_SLOT(SLOT8_1);
554 85571bc7 bellard
        env_top=OPL_CALC_SLOT(SLOT8_2);
555 85571bc7 bellard
        env_hh =OPL_CALC_SLOT(SLOT7_1) + whitenoise;
556 85571bc7 bellard
557 85571bc7 bellard
        /* PG */
558 85571bc7 bellard
        if(SLOT7_1->vib) SLOT7_1->Cnt += (2*SLOT7_1->Incr*vib/VIB_RATE);
559 85571bc7 bellard
        else             SLOT7_1->Cnt += 2*SLOT7_1->Incr;
560 85571bc7 bellard
        if(SLOT7_2->vib) SLOT7_2->Cnt += ((CH[7].fc*8)*vib/VIB_RATE);
561 85571bc7 bellard
        else             SLOT7_2->Cnt += (CH[7].fc*8);
562 85571bc7 bellard
        if(SLOT8_1->vib) SLOT8_1->Cnt += (SLOT8_1->Incr*vib/VIB_RATE);
563 85571bc7 bellard
        else             SLOT8_1->Cnt += SLOT8_1->Incr;
564 85571bc7 bellard
        if(SLOT8_2->vib) SLOT8_2->Cnt += ((CH[8].fc*48)*vib/VIB_RATE);
565 85571bc7 bellard
        else             SLOT8_2->Cnt += (CH[8].fc*48);
566 85571bc7 bellard
567 85571bc7 bellard
        tone8 = OP_OUT(SLOT8_2,whitenoise,0 );
568 85571bc7 bellard
569 85571bc7 bellard
        /* SD */
570 85571bc7 bellard
        if( env_sd < EG_ENT-1 )
571 85571bc7 bellard
                outd[0] += OP_OUT(SLOT7_1,env_sd, 0)*8;
572 85571bc7 bellard
        /* TAM */
573 85571bc7 bellard
        if( env_tam < EG_ENT-1 )
574 85571bc7 bellard
                outd[0] += OP_OUT(SLOT8_1,env_tam, 0)*2;
575 85571bc7 bellard
        /* TOP-CY */
576 85571bc7 bellard
        if( env_top < EG_ENT-1 )
577 85571bc7 bellard
                outd[0] += OP_OUT(SLOT7_2,env_top,tone8)*2;
578 85571bc7 bellard
        /* HH */
579 85571bc7 bellard
        if( env_hh  < EG_ENT-1 )
580 85571bc7 bellard
                outd[0] += OP_OUT(SLOT7_2,env_hh,tone8)*2;
581 85571bc7 bellard
}
582 85571bc7 bellard
583 85571bc7 bellard
/* ----------- initialize time tabls ----------- */
584 85571bc7 bellard
static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE )
585 85571bc7 bellard
{
586 85571bc7 bellard
        int i;
587 85571bc7 bellard
        double rate;
588 85571bc7 bellard
589 85571bc7 bellard
        /* make attack rate & decay rate tables */
590 85571bc7 bellard
        for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0;
591 85571bc7 bellard
        for (i = 4;i <= 60;i++){
592 85571bc7 bellard
                rate  = OPL->freqbase;                                                /* frequency rate */
593 85571bc7 bellard
                if( i < 60 ) rate *= 1.0+(i&3)*0.25;                /* b0-1 : x1 , x1.25 , x1.5 , x1.75 */
594 85571bc7 bellard
                rate *= 1<<((i>>2)-1);                                                /* b2-5 : shift bit */
595 85571bc7 bellard
                rate *= (double)(EG_ENT<<ENV_BITS);
596 85571bc7 bellard
                OPL->AR_TABLE[i] = rate / ARRATE;
597 85571bc7 bellard
                OPL->DR_TABLE[i] = rate / DRRATE;
598 85571bc7 bellard
        }
599 85571bc7 bellard
        for (i = 60;i < 76;i++)
600 85571bc7 bellard
        {
601 85571bc7 bellard
                OPL->AR_TABLE[i] = EG_AED-1;
602 85571bc7 bellard
                OPL->DR_TABLE[i] = OPL->DR_TABLE[60];
603 85571bc7 bellard
        }
604 85571bc7 bellard
#if 0
605 85571bc7 bellard
        for (i = 0;i < 64 ;i++){        /* make for overflow area */
606 85571bc7 bellard
                LOG(LOG_WAR,("rate %2d , ar %f ms , dr %f ms \n",i,
607 85571bc7 bellard
                        ((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate),
608 85571bc7 bellard
                        ((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) ));
609 85571bc7 bellard
        }
610 85571bc7 bellard
#endif
611 85571bc7 bellard
}
612 85571bc7 bellard
613 85571bc7 bellard
/* ---------- generic table initialize ---------- */
614 85571bc7 bellard
static int OPLOpenTable( void )
615 85571bc7 bellard
{
616 85571bc7 bellard
        int s,t;
617 85571bc7 bellard
        double rate;
618 85571bc7 bellard
        int i,j;
619 85571bc7 bellard
        double pom;
620 85571bc7 bellard
621 85571bc7 bellard
        /* allocate dynamic tables */
622 85571bc7 bellard
        if( (TL_TABLE = malloc(TL_MAX*2*sizeof(INT32))) == NULL)
623 85571bc7 bellard
                return 0;
624 85571bc7 bellard
        if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(INT32 *))) == NULL)
625 85571bc7 bellard
        {
626 85571bc7 bellard
                free(TL_TABLE);
627 85571bc7 bellard
                return 0;
628 85571bc7 bellard
        }
629 85571bc7 bellard
        if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(INT32))) == NULL)
630 85571bc7 bellard
        {
631 85571bc7 bellard
                free(TL_TABLE);
632 85571bc7 bellard
                free(SIN_TABLE);
633 85571bc7 bellard
                return 0;
634 85571bc7 bellard
        }
635 85571bc7 bellard
        if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(INT32))) == NULL)
636 85571bc7 bellard
        {
637 85571bc7 bellard
                free(TL_TABLE);
638 85571bc7 bellard
                free(SIN_TABLE);
639 85571bc7 bellard
                free(AMS_TABLE);
640 85571bc7 bellard
                return 0;
641 85571bc7 bellard
        }
642 85571bc7 bellard
        /* make total level table */
643 85571bc7 bellard
        for (t = 0;t < EG_ENT-1 ;t++){
644 85571bc7 bellard
                rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20);        /* dB -> voltage */
645 85571bc7 bellard
                TL_TABLE[       t] =  (int)rate;
646 85571bc7 bellard
                TL_TABLE[TL_MAX+t] = -TL_TABLE[t];
647 85571bc7 bellard
/*                LOG(LOG_INF,("TotalLevel(%3d) = %x\n",t,TL_TABLE[t]));*/
648 85571bc7 bellard
        }
649 85571bc7 bellard
        /* fill volume off area */
650 85571bc7 bellard
        for ( t = EG_ENT-1; t < TL_MAX ;t++){
651 85571bc7 bellard
                TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0;
652 85571bc7 bellard
        }
653 85571bc7 bellard
654 85571bc7 bellard
        /* make sinwave table (total level offet) */
655 85571bc7 bellard
        /* degree 0 = degree 180                   = off */
656 85571bc7 bellard
        SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2]         = &TL_TABLE[EG_ENT-1];
657 85571bc7 bellard
        for (s = 1;s <= SIN_ENT/4;s++){
658 85571bc7 bellard
                pom = sin(2*PI*s/SIN_ENT); /* sin     */
659 85571bc7 bellard
                pom = 20*log10(1/pom);           /* decibel */
660 85571bc7 bellard
                j = pom / EG_STEP;         /* TL_TABLE steps */
661 85571bc7 bellard
662 85571bc7 bellard
        /* degree 0   -  90    , degree 180 -  90 : plus section */
663 85571bc7 bellard
                SIN_TABLE[          s] = SIN_TABLE[SIN_ENT/2-s] = &TL_TABLE[j];
664 85571bc7 bellard
        /* degree 180 - 270    , degree 360 - 270 : minus section */
665 85571bc7 bellard
                SIN_TABLE[SIN_ENT/2+s] = SIN_TABLE[SIN_ENT  -s] = &TL_TABLE[TL_MAX+j];
666 85571bc7 bellard
/*                LOG(LOG_INF,("sin(%3d) = %f:%f db\n",s,pom,(double)j * EG_STEP));*/
667 85571bc7 bellard
        }
668 85571bc7 bellard
        for (s = 0;s < SIN_ENT;s++)
669 85571bc7 bellard
        {
670 85571bc7 bellard
                SIN_TABLE[SIN_ENT*1+s] = s<(SIN_ENT/2) ? SIN_TABLE[s] : &TL_TABLE[EG_ENT];
671 85571bc7 bellard
                SIN_TABLE[SIN_ENT*2+s] = SIN_TABLE[s % (SIN_ENT/2)];
672 85571bc7 bellard
                SIN_TABLE[SIN_ENT*3+s] = (s/(SIN_ENT/4))&1 ? &TL_TABLE[EG_ENT] : SIN_TABLE[SIN_ENT*2+s];
673 85571bc7 bellard
        }
674 85571bc7 bellard
675 85571bc7 bellard
        /* envelope counter -> envelope output table */
676 85571bc7 bellard
        for (i=0; i<EG_ENT; i++)
677 85571bc7 bellard
        {
678 85571bc7 bellard
                /* ATTACK curve */
679 85571bc7 bellard
                pom = pow( ((double)(EG_ENT-1-i)/EG_ENT) , 8 ) * EG_ENT;
680 85571bc7 bellard
                /* if( pom >= EG_ENT ) pom = EG_ENT-1; */
681 85571bc7 bellard
                ENV_CURVE[i] = (int)pom;
682 85571bc7 bellard
                /* DECAY ,RELEASE curve */
683 85571bc7 bellard
                ENV_CURVE[(EG_DST>>ENV_BITS)+i]= i;
684 85571bc7 bellard
        }
685 85571bc7 bellard
        /* off */
686 85571bc7 bellard
        ENV_CURVE[EG_OFF>>ENV_BITS]= EG_ENT-1;
687 85571bc7 bellard
        /* make LFO ams table */
688 85571bc7 bellard
        for (i=0; i<AMS_ENT; i++)
689 85571bc7 bellard
        {
690 85571bc7 bellard
                pom = (1.0+sin(2*PI*i/AMS_ENT))/2; /* sin */
691 85571bc7 bellard
                AMS_TABLE[i]         = (1.0/EG_STEP)*pom; /* 1dB   */
692 85571bc7 bellard
                AMS_TABLE[AMS_ENT+i] = (4.8/EG_STEP)*pom; /* 4.8dB */
693 85571bc7 bellard
        }
694 85571bc7 bellard
        /* make LFO vibrate table */
695 85571bc7 bellard
        for (i=0; i<VIB_ENT; i++)
696 85571bc7 bellard
        {
697 85571bc7 bellard
                /* 100cent = 1seminote = 6% ?? */
698 85571bc7 bellard
                pom = (double)VIB_RATE*0.06*sin(2*PI*i/VIB_ENT); /* +-100sect step */
699 85571bc7 bellard
                VIB_TABLE[i]         = VIB_RATE + (pom*0.07); /* +- 7cent */
700 85571bc7 bellard
                VIB_TABLE[VIB_ENT+i] = VIB_RATE + (pom*0.14); /* +-14cent */
701 85571bc7 bellard
                /* LOG(LOG_INF,("vib %d=%d\n",i,VIB_TABLE[VIB_ENT+i])); */
702 85571bc7 bellard
        }
703 85571bc7 bellard
        return 1;
704 85571bc7 bellard
}
705 85571bc7 bellard
706 85571bc7 bellard
707 85571bc7 bellard
static void OPLCloseTable( void )
708 85571bc7 bellard
{
709 85571bc7 bellard
        free(TL_TABLE);
710 85571bc7 bellard
        free(SIN_TABLE);
711 85571bc7 bellard
        free(AMS_TABLE);
712 85571bc7 bellard
        free(VIB_TABLE);
713 85571bc7 bellard
}
714 85571bc7 bellard
715 85571bc7 bellard
/* CSM Key Controll */
716 85571bc7 bellard
INLINE void CSMKeyControll(OPL_CH *CH)
717 85571bc7 bellard
{
718 85571bc7 bellard
        OPL_SLOT *slot1 = &CH->SLOT[SLOT1];
719 85571bc7 bellard
        OPL_SLOT *slot2 = &CH->SLOT[SLOT2];
720 85571bc7 bellard
        /* all key off */
721 85571bc7 bellard
        OPL_KEYOFF(slot1);
722 85571bc7 bellard
        OPL_KEYOFF(slot2);
723 85571bc7 bellard
        /* total level latch */
724 85571bc7 bellard
        slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
725 85571bc7 bellard
        slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
726 85571bc7 bellard
        /* key on */
727 85571bc7 bellard
        CH->op1_out[0] = CH->op1_out[1] = 0;
728 85571bc7 bellard
        OPL_KEYON(slot1);
729 85571bc7 bellard
        OPL_KEYON(slot2);
730 85571bc7 bellard
}
731 85571bc7 bellard
732 85571bc7 bellard
/* ---------- opl initialize ---------- */
733 85571bc7 bellard
static void OPL_initalize(FM_OPL *OPL)
734 85571bc7 bellard
{
735 85571bc7 bellard
        int fn;
736 85571bc7 bellard
737 85571bc7 bellard
        /* frequency base */
738 85571bc7 bellard
        OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / OPL->rate) / 72  : 0;
739 85571bc7 bellard
        /* Timer base time */
740 85571bc7 bellard
        OPL->TimerBase = 1.0/((double)OPL->clock / 72.0 );
741 85571bc7 bellard
        /* make time tables */
742 85571bc7 bellard
        init_timetables( OPL , OPL_ARRATE , OPL_DRRATE );
743 85571bc7 bellard
        /* make fnumber -> increment counter table */
744 85571bc7 bellard
        for( fn=0 ; fn < 1024 ; fn++ )
745 85571bc7 bellard
        {
746 85571bc7 bellard
                OPL->FN_TABLE[fn] = OPL->freqbase * fn * FREQ_RATE * (1<<7) / 2;
747 85571bc7 bellard
        }
748 85571bc7 bellard
        /* LFO freq.table */
749 85571bc7 bellard
        OPL->amsIncr = OPL->rate ? (double)AMS_ENT*(1<<AMS_SHIFT) / OPL->rate * 3.7 * ((double)OPL->clock/3600000) : 0;
750 85571bc7 bellard
        OPL->vibIncr = OPL->rate ? (double)VIB_ENT*(1<<VIB_SHIFT) / OPL->rate * 6.4 * ((double)OPL->clock/3600000) : 0;
751 85571bc7 bellard
}
752 85571bc7 bellard
753 85571bc7 bellard
/* ---------- write a OPL registers ---------- */
754 85571bc7 bellard
static void OPLWriteReg(FM_OPL *OPL, int r, int v)
755 85571bc7 bellard
{
756 85571bc7 bellard
        OPL_CH *CH;
757 85571bc7 bellard
        int slot;
758 85571bc7 bellard
        int block_fnum;
759 85571bc7 bellard
760 85571bc7 bellard
        switch(r&0xe0)
761 85571bc7 bellard
        {
762 85571bc7 bellard
        case 0x00: /* 00-1f:controll */
763 85571bc7 bellard
                switch(r&0x1f)
764 85571bc7 bellard
                {
765 85571bc7 bellard
                case 0x01:
766 85571bc7 bellard
                        /* wave selector enable */
767 85571bc7 bellard
                        if(OPL->type&OPL_TYPE_WAVESEL)
768 85571bc7 bellard
                        {
769 85571bc7 bellard
                                OPL->wavesel = v&0x20;
770 85571bc7 bellard
                                if(!OPL->wavesel)
771 85571bc7 bellard
                                {
772 85571bc7 bellard
                                        /* preset compatible mode */
773 85571bc7 bellard
                                        int c;
774 85571bc7 bellard
                                        for(c=0;c<OPL->max_ch;c++)
775 85571bc7 bellard
                                        {
776 85571bc7 bellard
                                                OPL->P_CH[c].SLOT[SLOT1].wavetable = &SIN_TABLE[0];
777 85571bc7 bellard
                                                OPL->P_CH[c].SLOT[SLOT2].wavetable = &SIN_TABLE[0];
778 85571bc7 bellard
                                        }
779 85571bc7 bellard
                                }
780 85571bc7 bellard
                        }
781 85571bc7 bellard
                        return;
782 85571bc7 bellard
                case 0x02:        /* Timer 1 */
783 85571bc7 bellard
                        OPL->T[0] = (256-v)*4;
784 85571bc7 bellard
                        break;
785 85571bc7 bellard
                case 0x03:        /* Timer 2 */
786 85571bc7 bellard
                        OPL->T[1] = (256-v)*16;
787 85571bc7 bellard
                        return;
788 85571bc7 bellard
                case 0x04:        /* IRQ clear / mask and Timer enable */
789 85571bc7 bellard
                        if(v&0x80)
790 85571bc7 bellard
                        {        /* IRQ flag clear */
791 85571bc7 bellard
                                OPL_STATUS_RESET(OPL,0x7f);
792 85571bc7 bellard
                        }
793 85571bc7 bellard
                        else
794 85571bc7 bellard
                        {        /* set IRQ mask ,timer enable*/
795 85571bc7 bellard
                                UINT8 st1 = v&1;
796 85571bc7 bellard
                                UINT8 st2 = (v>>1)&1;
797 85571bc7 bellard
                                /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
798 85571bc7 bellard
                                OPL_STATUS_RESET(OPL,v&0x78);
799 85571bc7 bellard
                                OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01);
800 85571bc7 bellard
                                /* timer 2 */
801 85571bc7 bellard
                                if(OPL->st[1] != st2)
802 85571bc7 bellard
                                {
803 85571bc7 bellard
                                        double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
804 85571bc7 bellard
                                        OPL->st[1] = st2;
805 85571bc7 bellard
                                        if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+1,interval);
806 85571bc7 bellard
                                }
807 85571bc7 bellard
                                /* timer 1 */
808 85571bc7 bellard
                                if(OPL->st[0] != st1)
809 85571bc7 bellard
                                {
810 85571bc7 bellard
                                        double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
811 85571bc7 bellard
                                        OPL->st[0] = st1;
812 85571bc7 bellard
                                        if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+0,interval);
813 85571bc7 bellard
                                }
814 85571bc7 bellard
                        }
815 85571bc7 bellard
                        return;
816 85571bc7 bellard
#if BUILD_Y8950
817 85571bc7 bellard
                case 0x06:                /* Key Board OUT */
818 85571bc7 bellard
                        if(OPL->type&OPL_TYPE_KEYBOARD)
819 85571bc7 bellard
                        {
820 85571bc7 bellard
                                if(OPL->keyboardhandler_w)
821 85571bc7 bellard
                                        OPL->keyboardhandler_w(OPL->keyboard_param,v);
822 85571bc7 bellard
                                else
823 85571bc7 bellard
                                        LOG(LOG_WAR,("OPL:write unmapped KEYBOARD port\n"));
824 85571bc7 bellard
                        }
825 85571bc7 bellard
                        return;
826 85571bc7 bellard
                case 0x07:        /* DELTA-T controll : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
827 85571bc7 bellard
                        if(OPL->type&OPL_TYPE_ADPCM)
828 85571bc7 bellard
                                YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
829 85571bc7 bellard
                        return;
830 85571bc7 bellard
                case 0x08:        /* MODE,DELTA-T : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
831 85571bc7 bellard
                        OPL->mode = v;
832 85571bc7 bellard
                        v&=0x1f;        /* for DELTA-T unit */
833 85571bc7 bellard
                case 0x09:                /* START ADD */
834 85571bc7 bellard
                case 0x0a:
835 85571bc7 bellard
                case 0x0b:                /* STOP ADD  */
836 85571bc7 bellard
                case 0x0c:
837 85571bc7 bellard
                case 0x0d:                /* PRESCALE   */
838 85571bc7 bellard
                case 0x0e:
839 85571bc7 bellard
                case 0x0f:                /* ADPCM data */
840 85571bc7 bellard
                case 0x10:                 /* DELTA-N    */
841 85571bc7 bellard
                case 0x11:                 /* DELTA-N    */
842 85571bc7 bellard
                case 0x12:                 /* EG-CTRL    */
843 85571bc7 bellard
                        if(OPL->type&OPL_TYPE_ADPCM)
844 85571bc7 bellard
                                YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
845 85571bc7 bellard
                        return;
846 85571bc7 bellard
#if 0
847 85571bc7 bellard
                case 0x15:                /* DAC data    */
848 85571bc7 bellard
                case 0x16:
849 85571bc7 bellard
                case 0x17:                /* SHIFT    */
850 85571bc7 bellard
                        return;
851 85571bc7 bellard
                case 0x18:                /* I/O CTRL (Direction) */
852 85571bc7 bellard
                        if(OPL->type&OPL_TYPE_IO)
853 85571bc7 bellard
                                OPL->portDirection = v&0x0f;
854 85571bc7 bellard
                        return;
855 85571bc7 bellard
                case 0x19:                /* I/O DATA */
856 85571bc7 bellard
                        if(OPL->type&OPL_TYPE_IO)
857 85571bc7 bellard
                        {
858 85571bc7 bellard
                                OPL->portLatch = v;
859 85571bc7 bellard
                                if(OPL->porthandler_w)
860 85571bc7 bellard
                                        OPL->porthandler_w(OPL->port_param,v&OPL->portDirection);
861 85571bc7 bellard
                        }
862 85571bc7 bellard
                        return;
863 85571bc7 bellard
                case 0x1a:                /* PCM data */
864 85571bc7 bellard
                        return;
865 85571bc7 bellard
#endif
866 85571bc7 bellard
#endif
867 85571bc7 bellard
                }
868 85571bc7 bellard
                break;
869 85571bc7 bellard
        case 0x20:        /* am,vib,ksr,eg type,mul */
870 85571bc7 bellard
                slot = slot_array[r&0x1f];
871 85571bc7 bellard
                if(slot == -1) return;
872 85571bc7 bellard
                set_mul(OPL,slot,v);
873 85571bc7 bellard
                return;
874 85571bc7 bellard
        case 0x40:
875 85571bc7 bellard
                slot = slot_array[r&0x1f];
876 85571bc7 bellard
                if(slot == -1) return;
877 85571bc7 bellard
                set_ksl_tl(OPL,slot,v);
878 85571bc7 bellard
                return;
879 85571bc7 bellard
        case 0x60:
880 85571bc7 bellard
                slot = slot_array[r&0x1f];
881 85571bc7 bellard
                if(slot == -1) return;
882 85571bc7 bellard
                set_ar_dr(OPL,slot,v);
883 85571bc7 bellard
                return;
884 85571bc7 bellard
        case 0x80:
885 85571bc7 bellard
                slot = slot_array[r&0x1f];
886 85571bc7 bellard
                if(slot == -1) return;
887 85571bc7 bellard
                set_sl_rr(OPL,slot,v);
888 85571bc7 bellard
                return;
889 85571bc7 bellard
        case 0xa0:
890 85571bc7 bellard
                switch(r)
891 85571bc7 bellard
                {
892 85571bc7 bellard
                case 0xbd:
893 85571bc7 bellard
                        /* amsep,vibdep,r,bd,sd,tom,tc,hh */
894 85571bc7 bellard
                        {
895 85571bc7 bellard
                        UINT8 rkey = OPL->rythm^v;
896 85571bc7 bellard
                        OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0];
897 85571bc7 bellard
                        OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0];
898 85571bc7 bellard
                        OPL->rythm  = v&0x3f;
899 85571bc7 bellard
                        if(OPL->rythm&0x20)
900 85571bc7 bellard
                        {
901 85571bc7 bellard
#if 0
902 85571bc7 bellard
                                usrintf_showmessage("OPL Rythm mode select");
903 85571bc7 bellard
#endif
904 85571bc7 bellard
                                /* BD key on/off */
905 85571bc7 bellard
                                if(rkey&0x10)
906 85571bc7 bellard
                                {
907 85571bc7 bellard
                                        if(v&0x10)
908 85571bc7 bellard
                                        {
909 85571bc7 bellard
                                                OPL->P_CH[6].op1_out[0] = OPL->P_CH[6].op1_out[1] = 0;
910 85571bc7 bellard
                                                OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT1]);
911 85571bc7 bellard
                                                OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT2]);
912 85571bc7 bellard
                                        }
913 85571bc7 bellard
                                        else
914 85571bc7 bellard
                                        {
915 85571bc7 bellard
                                                OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1]);
916 85571bc7 bellard
                                                OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2]);
917 85571bc7 bellard
                                        }
918 85571bc7 bellard
                                }
919 85571bc7 bellard
                                /* SD key on/off */
920 85571bc7 bellard
                                if(rkey&0x08)
921 85571bc7 bellard
                                {
922 85571bc7 bellard
                                        if(v&0x08) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT2]);
923 85571bc7 bellard
                                        else       OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2]);
924 85571bc7 bellard
                                }/* TAM key on/off */
925 85571bc7 bellard
                                if(rkey&0x04)
926 85571bc7 bellard
                                {
927 85571bc7 bellard
                                        if(v&0x04) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT1]);
928 85571bc7 bellard
                                        else       OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1]);
929 85571bc7 bellard
                                }
930 85571bc7 bellard
                                /* TOP-CY key on/off */
931 85571bc7 bellard
                                if(rkey&0x02)
932 85571bc7 bellard
                                {
933 85571bc7 bellard
                                        if(v&0x02) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT2]);
934 85571bc7 bellard
                                        else       OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2]);
935 85571bc7 bellard
                                }
936 85571bc7 bellard
                                /* HH key on/off */
937 85571bc7 bellard
                                if(rkey&0x01)
938 85571bc7 bellard
                                {
939 85571bc7 bellard
                                        if(v&0x01) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT1]);
940 85571bc7 bellard
                                        else       OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1]);
941 85571bc7 bellard
                                }
942 85571bc7 bellard
                        }
943 85571bc7 bellard
                        }
944 85571bc7 bellard
                        return;
945 85571bc7 bellard
                }
946 85571bc7 bellard
                /* keyon,block,fnum */
947 85571bc7 bellard
                if( (r&0x0f) > 8) return;
948 85571bc7 bellard
                CH = &OPL->P_CH[r&0x0f];
949 85571bc7 bellard
                if(!(r&0x10))
950 85571bc7 bellard
                {        /* a0-a8 */
951 85571bc7 bellard
                        block_fnum  = (CH->block_fnum&0x1f00) | v;
952 85571bc7 bellard
                }
953 85571bc7 bellard
                else
954 85571bc7 bellard
                {        /* b0-b8 */
955 85571bc7 bellard
                        int keyon = (v>>5)&1;
956 85571bc7 bellard
                        block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
957 85571bc7 bellard
                        if(CH->keyon != keyon)
958 85571bc7 bellard
                        {
959 85571bc7 bellard
                                if( (CH->keyon=keyon) )
960 85571bc7 bellard
                                {
961 85571bc7 bellard
                                        CH->op1_out[0] = CH->op1_out[1] = 0;
962 85571bc7 bellard
                                        OPL_KEYON(&CH->SLOT[SLOT1]);
963 85571bc7 bellard
                                        OPL_KEYON(&CH->SLOT[SLOT2]);
964 85571bc7 bellard
                                }
965 85571bc7 bellard
                                else
966 85571bc7 bellard
                                {
967 85571bc7 bellard
                                        OPL_KEYOFF(&CH->SLOT[SLOT1]);
968 85571bc7 bellard
                                        OPL_KEYOFF(&CH->SLOT[SLOT2]);
969 85571bc7 bellard
                                }
970 85571bc7 bellard
                        }
971 85571bc7 bellard
                }
972 85571bc7 bellard
                /* update */
973 85571bc7 bellard
                if(CH->block_fnum != block_fnum)
974 85571bc7 bellard
                {
975 85571bc7 bellard
                        int blockRv = 7-(block_fnum>>10);
976 85571bc7 bellard
                        int fnum   = block_fnum&0x3ff;
977 85571bc7 bellard
                        CH->block_fnum = block_fnum;
978 85571bc7 bellard
979 85571bc7 bellard
                        CH->ksl_base = KSL_TABLE[block_fnum>>6];
980 85571bc7 bellard
                        CH->fc = OPL->FN_TABLE[fnum]>>blockRv;
981 85571bc7 bellard
                        CH->kcode = CH->block_fnum>>9;
982 85571bc7 bellard
                        if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1;
983 85571bc7 bellard
                        CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
984 85571bc7 bellard
                        CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
985 85571bc7 bellard
                }
986 85571bc7 bellard
                return;
987 85571bc7 bellard
        case 0xc0:
988 85571bc7 bellard
                /* FB,C */
989 85571bc7 bellard
                if( (r&0x0f) > 8) return;
990 85571bc7 bellard
                CH = &OPL->P_CH[r&0x0f];
991 85571bc7 bellard
                {
992 85571bc7 bellard
                int feedback = (v>>1)&7;
993 85571bc7 bellard
                CH->FB   = feedback ? (8+1) - feedback : 0;
994 85571bc7 bellard
                CH->CON = v&1;
995 85571bc7 bellard
                set_algorythm(CH);
996 85571bc7 bellard
                }
997 85571bc7 bellard
                return;
998 85571bc7 bellard
        case 0xe0: /* wave type */
999 85571bc7 bellard
                slot = slot_array[r&0x1f];
1000 85571bc7 bellard
                if(slot == -1) return;
1001 85571bc7 bellard
                CH = &OPL->P_CH[slot/2];
1002 85571bc7 bellard
                if(OPL->wavesel)
1003 85571bc7 bellard
                {
1004 85571bc7 bellard
                        /* LOG(LOG_INF,("OPL SLOT %d wave select %d\n",slot,v&3)); */
1005 85571bc7 bellard
                        CH->SLOT[slot&1].wavetable = &SIN_TABLE[(v&0x03)*SIN_ENT];
1006 85571bc7 bellard
                }
1007 85571bc7 bellard
                return;
1008 85571bc7 bellard
        }
1009 85571bc7 bellard
}
1010 85571bc7 bellard
1011 85571bc7 bellard
/* lock/unlock for common table */
1012 85571bc7 bellard
static int OPL_LockTable(void)
1013 85571bc7 bellard
{
1014 85571bc7 bellard
        num_lock++;
1015 85571bc7 bellard
        if(num_lock>1) return 0;
1016 85571bc7 bellard
        /* first time */
1017 85571bc7 bellard
        cur_chip = NULL;
1018 85571bc7 bellard
        /* allocate total level table (128kb space) */
1019 85571bc7 bellard
        if( !OPLOpenTable() )
1020 85571bc7 bellard
        {
1021 85571bc7 bellard
                num_lock--;
1022 85571bc7 bellard
                return -1;
1023 85571bc7 bellard
        }
1024 85571bc7 bellard
        return 0;
1025 85571bc7 bellard
}
1026 85571bc7 bellard
1027 85571bc7 bellard
static void OPL_UnLockTable(void)
1028 85571bc7 bellard
{
1029 85571bc7 bellard
        if(num_lock) num_lock--;
1030 85571bc7 bellard
        if(num_lock) return;
1031 85571bc7 bellard
        /* last time */
1032 85571bc7 bellard
        cur_chip = NULL;
1033 85571bc7 bellard
        OPLCloseTable();
1034 85571bc7 bellard
}
1035 85571bc7 bellard
1036 85571bc7 bellard
#if (BUILD_YM3812 || BUILD_YM3526)
1037 85571bc7 bellard
/*******************************************************************************/
1038 85571bc7 bellard
/*                YM3812 local section                                                   */
1039 85571bc7 bellard
/*******************************************************************************/
1040 85571bc7 bellard
1041 85571bc7 bellard
/* ---------- update one of chip ----------- */
1042 85571bc7 bellard
void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length)
1043 85571bc7 bellard
{
1044 85571bc7 bellard
    int i;
1045 85571bc7 bellard
        int data;
1046 85571bc7 bellard
        OPLSAMPLE *buf = buffer;
1047 85571bc7 bellard
        UINT32 amsCnt  = OPL->amsCnt;
1048 85571bc7 bellard
        UINT32 vibCnt  = OPL->vibCnt;
1049 85571bc7 bellard
        UINT8 rythm = OPL->rythm&0x20;
1050 85571bc7 bellard
        OPL_CH *CH,*R_CH;
1051 85571bc7 bellard
1052 85571bc7 bellard
        if( (void *)OPL != cur_chip ){
1053 85571bc7 bellard
                cur_chip = (void *)OPL;
1054 85571bc7 bellard
                /* channel pointers */
1055 85571bc7 bellard
                S_CH = OPL->P_CH;
1056 85571bc7 bellard
                E_CH = &S_CH[9];
1057 85571bc7 bellard
                /* rythm slot */
1058 85571bc7 bellard
                SLOT7_1 = &S_CH[7].SLOT[SLOT1];
1059 85571bc7 bellard
                SLOT7_2 = &S_CH[7].SLOT[SLOT2];
1060 85571bc7 bellard
                SLOT8_1 = &S_CH[8].SLOT[SLOT1];
1061 85571bc7 bellard
                SLOT8_2 = &S_CH[8].SLOT[SLOT2];
1062 85571bc7 bellard
                /* LFO state */
1063 85571bc7 bellard
                amsIncr = OPL->amsIncr;
1064 85571bc7 bellard
                vibIncr = OPL->vibIncr;
1065 85571bc7 bellard
                ams_table = OPL->ams_table;
1066 85571bc7 bellard
                vib_table = OPL->vib_table;
1067 85571bc7 bellard
        }
1068 85571bc7 bellard
        R_CH = rythm ? &S_CH[6] : E_CH;
1069 85571bc7 bellard
    for( i=0; i < length ; i++ )
1070 85571bc7 bellard
        {
1071 85571bc7 bellard
                /*            channel A         channel B         channel C      */
1072 85571bc7 bellard
                /* LFO */
1073 85571bc7 bellard
                ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
1074 85571bc7 bellard
                vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
1075 85571bc7 bellard
                outd[0] = 0;
1076 85571bc7 bellard
                /* FM part */
1077 85571bc7 bellard
                for(CH=S_CH ; CH < R_CH ; CH++)
1078 85571bc7 bellard
                        OPL_CALC_CH(CH);
1079 85571bc7 bellard
                /* Rythn part */
1080 85571bc7 bellard
                if(rythm)
1081 85571bc7 bellard
                        OPL_CALC_RH(S_CH);
1082 85571bc7 bellard
                /* limit check */
1083 85571bc7 bellard
                data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
1084 85571bc7 bellard
                /* store to sound buffer */
1085 85571bc7 bellard
                buf[i] = data >> OPL_OUTSB;
1086 85571bc7 bellard
        }
1087 85571bc7 bellard
1088 85571bc7 bellard
        OPL->amsCnt = amsCnt;
1089 85571bc7 bellard
        OPL->vibCnt = vibCnt;
1090 85571bc7 bellard
#ifdef OPL_OUTPUT_LOG
1091 85571bc7 bellard
        if(opl_dbg_fp)
1092 85571bc7 bellard
        {
1093 85571bc7 bellard
                for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
1094 85571bc7 bellard
                        if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
1095 85571bc7 bellard
                fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256);
1096 85571bc7 bellard
        }
1097 85571bc7 bellard
#endif
1098 85571bc7 bellard
}
1099 85571bc7 bellard
#endif /* (BUILD_YM3812 || BUILD_YM3526) */
1100 85571bc7 bellard
1101 85571bc7 bellard
#if BUILD_Y8950
1102 85571bc7 bellard
1103 85571bc7 bellard
void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length)
1104 85571bc7 bellard
{
1105 85571bc7 bellard
    int i;
1106 85571bc7 bellard
        int data;
1107 85571bc7 bellard
        OPLSAMPLE *buf = buffer;
1108 85571bc7 bellard
        UINT32 amsCnt  = OPL->amsCnt;
1109 85571bc7 bellard
        UINT32 vibCnt  = OPL->vibCnt;
1110 85571bc7 bellard
        UINT8 rythm = OPL->rythm&0x20;
1111 85571bc7 bellard
        OPL_CH *CH,*R_CH;
1112 85571bc7 bellard
        YM_DELTAT *DELTAT = OPL->deltat;
1113 85571bc7 bellard
1114 85571bc7 bellard
        /* setup DELTA-T unit */
1115 85571bc7 bellard
        YM_DELTAT_DECODE_PRESET(DELTAT);
1116 85571bc7 bellard
1117 85571bc7 bellard
        if( (void *)OPL != cur_chip ){
1118 85571bc7 bellard
                cur_chip = (void *)OPL;
1119 85571bc7 bellard
                /* channel pointers */
1120 85571bc7 bellard
                S_CH = OPL->P_CH;
1121 85571bc7 bellard
                E_CH = &S_CH[9];
1122 85571bc7 bellard
                /* rythm slot */
1123 85571bc7 bellard
                SLOT7_1 = &S_CH[7].SLOT[SLOT1];
1124 85571bc7 bellard
                SLOT7_2 = &S_CH[7].SLOT[SLOT2];
1125 85571bc7 bellard
                SLOT8_1 = &S_CH[8].SLOT[SLOT1];
1126 85571bc7 bellard
                SLOT8_2 = &S_CH[8].SLOT[SLOT2];
1127 85571bc7 bellard
                /* LFO state */
1128 85571bc7 bellard
                amsIncr = OPL->amsIncr;
1129 85571bc7 bellard
                vibIncr = OPL->vibIncr;
1130 85571bc7 bellard
                ams_table = OPL->ams_table;
1131 85571bc7 bellard
                vib_table = OPL->vib_table;
1132 85571bc7 bellard
        }
1133 85571bc7 bellard
        R_CH = rythm ? &S_CH[6] : E_CH;
1134 85571bc7 bellard
    for( i=0; i < length ; i++ )
1135 85571bc7 bellard
        {
1136 85571bc7 bellard
                /*            channel A         channel B         channel C      */
1137 85571bc7 bellard
                /* LFO */
1138 85571bc7 bellard
                ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
1139 85571bc7 bellard
                vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
1140 85571bc7 bellard
                outd[0] = 0;
1141 85571bc7 bellard
                /* deltaT ADPCM */
1142 85571bc7 bellard
                if( DELTAT->portstate )
1143 85571bc7 bellard
                        YM_DELTAT_ADPCM_CALC(DELTAT);
1144 85571bc7 bellard
                /* FM part */
1145 85571bc7 bellard
                for(CH=S_CH ; CH < R_CH ; CH++)
1146 85571bc7 bellard
                        OPL_CALC_CH(CH);
1147 85571bc7 bellard
                /* Rythn part */
1148 85571bc7 bellard
                if(rythm)
1149 85571bc7 bellard
                        OPL_CALC_RH(S_CH);
1150 85571bc7 bellard
                /* limit check */
1151 85571bc7 bellard
                data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
1152 85571bc7 bellard
                /* store to sound buffer */
1153 85571bc7 bellard
                buf[i] = data >> OPL_OUTSB;
1154 85571bc7 bellard
        }
1155 85571bc7 bellard
        OPL->amsCnt = amsCnt;
1156 85571bc7 bellard
        OPL->vibCnt = vibCnt;
1157 85571bc7 bellard
        /* deltaT START flag */
1158 85571bc7 bellard
        if( !DELTAT->portstate )
1159 85571bc7 bellard
                OPL->status &= 0xfe;
1160 85571bc7 bellard
}
1161 85571bc7 bellard
#endif
1162 85571bc7 bellard
1163 85571bc7 bellard
/* ---------- reset one of chip ---------- */
1164 85571bc7 bellard
void OPLResetChip(FM_OPL *OPL)
1165 85571bc7 bellard
{
1166 85571bc7 bellard
        int c,s;
1167 85571bc7 bellard
        int i;
1168 85571bc7 bellard
1169 85571bc7 bellard
        /* reset chip */
1170 85571bc7 bellard
        OPL->mode   = 0;        /* normal mode */
1171 85571bc7 bellard
        OPL_STATUS_RESET(OPL,0x7f);
1172 85571bc7 bellard
        /* reset with register write */
1173 85571bc7 bellard
        OPLWriteReg(OPL,0x01,0); /* wabesel disable */
1174 85571bc7 bellard
        OPLWriteReg(OPL,0x02,0); /* Timer1 */
1175 85571bc7 bellard
        OPLWriteReg(OPL,0x03,0); /* Timer2 */
1176 85571bc7 bellard
        OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
1177 85571bc7 bellard
        for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
1178 85571bc7 bellard
        /* reset OPerator paramater */
1179 85571bc7 bellard
        for( c = 0 ; c < OPL->max_ch ; c++ )
1180 85571bc7 bellard
        {
1181 85571bc7 bellard
                OPL_CH *CH = &OPL->P_CH[c];
1182 85571bc7 bellard
                /* OPL->P_CH[c].PAN = OPN_CENTER; */
1183 85571bc7 bellard
                for(s = 0 ; s < 2 ; s++ )
1184 85571bc7 bellard
                {
1185 85571bc7 bellard
                        /* wave table */
1186 85571bc7 bellard
                        CH->SLOT[s].wavetable = &SIN_TABLE[0];
1187 85571bc7 bellard
                        /* CH->SLOT[s].evm = ENV_MOD_RR; */
1188 85571bc7 bellard
                        CH->SLOT[s].evc = EG_OFF;
1189 85571bc7 bellard
                        CH->SLOT[s].eve = EG_OFF+1;
1190 85571bc7 bellard
                        CH->SLOT[s].evs = 0;
1191 85571bc7 bellard
                }
1192 85571bc7 bellard
        }
1193 85571bc7 bellard
#if BUILD_Y8950
1194 85571bc7 bellard
        if(OPL->type&OPL_TYPE_ADPCM)
1195 85571bc7 bellard
        {
1196 85571bc7 bellard
                YM_DELTAT *DELTAT = OPL->deltat;
1197 85571bc7 bellard
1198 85571bc7 bellard
                DELTAT->freqbase = OPL->freqbase;
1199 85571bc7 bellard
                DELTAT->output_pointer = outd;
1200 85571bc7 bellard
                DELTAT->portshift = 5;
1201 85571bc7 bellard
                DELTAT->output_range = DELTAT_MIXING_LEVEL<<TL_BITS;
1202 85571bc7 bellard
                YM_DELTAT_ADPCM_Reset(DELTAT,0);
1203 85571bc7 bellard
        }
1204 85571bc7 bellard
#endif
1205 85571bc7 bellard
}
1206 85571bc7 bellard
1207 85571bc7 bellard
/* ----------  Create one of vietual YM3812 ----------       */
1208 85571bc7 bellard
/* 'rate'  is sampling rate and 'bufsiz' is the size of the  */
1209 85571bc7 bellard
FM_OPL *OPLCreate(int type, int clock, int rate)
1210 85571bc7 bellard
{
1211 85571bc7 bellard
        char *ptr;
1212 85571bc7 bellard
        FM_OPL *OPL;
1213 85571bc7 bellard
        int state_size;
1214 85571bc7 bellard
        int max_ch = 9; /* normaly 9 channels */
1215 85571bc7 bellard
1216 85571bc7 bellard
        if( OPL_LockTable() ==-1) return NULL;
1217 85571bc7 bellard
        /* allocate OPL state space */
1218 85571bc7 bellard
        state_size  = sizeof(FM_OPL);
1219 85571bc7 bellard
        state_size += sizeof(OPL_CH)*max_ch;
1220 85571bc7 bellard
#if BUILD_Y8950
1221 85571bc7 bellard
        if(type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT);
1222 85571bc7 bellard
#endif
1223 85571bc7 bellard
        /* allocate memory block */
1224 85571bc7 bellard
        ptr = malloc(state_size);
1225 85571bc7 bellard
        if(ptr==NULL) return NULL;
1226 85571bc7 bellard
        /* clear */
1227 85571bc7 bellard
        memset(ptr,0,state_size);
1228 85571bc7 bellard
        OPL        = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL);
1229 85571bc7 bellard
        OPL->P_CH  = (OPL_CH *)ptr; ptr+=sizeof(OPL_CH)*max_ch;
1230 85571bc7 bellard
#if BUILD_Y8950
1231 85571bc7 bellard
        if(type&OPL_TYPE_ADPCM) OPL->deltat = (YM_DELTAT *)ptr; ptr+=sizeof(YM_DELTAT);
1232 85571bc7 bellard
#endif
1233 85571bc7 bellard
        /* set channel state pointer */
1234 85571bc7 bellard
        OPL->type  = type;
1235 85571bc7 bellard
        OPL->clock = clock;
1236 85571bc7 bellard
        OPL->rate  = rate;
1237 85571bc7 bellard
        OPL->max_ch = max_ch;
1238 85571bc7 bellard
        /* init grobal tables */
1239 85571bc7 bellard
        OPL_initalize(OPL);
1240 85571bc7 bellard
        /* reset chip */
1241 85571bc7 bellard
        OPLResetChip(OPL);
1242 85571bc7 bellard
#ifdef OPL_OUTPUT_LOG
1243 85571bc7 bellard
        if(!opl_dbg_fp)
1244 85571bc7 bellard
        {
1245 85571bc7 bellard
                opl_dbg_fp = fopen("opllog.opl","wb");
1246 85571bc7 bellard
                opl_dbg_maxchip = 0;
1247 85571bc7 bellard
        }
1248 85571bc7 bellard
        if(opl_dbg_fp)
1249 85571bc7 bellard
        {
1250 85571bc7 bellard
                opl_dbg_opl[opl_dbg_maxchip] = OPL;
1251 85571bc7 bellard
                fprintf(opl_dbg_fp,"%c%c%c%c%c%c",0x00+opl_dbg_maxchip,
1252 85571bc7 bellard
                        type,
1253 85571bc7 bellard
                        clock&0xff,
1254 85571bc7 bellard
                        (clock/0x100)&0xff,
1255 85571bc7 bellard
                        (clock/0x10000)&0xff,
1256 85571bc7 bellard
                        (clock/0x1000000)&0xff);
1257 85571bc7 bellard
                opl_dbg_maxchip++;
1258 85571bc7 bellard
        }
1259 85571bc7 bellard
#endif
1260 85571bc7 bellard
        return OPL;
1261 85571bc7 bellard
}
1262 85571bc7 bellard
1263 85571bc7 bellard
/* ----------  Destroy one of vietual YM3812 ----------       */
1264 85571bc7 bellard
void OPLDestroy(FM_OPL *OPL)
1265 85571bc7 bellard
{
1266 85571bc7 bellard
#ifdef OPL_OUTPUT_LOG
1267 85571bc7 bellard
        if(opl_dbg_fp)
1268 85571bc7 bellard
        {
1269 85571bc7 bellard
                fclose(opl_dbg_fp);
1270 85571bc7 bellard
                opl_dbg_fp = NULL;
1271 85571bc7 bellard
        }
1272 85571bc7 bellard
#endif
1273 85571bc7 bellard
        OPL_UnLockTable();
1274 85571bc7 bellard
        free(OPL);
1275 85571bc7 bellard
}
1276 85571bc7 bellard
1277 85571bc7 bellard
/* ----------  Option handlers ----------       */
1278 85571bc7 bellard
1279 85571bc7 bellard
void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)
1280 85571bc7 bellard
{
1281 85571bc7 bellard
        OPL->TimerHandler   = TimerHandler;
1282 85571bc7 bellard
        OPL->TimerParam = channelOffset;
1283 85571bc7 bellard
}
1284 85571bc7 bellard
void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param)
1285 85571bc7 bellard
{
1286 85571bc7 bellard
        OPL->IRQHandler     = IRQHandler;
1287 85571bc7 bellard
        OPL->IRQParam = param;
1288 85571bc7 bellard
}
1289 85571bc7 bellard
void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param)
1290 85571bc7 bellard
{
1291 85571bc7 bellard
        OPL->UpdateHandler = UpdateHandler;
1292 85571bc7 bellard
        OPL->UpdateParam = param;
1293 85571bc7 bellard
}
1294 85571bc7 bellard
#if BUILD_Y8950
1295 85571bc7 bellard
void OPLSetPortHandler(FM_OPL *OPL,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param)
1296 85571bc7 bellard
{
1297 85571bc7 bellard
        OPL->porthandler_w = PortHandler_w;
1298 85571bc7 bellard
        OPL->porthandler_r = PortHandler_r;
1299 85571bc7 bellard
        OPL->port_param = param;
1300 85571bc7 bellard
}
1301 85571bc7 bellard
1302 85571bc7 bellard
void OPLSetKeyboardHandler(FM_OPL *OPL,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,int param)
1303 85571bc7 bellard
{
1304 85571bc7 bellard
        OPL->keyboardhandler_w = KeyboardHandler_w;
1305 85571bc7 bellard
        OPL->keyboardhandler_r = KeyboardHandler_r;
1306 85571bc7 bellard
        OPL->keyboard_param = param;
1307 85571bc7 bellard
}
1308 85571bc7 bellard
#endif
1309 85571bc7 bellard
/* ---------- YM3812 I/O interface ---------- */
1310 85571bc7 bellard
int OPLWrite(FM_OPL *OPL,int a,int v)
1311 85571bc7 bellard
{
1312 85571bc7 bellard
        if( !(a&1) )
1313 85571bc7 bellard
        {        /* address port */
1314 85571bc7 bellard
                OPL->address = v & 0xff;
1315 85571bc7 bellard
        }
1316 85571bc7 bellard
        else
1317 85571bc7 bellard
        {        /* data port */
1318 85571bc7 bellard
                if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1319 85571bc7 bellard
#ifdef OPL_OUTPUT_LOG
1320 85571bc7 bellard
        if(opl_dbg_fp)
1321 85571bc7 bellard
        {
1322 85571bc7 bellard
                for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
1323 85571bc7 bellard
                        if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
1324 85571bc7 bellard
                fprintf(opl_dbg_fp,"%c%c%c",0x10+opl_dbg_chip,OPL->address,v);
1325 85571bc7 bellard
        }
1326 85571bc7 bellard
#endif
1327 85571bc7 bellard
                OPLWriteReg(OPL,OPL->address,v);
1328 85571bc7 bellard
        }
1329 85571bc7 bellard
        return OPL->status>>7;
1330 85571bc7 bellard
}
1331 85571bc7 bellard
1332 85571bc7 bellard
unsigned char OPLRead(FM_OPL *OPL,int a)
1333 85571bc7 bellard
{
1334 85571bc7 bellard
        if( !(a&1) )
1335 85571bc7 bellard
        {        /* status port */
1336 85571bc7 bellard
                return OPL->status & (OPL->statusmask|0x80);
1337 85571bc7 bellard
        }
1338 85571bc7 bellard
        /* data port */
1339 85571bc7 bellard
        switch(OPL->address)
1340 85571bc7 bellard
        {
1341 85571bc7 bellard
        case 0x05: /* KeyBoard IN */
1342 85571bc7 bellard
                if(OPL->type&OPL_TYPE_KEYBOARD)
1343 85571bc7 bellard
                {
1344 85571bc7 bellard
                        if(OPL->keyboardhandler_r)
1345 85571bc7 bellard
                                return OPL->keyboardhandler_r(OPL->keyboard_param);
1346 85571bc7 bellard
                        else
1347 85571bc7 bellard
                                LOG(LOG_WAR,("OPL:read unmapped KEYBOARD port\n"));
1348 85571bc7 bellard
                }
1349 85571bc7 bellard
                return 0;
1350 85571bc7 bellard
#if 0
1351 85571bc7 bellard
        case 0x0f: /* ADPCM-DATA  */
1352 85571bc7 bellard
                return 0;
1353 85571bc7 bellard
#endif
1354 85571bc7 bellard
        case 0x19: /* I/O DATA    */
1355 85571bc7 bellard
                if(OPL->type&OPL_TYPE_IO)
1356 85571bc7 bellard
                {
1357 85571bc7 bellard
                        if(OPL->porthandler_r)
1358 85571bc7 bellard
                                return OPL->porthandler_r(OPL->port_param);
1359 85571bc7 bellard
                        else
1360 85571bc7 bellard
                                LOG(LOG_WAR,("OPL:read unmapped I/O port\n"));
1361 85571bc7 bellard
                }
1362 85571bc7 bellard
                return 0;
1363 85571bc7 bellard
        case 0x1a: /* PCM-DATA    */
1364 85571bc7 bellard
                return 0;
1365 85571bc7 bellard
        }
1366 85571bc7 bellard
        return 0;
1367 85571bc7 bellard
}
1368 85571bc7 bellard
1369 85571bc7 bellard
int OPLTimerOver(FM_OPL *OPL,int c)
1370 85571bc7 bellard
{
1371 85571bc7 bellard
        if( c )
1372 85571bc7 bellard
        {        /* Timer B */
1373 85571bc7 bellard
                OPL_STATUS_SET(OPL,0x20);
1374 85571bc7 bellard
        }
1375 85571bc7 bellard
        else
1376 85571bc7 bellard
        {        /* Timer A */
1377 85571bc7 bellard
                OPL_STATUS_SET(OPL,0x40);
1378 85571bc7 bellard
                /* CSM mode key,TL controll */
1379 85571bc7 bellard
                if( OPL->mode & 0x80 )
1380 85571bc7 bellard
                {        /* CSM mode total level latch and auto key on */
1381 85571bc7 bellard
                        int ch;
1382 85571bc7 bellard
                        if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1383 85571bc7 bellard
                        for(ch=0;ch<9;ch++)
1384 85571bc7 bellard
                                CSMKeyControll( &OPL->P_CH[ch] );
1385 85571bc7 bellard
                }
1386 85571bc7 bellard
        }
1387 85571bc7 bellard
        /* reload timer */
1388 85571bc7 bellard
        if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+c,(double)OPL->T[c]*OPL->TimerBase);
1389 85571bc7 bellard
        return OPL->status>>7;
1390 85571bc7 bellard
}