Revision 5500b06c target-arm/translate.c
| b/target-arm/translate.c | ||
|---|---|---|
| 977 | 977 |
tcg_gen_movi_i32(cpu_F1s, 0); |
| 978 | 978 |
} |
| 979 | 979 |
|
| 980 |
static inline void gen_vfp_uito(int dp) |
|
| 981 |
{
|
|
| 982 |
if (dp) |
|
| 983 |
gen_helper_vfp_uitod(cpu_F0d, cpu_F0s, cpu_env); |
|
| 984 |
else |
|
| 985 |
gen_helper_vfp_uitos(cpu_F0s, cpu_F0s, cpu_env); |
|
| 986 |
} |
|
| 987 |
|
|
| 988 |
static inline void gen_vfp_sito(int dp) |
|
| 989 |
{
|
|
| 990 |
if (dp) |
|
| 991 |
gen_helper_vfp_sitod(cpu_F0d, cpu_F0s, cpu_env); |
|
| 992 |
else |
|
| 993 |
gen_helper_vfp_sitos(cpu_F0s, cpu_F0s, cpu_env); |
|
| 994 |
} |
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| 995 |
|
|
| 996 |
static inline void gen_vfp_toui(int dp) |
|
| 997 |
{
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|
| 998 |
if (dp) |
|
| 999 |
gen_helper_vfp_touid(cpu_F0s, cpu_F0d, cpu_env); |
|
| 1000 |
else |
|
| 1001 |
gen_helper_vfp_touis(cpu_F0s, cpu_F0s, cpu_env); |
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| 980 |
#define VFP_GEN_ITOF(name) \ |
|
| 981 |
static inline void gen_vfp_##name(int dp, int neon) \ |
|
| 982 |
{ \
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| 983 |
TCGv statusptr = tcg_temp_new_i32(); \ |
|
| 984 |
int offset; \ |
|
| 985 |
if (neon) { \
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|
| 986 |
offset = offsetof(CPUState, vfp.standard_fp_status); \ |
|
| 987 |
} else { \
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|
| 988 |
offset = offsetof(CPUState, vfp.fp_status); \ |
|
| 989 |
} \ |
|
| 990 |
tcg_gen_addi_i32(statusptr, cpu_env, offset); \ |
|
| 991 |
if (dp) { \
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|
| 992 |
gen_helper_vfp_##name##d(cpu_F0d, cpu_F0s, statusptr); \ |
|
| 993 |
} else { \
|
|
| 994 |
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, statusptr); \ |
|
| 995 |
} \ |
|
| 996 |
tcg_temp_free_i32(statusptr); \ |
|
| 1002 | 997 |
} |
| 1003 | 998 |
|
| 1004 |
static inline void gen_vfp_touiz(int dp) |
|
| 1005 |
{
|
|
| 1006 |
if (dp) |
|
| 1007 |
gen_helper_vfp_touizd(cpu_F0s, cpu_F0d, cpu_env); |
|
| 1008 |
else |
|
| 1009 |
gen_helper_vfp_touizs(cpu_F0s, cpu_F0s, cpu_env); |
|
| 1010 |
} |
|
| 999 |
VFP_GEN_ITOF(uito) |
|
| 1000 |
VFP_GEN_ITOF(sito) |
|
| 1001 |
#undef VFP_GEN_ITOF |
|
| 1011 | 1002 |
|
| 1012 |
static inline void gen_vfp_tosi(int dp) |
|
| 1013 |
{
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|
| 1014 |
if (dp) |
|
| 1015 |
gen_helper_vfp_tosid(cpu_F0s, cpu_F0d, cpu_env); |
|
| 1016 |
else |
|
| 1017 |
gen_helper_vfp_tosis(cpu_F0s, cpu_F0s, cpu_env); |
|
| 1003 |
#define VFP_GEN_FTOI(name) \ |
|
| 1004 |
static inline void gen_vfp_##name(int dp, int neon) \ |
|
| 1005 |
{ \
|
|
| 1006 |
TCGv statusptr = tcg_temp_new_i32(); \ |
|
| 1007 |
int offset; \ |
|
| 1008 |
if (neon) { \
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|
| 1009 |
offset = offsetof(CPUState, vfp.standard_fp_status); \ |
|
| 1010 |
} else { \
|
|
| 1011 |
offset = offsetof(CPUState, vfp.fp_status); \ |
|
| 1012 |
} \ |
|
| 1013 |
tcg_gen_addi_i32(statusptr, cpu_env, offset); \ |
|
| 1014 |
if (dp) { \
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|
| 1015 |
gen_helper_vfp_##name##d(cpu_F0s, cpu_F0d, statusptr); \ |
|
| 1016 |
} else { \
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|
| 1017 |
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, statusptr); \ |
|
| 1018 |
} \ |
|
| 1019 |
tcg_temp_free_i32(statusptr); \ |
|
| 1018 | 1020 |
} |
| 1019 | 1021 |
|
| 1020 |
static inline void gen_vfp_tosiz(int dp) |
|
| 1021 |
{
|
|
| 1022 |
if (dp) |
|
| 1023 |
gen_helper_vfp_tosizd(cpu_F0s, cpu_F0d, cpu_env); |
|
| 1024 |
else |
|
| 1025 |
gen_helper_vfp_tosizs(cpu_F0s, cpu_F0s, cpu_env); |
|
| 1026 |
} |
|
| 1022 |
VFP_GEN_FTOI(toui) |
|
| 1023 |
VFP_GEN_FTOI(touiz) |
|
| 1024 |
VFP_GEN_FTOI(tosi) |
|
| 1025 |
VFP_GEN_FTOI(tosiz) |
|
| 1026 |
#undef VFP_GEN_FTOI |
|
| 1027 | 1027 |
|
| 1028 | 1028 |
#define VFP_GEN_FIX(name) \ |
| 1029 |
static inline void gen_vfp_##name(int dp, int shift) \ |
|
| 1029 |
static inline void gen_vfp_##name(int dp, int shift, int neon) \
|
|
| 1030 | 1030 |
{ \
|
| 1031 | 1031 |
TCGv tmp_shift = tcg_const_i32(shift); \ |
| 1032 |
if (dp) \ |
|
| 1033 |
gen_helper_vfp_##name##d(cpu_F0d, cpu_F0d, tmp_shift, cpu_env);\ |
|
| 1034 |
else \ |
|
| 1035 |
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, tmp_shift, cpu_env);\ |
|
| 1032 |
TCGv statusptr = tcg_temp_new_i32(); \ |
|
| 1033 |
int offset; \ |
|
| 1034 |
if (neon) { \
|
|
| 1035 |
offset = offsetof(CPUState, vfp.standard_fp_status); \ |
|
| 1036 |
} else { \
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|
| 1037 |
offset = offsetof(CPUState, vfp.fp_status); \ |
|
| 1038 |
} \ |
|
| 1039 |
tcg_gen_addi_i32(statusptr, cpu_env, offset); \ |
|
| 1040 |
if (dp) { \
|
|
| 1041 |
gen_helper_vfp_##name##d(cpu_F0d, cpu_F0d, tmp_shift, statusptr); \ |
|
| 1042 |
} else { \
|
|
| 1043 |
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, tmp_shift, statusptr); \ |
|
| 1044 |
} \ |
|
| 1036 | 1045 |
tcg_temp_free_i32(tmp_shift); \ |
| 1046 |
tcg_temp_free_i32(statusptr); \ |
|
| 1037 | 1047 |
} |
| 1038 | 1048 |
VFP_GEN_FIX(tosh) |
| 1039 | 1049 |
VFP_GEN_FIX(tosl) |
| ... | ... | |
| 3183 | 3193 |
gen_helper_vfp_fcvtds(cpu_F0d, cpu_F0s, cpu_env); |
| 3184 | 3194 |
break; |
| 3185 | 3195 |
case 16: /* fuito */ |
| 3186 |
gen_vfp_uito(dp); |
|
| 3196 |
gen_vfp_uito(dp, 0);
|
|
| 3187 | 3197 |
break; |
| 3188 | 3198 |
case 17: /* fsito */ |
| 3189 |
gen_vfp_sito(dp); |
|
| 3199 |
gen_vfp_sito(dp, 0);
|
|
| 3190 | 3200 |
break; |
| 3191 | 3201 |
case 20: /* fshto */ |
| 3192 | 3202 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3193 | 3203 |
return 1; |
| 3194 |
gen_vfp_shto(dp, 16 - rm); |
|
| 3204 |
gen_vfp_shto(dp, 16 - rm, 0);
|
|
| 3195 | 3205 |
break; |
| 3196 | 3206 |
case 21: /* fslto */ |
| 3197 | 3207 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3198 | 3208 |
return 1; |
| 3199 |
gen_vfp_slto(dp, 32 - rm); |
|
| 3209 |
gen_vfp_slto(dp, 32 - rm, 0);
|
|
| 3200 | 3210 |
break; |
| 3201 | 3211 |
case 22: /* fuhto */ |
| 3202 | 3212 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3203 | 3213 |
return 1; |
| 3204 |
gen_vfp_uhto(dp, 16 - rm); |
|
| 3214 |
gen_vfp_uhto(dp, 16 - rm, 0);
|
|
| 3205 | 3215 |
break; |
| 3206 | 3216 |
case 23: /* fulto */ |
| 3207 | 3217 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3208 | 3218 |
return 1; |
| 3209 |
gen_vfp_ulto(dp, 32 - rm); |
|
| 3219 |
gen_vfp_ulto(dp, 32 - rm, 0);
|
|
| 3210 | 3220 |
break; |
| 3211 | 3221 |
case 24: /* ftoui */ |
| 3212 |
gen_vfp_toui(dp); |
|
| 3222 |
gen_vfp_toui(dp, 0);
|
|
| 3213 | 3223 |
break; |
| 3214 | 3224 |
case 25: /* ftouiz */ |
| 3215 |
gen_vfp_touiz(dp); |
|
| 3225 |
gen_vfp_touiz(dp, 0);
|
|
| 3216 | 3226 |
break; |
| 3217 | 3227 |
case 26: /* ftosi */ |
| 3218 |
gen_vfp_tosi(dp); |
|
| 3228 |
gen_vfp_tosi(dp, 0);
|
|
| 3219 | 3229 |
break; |
| 3220 | 3230 |
case 27: /* ftosiz */ |
| 3221 |
gen_vfp_tosiz(dp); |
|
| 3231 |
gen_vfp_tosiz(dp, 0);
|
|
| 3222 | 3232 |
break; |
| 3223 | 3233 |
case 28: /* ftosh */ |
| 3224 | 3234 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3225 | 3235 |
return 1; |
| 3226 |
gen_vfp_tosh(dp, 16 - rm); |
|
| 3236 |
gen_vfp_tosh(dp, 16 - rm, 0);
|
|
| 3227 | 3237 |
break; |
| 3228 | 3238 |
case 29: /* ftosl */ |
| 3229 | 3239 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3230 | 3240 |
return 1; |
| 3231 |
gen_vfp_tosl(dp, 32 - rm); |
|
| 3241 |
gen_vfp_tosl(dp, 32 - rm, 0);
|
|
| 3232 | 3242 |
break; |
| 3233 | 3243 |
case 30: /* ftouh */ |
| 3234 | 3244 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3235 | 3245 |
return 1; |
| 3236 |
gen_vfp_touh(dp, 16 - rm); |
|
| 3246 |
gen_vfp_touh(dp, 16 - rm, 0);
|
|
| 3237 | 3247 |
break; |
| 3238 | 3248 |
case 31: /* ftoul */ |
| 3239 | 3249 |
if (!arm_feature(env, ARM_FEATURE_VFP3)) |
| 3240 | 3250 |
return 1; |
| 3241 |
gen_vfp_toul(dp, 32 - rm); |
|
| 3251 |
gen_vfp_toul(dp, 32 - rm, 0);
|
|
| 3242 | 3252 |
break; |
| 3243 | 3253 |
default: /* undefined */ |
| 3244 | 3254 |
printf ("rn:%d\n", rn);
|
| ... | ... | |
| 5251 | 5261 |
tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, pass)); |
| 5252 | 5262 |
if (!(op & 1)) {
|
| 5253 | 5263 |
if (u) |
| 5254 |
gen_vfp_ulto(0, shift); |
|
| 5264 |
gen_vfp_ulto(0, shift, 1);
|
|
| 5255 | 5265 |
else |
| 5256 |
gen_vfp_slto(0, shift); |
|
| 5266 |
gen_vfp_slto(0, shift, 1);
|
|
| 5257 | 5267 |
} else {
|
| 5258 | 5268 |
if (u) |
| 5259 |
gen_vfp_toul(0, shift); |
|
| 5269 |
gen_vfp_toul(0, shift, 1);
|
|
| 5260 | 5270 |
else |
| 5261 |
gen_vfp_tosl(0, shift); |
|
| 5271 |
gen_vfp_tosl(0, shift, 1);
|
|
| 5262 | 5272 |
} |
| 5263 | 5273 |
tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, pass)); |
| 5264 | 5274 |
} |
| ... | ... | |
| 6071 | 6081 |
gen_helper_rsqrte_f32(cpu_F0s, cpu_F0s, cpu_env); |
| 6072 | 6082 |
break; |
| 6073 | 6083 |
case NEON_2RM_VCVT_FS: /* VCVT.F32.S32 */ |
| 6074 |
gen_vfp_sito(0); |
|
| 6084 |
gen_vfp_sito(0, 1);
|
|
| 6075 | 6085 |
break; |
| 6076 | 6086 |
case NEON_2RM_VCVT_FU: /* VCVT.F32.U32 */ |
| 6077 |
gen_vfp_uito(0); |
|
| 6087 |
gen_vfp_uito(0, 1);
|
|
| 6078 | 6088 |
break; |
| 6079 | 6089 |
case NEON_2RM_VCVT_SF: /* VCVT.S32.F32 */ |
| 6080 |
gen_vfp_tosiz(0); |
|
| 6090 |
gen_vfp_tosiz(0, 1);
|
|
| 6081 | 6091 |
break; |
| 6082 | 6092 |
case NEON_2RM_VCVT_UF: /* VCVT.U32.F32 */ |
| 6083 |
gen_vfp_touiz(0); |
|
| 6093 |
gen_vfp_touiz(0, 1);
|
|
| 6084 | 6094 |
break; |
| 6085 | 6095 |
default: |
| 6086 | 6096 |
/* Reserved op values were caught by the |
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