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1
/*
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 *  i386 CPUID helper functions
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 *
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "cpu.h"
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#include "kvm.h"
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#include "qemu-option.h"
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#include "qemu-config.h"
29

    
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/* feature flags taken from "Intel Processor Identification and the CPUID
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 * Instruction" and AMD's "CPUID Specification".  In cases of disagreement
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 * between feature naming conventions, aliases may be added.
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 */
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static const char *feature_name[] = {
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    "fpu", "vme", "de", "pse",
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    "tsc", "msr", "pae", "mce",
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    "cx8", "apic", NULL, "sep",
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    "mtrr", "pge", "mca", "cmov",
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    "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
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    NULL, "ds" /* Intel dts */, "acpi", "mmx",
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    "fxsr", "sse", "sse2", "ss",
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    "ht" /* Intel htt */, "tm", "ia64", "pbe",
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};
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static const char *ext_feature_name[] = {
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    "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
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    "ds_cpl", "vmx", "smx", "est",
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    "tm2", "ssse3", "cid", NULL,
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    "fma", "cx16", "xtpr", "pdcm",
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    NULL, NULL, "dca", "sse4.1|sse4_1",
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    "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
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    NULL, "aes", "xsave", "osxsave",
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    "avx", NULL, NULL, "hypervisor",
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};
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static const char *ext2_feature_name[] = {
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    "fpu", "vme", "de", "pse",
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    "tsc", "msr", "pae", "mce",
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    "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
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    "mtrr", "pge", "mca", "cmov",
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    "pat", "pse36", NULL, NULL /* Linux mp */,
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    "nx" /* Intel xd */, NULL, "mmxext", "mmx",
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    "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
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    NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
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};
64
static const char *ext3_feature_name[] = {
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    "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
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    "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
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    "3dnowprefetch", "osvw", "ibs", "xop",
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    "skinit", "wdt", NULL, NULL,
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    "fma4", NULL, "cvt16", "nodeid_msr",
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    NULL, NULL, NULL, NULL,
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    NULL, NULL, NULL, NULL,
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    NULL, NULL, NULL, NULL,
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};
74

    
75
static const char *kvm_feature_name[] = {
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    "kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, NULL, NULL, NULL, NULL,
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
80
};
81

    
82
/* collects per-function cpuid data
83
 */
84
typedef struct model_features_t {
85
    uint32_t *guest_feat;
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    uint32_t *host_feat;
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    uint32_t check_feat;
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    const char **flag_names;
89
    uint32_t cpuid;
90
    } model_features_t;
91

    
92
int check_cpuid = 0;
93
int enforce_cpuid = 0;
94

    
95
static void host_cpuid(uint32_t function, uint32_t count,
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                       uint32_t *eax, uint32_t *ebx,
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                       uint32_t *ecx, uint32_t *edx)
98
{
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#if defined(CONFIG_KVM)
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    uint32_t vec[4];
101

    
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#ifdef __x86_64__
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    asm volatile("cpuid"
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                 : "=a"(vec[0]), "=b"(vec[1]),
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                   "=c"(vec[2]), "=d"(vec[3])
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                 : "0"(function), "c"(count) : "cc");
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#else
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    asm volatile("pusha \n\t"
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                 "cpuid \n\t"
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                 "mov %%eax, 0(%2) \n\t"
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                 "mov %%ebx, 4(%2) \n\t"
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                 "mov %%ecx, 8(%2) \n\t"
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                 "mov %%edx, 12(%2) \n\t"
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                 "popa"
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                 : : "a"(function), "c"(count), "S"(vec)
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                 : "memory", "cc");
117
#endif
118

    
119
    if (eax)
120
        *eax = vec[0];
121
    if (ebx)
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        *ebx = vec[1];
123
    if (ecx)
124
        *ecx = vec[2];
125
    if (edx)
126
        *edx = vec[3];
127
#endif
128
}
129

    
130
#define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
131

    
132
/* general substring compare of *[s1..e1) and *[s2..e2).  sx is start of
133
 * a substring.  ex if !NULL points to the first char after a substring,
134
 * otherwise the string is assumed to sized by a terminating nul.
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 * Return lexical ordering of *s1:*s2.
136
 */
137
static int sstrcmp(const char *s1, const char *e1, const char *s2,
138
    const char *e2)
139
{
140
    for (;;) {
141
        if (!*s1 || !*s2 || *s1 != *s2)
142
            return (*s1 - *s2);
143
        ++s1, ++s2;
144
        if (s1 == e1 && s2 == e2)
145
            return (0);
146
        else if (s1 == e1)
147
            return (*s2);
148
        else if (s2 == e2)
149
            return (*s1);
150
    }
151
}
152

    
153
/* compare *[s..e) to *altstr.  *altstr may be a simple string or multiple
154
 * '|' delimited (possibly empty) strings in which case search for a match
155
 * within the alternatives proceeds left to right.  Return 0 for success,
156
 * non-zero otherwise.
157
 */
158
static int altcmp(const char *s, const char *e, const char *altstr)
159
{
160
    const char *p, *q;
161

    
162
    for (q = p = altstr; ; ) {
163
        while (*p && *p != '|')
164
            ++p;
165
        if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
166
            return (0);
167
        if (!*p)
168
            return (1);
169
        else
170
            q = ++p;
171
    }
172
}
173

    
174
/* search featureset for flag *[s..e), if found set corresponding bit in
175
 * *pval and return success, otherwise return zero
176
 */
177
static int lookup_feature(uint32_t *pval, const char *s, const char *e,
178
    const char **featureset)
179
{
180
    uint32_t mask;
181
    const char **ppc;
182

    
183
    for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc)
184
        if (*ppc && !altcmp(s, e, *ppc)) {
185
            *pval |= mask;
186
            break;
187
        }
188
    return (mask ? 1 : 0);
189
}
190

    
191
static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
192
                                    uint32_t *ext_features,
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                                    uint32_t *ext2_features,
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                                    uint32_t *ext3_features,
195
                                    uint32_t *kvm_features)
196
{
197
    if (!lookup_feature(features, flagname, NULL, feature_name) &&
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        !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
199
        !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
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        !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
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        !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name))
202
            fprintf(stderr, "CPU feature %s not found\n", flagname);
203
}
204

    
205
typedef struct x86_def_t {
206
    struct x86_def_t *next;
207
    const char *name;
208
    uint32_t level;
209
    uint32_t vendor1, vendor2, vendor3;
210
    int family;
211
    int model;
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    int stepping;
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    uint32_t features, ext_features, ext2_features, ext3_features, kvm_features;
214
    uint32_t xlevel;
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    char model_id[48];
216
    int vendor_override;
217
    uint32_t flags;
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} x86_def_t;
219

    
220
#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
221
#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
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          CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
223
#define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
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          CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
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          CPUID_PSE36 | CPUID_FXSR)
226
#define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
227
#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
228
          CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
229
          CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
230
          CPUID_PAE | CPUID_SEP | CPUID_APIC)
231
#define EXT2_FEATURE_MASK 0x0183F3FF
232

    
233
#define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
234
          CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
235
          CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
236
          CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
237
          CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
238
#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
239
          CPUID_EXT_CX16 | CPUID_EXT_POPCNT | CPUID_EXT_XSAVE | \
240
          CPUID_EXT_HYPERVISOR)
241
#define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
242
          CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
243
          CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
244
#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
245
          CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
246

    
247
/* maintains list of cpu model definitions
248
 */
249
static x86_def_t *x86_defs = {NULL};
250

    
251
/* built-in cpu model definitions (deprecated)
252
 */
253
static x86_def_t builtin_x86_defs[] = {
254
#ifdef TARGET_X86_64
255
    {
256
        .name = "qemu64",
257
        .level = 4,
258
        .vendor1 = CPUID_VENDOR_AMD_1,
259
        .vendor2 = CPUID_VENDOR_AMD_2,
260
        .vendor3 = CPUID_VENDOR_AMD_3,
261
        .family = 6,
262
        .model = 2,
263
        .stepping = 3,
264
        .features = PPRO_FEATURES |
265
        /* these features are needed for Win64 and aren't fully implemented */
266
            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
267
        /* this feature is needed for Solaris and isn't fully implemented */
268
            CPUID_PSE36,
269
        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
270
        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
271
            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
272
        .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
273
            CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
274
        .xlevel = 0x8000000A,
275
        .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
276
    },
277
    {
278
        .name = "phenom",
279
        .level = 5,
280
        .vendor1 = CPUID_VENDOR_AMD_1,
281
        .vendor2 = CPUID_VENDOR_AMD_2,
282
        .vendor3 = CPUID_VENDOR_AMD_3,
283
        .family = 16,
284
        .model = 2,
285
        .stepping = 3,
286
        /* Missing: CPUID_VME, CPUID_HT */
287
        .features = PPRO_FEATURES |
288
            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
289
            CPUID_PSE36,
290
        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
291
            CPUID_EXT_POPCNT,
292
        /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
293
        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
294
            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
295
            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
296
            CPUID_EXT2_FFXSR,
297
        /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
298
                    CPUID_EXT3_CR8LEG,
299
                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
300
                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
301
        .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
302
            CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
303
        .xlevel = 0x8000001A,
304
        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
305
    },
306
    {
307
        .name = "core2duo",
308
        .level = 10,
309
        .family = 6,
310
        .model = 15,
311
        .stepping = 11,
312
        /* The original CPU also implements these features:
313
               CPUID_VME, CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
314
               CPUID_TM, CPUID_PBE */
315
        .features = PPRO_FEATURES |
316
            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
317
            CPUID_PSE36,
318
        /* The original CPU also implements these ext features:
319
               CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
320
               CPUID_EXT_TM2, CPUID_EXT_CX16, CPUID_EXT_XTPR, CPUID_EXT_PDCM */
321
        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
322
        .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
323
        .ext3_features = CPUID_EXT3_LAHF_LM,
324
        .xlevel = 0x80000008,
325
        .model_id = "Intel(R) Core(TM)2 Duo CPU     T7700  @ 2.40GHz",
326
    },
327
    {
328
        .name = "kvm64",
329
        .level = 5,
330
        .vendor1 = CPUID_VENDOR_INTEL_1,
331
        .vendor2 = CPUID_VENDOR_INTEL_2,
332
        .vendor3 = CPUID_VENDOR_INTEL_3,
333
        .family = 15,
334
        .model = 6,
335
        .stepping = 1,
336
        /* Missing: CPUID_VME, CPUID_HT */
337
        .features = PPRO_FEATURES |
338
            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
339
            CPUID_PSE36,
340
        /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
341
        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
342
        /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
343
        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
344
            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
345
        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
346
                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
347
                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
348
                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
349
        .ext3_features = 0,
350
        .xlevel = 0x80000008,
351
        .model_id = "Common KVM processor"
352
    },
353
#endif
354
    {
355
        .name = "qemu32",
356
        .level = 4,
357
        .family = 6,
358
        .model = 3,
359
        .stepping = 3,
360
        .features = PPRO_FEATURES,
361
        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
362
        .xlevel = 0,
363
        .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
364
    },
365
    {
366
        .name = "coreduo",
367
        .level = 10,
368
        .family = 6,
369
        .model = 14,
370
        .stepping = 8,
371
        /* The original CPU also implements these features:
372
               CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
373
               CPUID_TM, CPUID_PBE */
374
        .features = PPRO_FEATURES | CPUID_VME |
375
            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA,
376
        /* The original CPU also implements these ext features:
377
               CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
378
               CPUID_EXT_PDCM */
379
        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
380
        .ext2_features = CPUID_EXT2_NX,
381
        .xlevel = 0x80000008,
382
        .model_id = "Genuine Intel(R) CPU           T2600  @ 2.16GHz",
383
    },
384
    {
385
        .name = "486",
386
        .level = 0,
387
        .family = 4,
388
        .model = 0,
389
        .stepping = 0,
390
        .features = I486_FEATURES,
391
        .xlevel = 0,
392
    },
393
    {
394
        .name = "pentium",
395
        .level = 1,
396
        .family = 5,
397
        .model = 4,
398
        .stepping = 3,
399
        .features = PENTIUM_FEATURES,
400
        .xlevel = 0,
401
    },
402
    {
403
        .name = "pentium2",
404
        .level = 2,
405
        .family = 6,
406
        .model = 5,
407
        .stepping = 2,
408
        .features = PENTIUM2_FEATURES,
409
        .xlevel = 0,
410
    },
411
    {
412
        .name = "pentium3",
413
        .level = 2,
414
        .family = 6,
415
        .model = 7,
416
        .stepping = 3,
417
        .features = PENTIUM3_FEATURES,
418
        .xlevel = 0,
419
    },
420
    {
421
        .name = "athlon",
422
        .level = 2,
423
        .vendor1 = CPUID_VENDOR_AMD_1,
424
        .vendor2 = CPUID_VENDOR_AMD_2,
425
        .vendor3 = CPUID_VENDOR_AMD_3,
426
        .family = 6,
427
        .model = 2,
428
        .stepping = 3,
429
        .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
430
        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
431
        .xlevel = 0x80000008,
432
        /* XXX: put another string ? */
433
        .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
434
    },
435
    {
436
        .name = "n270",
437
        /* original is on level 10 */
438
        .level = 5,
439
        .family = 6,
440
        .model = 28,
441
        .stepping = 2,
442
        .features = PPRO_FEATURES |
443
            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME,
444
            /* Missing: CPUID_DTS | CPUID_ACPI | CPUID_SS |
445
             * CPUID_HT | CPUID_TM | CPUID_PBE */
446
            /* Some CPUs got no CPUID_SEP */
447
        .ext_features = CPUID_EXT_MONITOR |
448
            CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
449
            /* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
450
             * CPUID_EXT_TM2 | CPUID_EXT_XTPR */
451
        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
452
        /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
453
        .xlevel = 0x8000000A,
454
        .model_id = "Intel(R) Atom(TM) CPU N270   @ 1.60GHz",
455
    },
456
};
457

    
458
static int cpu_x86_fill_model_id(char *str)
459
{
460
    uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
461
    int i;
462

    
463
    for (i = 0; i < 3; i++) {
464
        host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
465
        memcpy(str + i * 16 +  0, &eax, 4);
466
        memcpy(str + i * 16 +  4, &ebx, 4);
467
        memcpy(str + i * 16 +  8, &ecx, 4);
468
        memcpy(str + i * 16 + 12, &edx, 4);
469
    }
470
    return 0;
471
}
472

    
473
static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
474
{
475
    uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
476

    
477
    x86_cpu_def->name = "host";
478
    host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
479
    x86_cpu_def->level = eax;
480
    x86_cpu_def->vendor1 = ebx;
481
    x86_cpu_def->vendor2 = edx;
482
    x86_cpu_def->vendor3 = ecx;
483

    
484
    host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
485
    x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
486
    x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
487
    x86_cpu_def->stepping = eax & 0x0F;
488
    x86_cpu_def->ext_features = ecx;
489
    x86_cpu_def->features = edx;
490

    
491
    host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
492
    x86_cpu_def->xlevel = eax;
493

    
494
    host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
495
    x86_cpu_def->ext2_features = edx;
496
    x86_cpu_def->ext3_features = ecx;
497
    cpu_x86_fill_model_id(x86_cpu_def->model_id);
498
    x86_cpu_def->vendor_override = 0;
499

    
500
    return 0;
501
}
502

    
503
static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
504
{
505
    int i;
506

    
507
    for (i = 0; i < 32; ++i)
508
        if (1 << i & mask) {
509
            fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
510
                " flag '%s' [0x%08x]\n",
511
                f->cpuid >> 16, f->cpuid & 0xffff,
512
                f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
513
            break;
514
        }
515
    return 0;
516
}
517

    
518
/* best effort attempt to inform user requested cpu flags aren't making
519
 * their way to the guest.  Note: ft[].check_feat ideally should be
520
 * specified via a guest_def field to suppress report of extraneous flags.
521
 */
522
static int check_features_against_host(x86_def_t *guest_def)
523
{
524
    x86_def_t host_def;
525
    uint32_t mask;
526
    int rv, i;
527
    struct model_features_t ft[] = {
528
        {&guest_def->features, &host_def.features,
529
            ~0, feature_name, 0x00000000},
530
        {&guest_def->ext_features, &host_def.ext_features,
531
            ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
532
        {&guest_def->ext2_features, &host_def.ext2_features,
533
            ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
534
        {&guest_def->ext3_features, &host_def.ext3_features,
535
            ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
536

    
537
    cpu_x86_fill_host(&host_def);
538
    for (rv = 0, i = 0; i < sizeof (ft) / sizeof (ft[0]); ++i)
539
        for (mask = 1; mask; mask <<= 1)
540
            if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
541
                !(*ft[i].host_feat & mask)) {
542
                    unavailable_host_feature(&ft[i], mask);
543
                    rv = 1;
544
                }
545
    return rv;
546
}
547

    
548
static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
549
{
550
    unsigned int i;
551
    x86_def_t *def;
552

    
553
    char *s = strdup(cpu_model);
554
    char *featurestr, *name = strtok(s, ",");
555
    uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0, plus_kvm_features = 0;
556
    uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0, minus_kvm_features = 0;
557
    uint32_t numvalue;
558

    
559
    for (def = x86_defs; def; def = def->next)
560
        if (!strcmp(name, def->name))
561
            break;
562
    if (kvm_enabled() && strcmp(name, "host") == 0) {
563
        cpu_x86_fill_host(x86_cpu_def);
564
    } else if (!def) {
565
        goto error;
566
    } else {
567
        memcpy(x86_cpu_def, def, sizeof(*def));
568
    }
569

    
570
    plus_kvm_features = ~0; /* not supported bits will be filtered out later */
571

    
572
    add_flagname_to_bitmaps("hypervisor", &plus_features,
573
        &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
574
        &plus_kvm_features);
575

    
576
    featurestr = strtok(NULL, ",");
577

    
578
    while (featurestr) {
579
        char *val;
580
        if (featurestr[0] == '+') {
581
            add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features, &plus_kvm_features);
582
        } else if (featurestr[0] == '-') {
583
            add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features, &minus_kvm_features);
584
        } else if ((val = strchr(featurestr, '='))) {
585
            *val = 0; val++;
586
            if (!strcmp(featurestr, "family")) {
587
                char *err;
588
                numvalue = strtoul(val, &err, 0);
589
                if (!*val || *err) {
590
                    fprintf(stderr, "bad numerical value %s\n", val);
591
                    goto error;
592
                }
593
                x86_cpu_def->family = numvalue;
594
            } else if (!strcmp(featurestr, "model")) {
595
                char *err;
596
                numvalue = strtoul(val, &err, 0);
597
                if (!*val || *err || numvalue > 0xff) {
598
                    fprintf(stderr, "bad numerical value %s\n", val);
599
                    goto error;
600
                }
601
                x86_cpu_def->model = numvalue;
602
            } else if (!strcmp(featurestr, "stepping")) {
603
                char *err;
604
                numvalue = strtoul(val, &err, 0);
605
                if (!*val || *err || numvalue > 0xf) {
606
                    fprintf(stderr, "bad numerical value %s\n", val);
607
                    goto error;
608
                }
609
                x86_cpu_def->stepping = numvalue ;
610
            } else if (!strcmp(featurestr, "level")) {
611
                char *err;
612
                numvalue = strtoul(val, &err, 0);
613
                if (!*val || *err) {
614
                    fprintf(stderr, "bad numerical value %s\n", val);
615
                    goto error;
616
                }
617
                x86_cpu_def->level = numvalue;
618
            } else if (!strcmp(featurestr, "xlevel")) {
619
                char *err;
620
                numvalue = strtoul(val, &err, 0);
621
                if (!*val || *err) {
622
                    fprintf(stderr, "bad numerical value %s\n", val);
623
                    goto error;
624
                }
625
                if (numvalue < 0x80000000) {
626
                        numvalue += 0x80000000;
627
                }
628
                x86_cpu_def->xlevel = numvalue;
629
            } else if (!strcmp(featurestr, "vendor")) {
630
                if (strlen(val) != 12) {
631
                    fprintf(stderr, "vendor string must be 12 chars long\n");
632
                    goto error;
633
                }
634
                x86_cpu_def->vendor1 = 0;
635
                x86_cpu_def->vendor2 = 0;
636
                x86_cpu_def->vendor3 = 0;
637
                for(i = 0; i < 4; i++) {
638
                    x86_cpu_def->vendor1 |= ((uint8_t)val[i    ]) << (8 * i);
639
                    x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
640
                    x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
641
                }
642
                x86_cpu_def->vendor_override = 1;
643
            } else if (!strcmp(featurestr, "model_id")) {
644
                pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
645
                        val);
646
            } else {
647
                fprintf(stderr, "unrecognized feature %s\n", featurestr);
648
                goto error;
649
            }
650
        } else if (!strcmp(featurestr, "check")) {
651
            check_cpuid = 1;
652
        } else if (!strcmp(featurestr, "enforce")) {
653
            check_cpuid = enforce_cpuid = 1;
654
        } else {
655
            fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
656
            goto error;
657
        }
658
        featurestr = strtok(NULL, ",");
659
    }
660
    x86_cpu_def->features |= plus_features;
661
    x86_cpu_def->ext_features |= plus_ext_features;
662
    x86_cpu_def->ext2_features |= plus_ext2_features;
663
    x86_cpu_def->ext3_features |= plus_ext3_features;
664
    x86_cpu_def->kvm_features |= plus_kvm_features;
665
    x86_cpu_def->features &= ~minus_features;
666
    x86_cpu_def->ext_features &= ~minus_ext_features;
667
    x86_cpu_def->ext2_features &= ~minus_ext2_features;
668
    x86_cpu_def->ext3_features &= ~minus_ext3_features;
669
    x86_cpu_def->kvm_features &= ~minus_kvm_features;
670
    if (check_cpuid) {
671
        if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
672
            goto error;
673
    }
674
    free(s);
675
    return 0;
676

    
677
error:
678
    free(s);
679
    return -1;
680
}
681

    
682
/* generate a composite string into buf of all cpuid names in featureset
683
 * selected by fbits.  indicate truncation at bufsize in the event of overflow.
684
 * if flags, suppress names undefined in featureset.
685
 */
686
static void listflags(char *buf, int bufsize, uint32_t fbits,
687
    const char **featureset, uint32_t flags)
688
{
689
    const char **p = &featureset[31];
690
    char *q, *b, bit;
691
    int nc;
692

    
693
    b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
694
    *buf = '\0';
695
    for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
696
        if (fbits & 1 << bit && (*p || !flags)) {
697
            if (*p)
698
                nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
699
            else
700
                nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
701
            if (bufsize <= nc) {
702
                if (b) {
703
                    memcpy(b, "...", sizeof("..."));
704
                }
705
                return;
706
            }
707
            q += nc;
708
            bufsize -= nc;
709
        }
710
}
711

    
712
/* generate CPU information:
713
 * -?        list model names
714
 * -?model   list model names/IDs
715
 * -?dump    output all model (x86_def_t) data
716
 * -?cpuid   list all recognized cpuid flag names
717
 */
718
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
719
                  const char *optarg)
720
{
721
    unsigned char model = !strcmp("?model", optarg);
722
    unsigned char dump = !strcmp("?dump", optarg);
723
    unsigned char cpuid = !strcmp("?cpuid", optarg);
724
    x86_def_t *def;
725
    char buf[256];
726

    
727
    if (cpuid) {
728
        (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
729
        listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
730
        (*cpu_fprintf)(f, "  f_edx: %s\n", buf);
731
        listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
732
        (*cpu_fprintf)(f, "  f_ecx: %s\n", buf);
733
        listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
734
        (*cpu_fprintf)(f, "  extf_edx: %s\n", buf);
735
        listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
736
        (*cpu_fprintf)(f, "  extf_ecx: %s\n", buf);
737
        return;
738
    }
739
    for (def = x86_defs; def; def = def->next) {
740
        snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
741
        if (model || dump) {
742
            (*cpu_fprintf)(f, "x86 %16s  %-48s\n", buf, def->model_id);
743
        } else {
744
            (*cpu_fprintf)(f, "x86 %16s\n", buf);
745
        }
746
        if (dump) {
747
            memcpy(buf, &def->vendor1, sizeof (def->vendor1));
748
            memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
749
            memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
750
            buf[12] = '\0';
751
            (*cpu_fprintf)(f,
752
                "  family %d model %d stepping %d level %d xlevel 0x%x"
753
                " vendor \"%s\"\n",
754
                def->family, def->model, def->stepping, def->level,
755
                def->xlevel, buf);
756
            listflags(buf, sizeof (buf), def->features, feature_name, 0);
757
            (*cpu_fprintf)(f, "  feature_edx %08x (%s)\n", def->features,
758
                buf);
759
            listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
760
                0);
761
            (*cpu_fprintf)(f, "  feature_ecx %08x (%s)\n", def->ext_features,
762
                buf);
763
            listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
764
                0);
765
            (*cpu_fprintf)(f, "  extfeature_edx %08x (%s)\n",
766
                def->ext2_features, buf);
767
            listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
768
                0);
769
            (*cpu_fprintf)(f, "  extfeature_ecx %08x (%s)\n",
770
                def->ext3_features, buf);
771
            (*cpu_fprintf)(f, "\n");
772
        }
773
    }
774
    if (kvm_enabled()) {
775
        (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
776
    }
777
}
778

    
779
int cpu_x86_register (CPUX86State *env, const char *cpu_model)
780
{
781
    x86_def_t def1, *def = &def1;
782

    
783
    if (cpu_x86_find_by_name(def, cpu_model) < 0)
784
        return -1;
785
    if (def->vendor1) {
786
        env->cpuid_vendor1 = def->vendor1;
787
        env->cpuid_vendor2 = def->vendor2;
788
        env->cpuid_vendor3 = def->vendor3;
789
    } else {
790
        env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
791
        env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
792
        env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
793
    }
794
    env->cpuid_vendor_override = def->vendor_override;
795
    env->cpuid_level = def->level;
796
    if (def->family > 0x0f)
797
        env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
798
    else
799
        env->cpuid_version = def->family << 8;
800
    env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
801
    env->cpuid_version |= def->stepping;
802
    env->cpuid_features = def->features;
803
    env->pat = 0x0007040600070406ULL;
804
    env->cpuid_ext_features = def->ext_features;
805
    env->cpuid_ext2_features = def->ext2_features;
806
    env->cpuid_ext3_features = def->ext3_features;
807
    env->cpuid_xlevel = def->xlevel;
808
    env->cpuid_kvm_features = def->kvm_features;
809
    if (!kvm_enabled()) {
810
        env->cpuid_features &= TCG_FEATURES;
811
        env->cpuid_ext_features &= TCG_EXT_FEATURES;
812
        env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
813
#ifdef TARGET_X86_64
814
            | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
815
#endif
816
            );
817
        env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
818
    }
819
    {
820
        const char *model_id = def->model_id;
821
        int c, len, i;
822
        if (!model_id)
823
            model_id = "";
824
        len = strlen(model_id);
825
        for(i = 0; i < 48; i++) {
826
            if (i >= len)
827
                c = '\0';
828
            else
829
                c = (uint8_t)model_id[i];
830
            env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
831
        }
832
    }
833
    return 0;
834
}
835

    
836
#if !defined(CONFIG_USER_ONLY)
837
/* copy vendor id string to 32 bit register, nul pad as needed
838
 */
839
static void cpyid(const char *s, uint32_t *id)
840
{
841
    char *d = (char *)id;
842
    char i;
843

    
844
    for (i = sizeof (*id); i--; )
845
        *d++ = *s ? *s++ : '\0';
846
}
847

    
848
/* interpret radix and convert from string to arbitrary scalar,
849
 * otherwise flag failure
850
 */
851
#define setscalar(pval, str, perr)                      \
852
{                                                       \
853
    char *pend;                                         \
854
    unsigned long ul;                                   \
855
                                                        \
856
    ul = strtoul(str, &pend, 0);                        \
857
    *str && !*pend ? (*pval = ul) : (*perr = 1);        \
858
}
859

    
860
/* map cpuid options to feature bits, otherwise return failure
861
 * (option tags in *str are delimited by whitespace)
862
 */
863
static void setfeatures(uint32_t *pval, const char *str,
864
    const char **featureset, int *perr)
865
{
866
    const char *p, *q;
867

    
868
    for (q = p = str; *p || *q; q = p) {
869
        while (iswhite(*p))
870
            q = ++p;
871
        while (*p && !iswhite(*p))
872
            ++p;
873
        if (!*q && !*p)
874
            return;
875
        if (!lookup_feature(pval, q, p, featureset)) {
876
            fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
877
                (int)(p - q), q);
878
            *perr = 1;
879
            return;
880
        }
881
    }
882
}
883

    
884
/* map config file options to x86_def_t form
885
 */
886
static int cpudef_setfield(const char *name, const char *str, void *opaque)
887
{
888
    x86_def_t *def = opaque;
889
    int err = 0;
890

    
891
    if (!strcmp(name, "name")) {
892
        def->name = strdup(str);
893
    } else if (!strcmp(name, "model_id")) {
894
        strncpy(def->model_id, str, sizeof (def->model_id));
895
    } else if (!strcmp(name, "level")) {
896
        setscalar(&def->level, str, &err)
897
    } else if (!strcmp(name, "vendor")) {
898
        cpyid(&str[0], &def->vendor1);
899
        cpyid(&str[4], &def->vendor2);
900
        cpyid(&str[8], &def->vendor3);
901
    } else if (!strcmp(name, "family")) {
902
        setscalar(&def->family, str, &err)
903
    } else if (!strcmp(name, "model")) {
904
        setscalar(&def->model, str, &err)
905
    } else if (!strcmp(name, "stepping")) {
906
        setscalar(&def->stepping, str, &err)
907
    } else if (!strcmp(name, "feature_edx")) {
908
        setfeatures(&def->features, str, feature_name, &err);
909
    } else if (!strcmp(name, "feature_ecx")) {
910
        setfeatures(&def->ext_features, str, ext_feature_name, &err);
911
    } else if (!strcmp(name, "extfeature_edx")) {
912
        setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
913
    } else if (!strcmp(name, "extfeature_ecx")) {
914
        setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
915
    } else if (!strcmp(name, "xlevel")) {
916
        setscalar(&def->xlevel, str, &err)
917
    } else {
918
        fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
919
        return (1);
920
    }
921
    if (err) {
922
        fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
923
        return (1);
924
    }
925
    return (0);
926
}
927

    
928
/* register config file entry as x86_def_t
929
 */
930
static int cpudef_register(QemuOpts *opts, void *opaque)
931
{
932
    x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
933

    
934
    qemu_opt_foreach(opts, cpudef_setfield, def, 1);
935
    def->next = x86_defs;
936
    x86_defs = def;
937
    return (0);
938
}
939
#endif /* !CONFIG_USER_ONLY */
940

    
941
/* register "cpudef" models defined in configuration file.  Here we first
942
 * preload any built-in definitions
943
 */
944
void x86_cpudef_setup(void)
945
{
946
    int i;
947

    
948
    for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
949
        builtin_x86_defs[i].next = x86_defs;
950
        builtin_x86_defs[i].flags = 1;
951
        x86_defs = &builtin_x86_defs[i];
952
    }
953
#if !defined(CONFIG_USER_ONLY)
954
    qemu_opts_foreach(&qemu_cpudef_opts, cpudef_register, NULL, 0);
955
#endif
956
}
957

    
958
static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
959
                             uint32_t *ecx, uint32_t *edx)
960
{
961
    *ebx = env->cpuid_vendor1;
962
    *edx = env->cpuid_vendor2;
963
    *ecx = env->cpuid_vendor3;
964

    
965
    /* sysenter isn't supported on compatibility mode on AMD, syscall
966
     * isn't supported in compatibility mode on Intel.
967
     * Normally we advertise the actual cpu vendor, but you can override
968
     * this if you want to use KVM's sysenter/syscall emulation
969
     * in compatibility mode and when doing cross vendor migration
970
     */
971
    if (kvm_enabled() && env->cpuid_vendor_override) {
972
        host_cpuid(0, 0, NULL, ebx, ecx, edx);
973
    }
974
}
975

    
976
void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
977
                   uint32_t *eax, uint32_t *ebx,
978
                   uint32_t *ecx, uint32_t *edx)
979
{
980
    /* test if maximum index reached */
981
    if (index & 0x80000000) {
982
        if (index > env->cpuid_xlevel)
983
            index = env->cpuid_level;
984
    } else {
985
        if (index > env->cpuid_level)
986
            index = env->cpuid_level;
987
    }
988

    
989
    switch(index) {
990
    case 0:
991
        *eax = env->cpuid_level;
992
        get_cpuid_vendor(env, ebx, ecx, edx);
993
        break;
994
    case 1:
995
        *eax = env->cpuid_version;
996
        *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
997
        *ecx = env->cpuid_ext_features;
998
        *edx = env->cpuid_features;
999
        if (env->nr_cores * env->nr_threads > 1) {
1000
            *ebx |= (env->nr_cores * env->nr_threads) << 16;
1001
            *edx |= 1 << 28;    /* HTT bit */
1002
        }
1003
        break;
1004
    case 2:
1005
        /* cache info: needed for Pentium Pro compatibility */
1006
        *eax = 1;
1007
        *ebx = 0;
1008
        *ecx = 0;
1009
        *edx = 0x2c307d;
1010
        break;
1011
    case 4:
1012
        /* cache info: needed for Core compatibility */
1013
        if (env->nr_cores > 1) {
1014
                *eax = (env->nr_cores - 1) << 26;
1015
        } else {
1016
                *eax = 0;
1017
        }
1018
        switch (count) {
1019
            case 0: /* L1 dcache info */
1020
                *eax |= 0x0000121;
1021
                *ebx = 0x1c0003f;
1022
                *ecx = 0x000003f;
1023
                *edx = 0x0000001;
1024
                break;
1025
            case 1: /* L1 icache info */
1026
                *eax |= 0x0000122;
1027
                *ebx = 0x1c0003f;
1028
                *ecx = 0x000003f;
1029
                *edx = 0x0000001;
1030
                break;
1031
            case 2: /* L2 cache info */
1032
                *eax |= 0x0000143;
1033
                if (env->nr_threads > 1) {
1034
                    *eax |= (env->nr_threads - 1) << 14;
1035
                }
1036
                *ebx = 0x3c0003f;
1037
                *ecx = 0x0000fff;
1038
                *edx = 0x0000001;
1039
                break;
1040
            default: /* end of info */
1041
                *eax = 0;
1042
                *ebx = 0;
1043
                *ecx = 0;
1044
                *edx = 0;
1045
                break;
1046
        }
1047
        break;
1048
    case 5:
1049
        /* mwait info: needed for Core compatibility */
1050
        *eax = 0; /* Smallest monitor-line size in bytes */
1051
        *ebx = 0; /* Largest monitor-line size in bytes */
1052
        *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1053
        *edx = 0;
1054
        break;
1055
    case 6:
1056
        /* Thermal and Power Leaf */
1057
        *eax = 0;
1058
        *ebx = 0;
1059
        *ecx = 0;
1060
        *edx = 0;
1061
        break;
1062
    case 9:
1063
        /* Direct Cache Access Information Leaf */
1064
        *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1065
        *ebx = 0;
1066
        *ecx = 0;
1067
        *edx = 0;
1068
        break;
1069
    case 0xA:
1070
        /* Architectural Performance Monitoring Leaf */
1071
        *eax = 0;
1072
        *ebx = 0;
1073
        *ecx = 0;
1074
        *edx = 0;
1075
        break;
1076
    case 0x80000000:
1077
        *eax = env->cpuid_xlevel;
1078
        *ebx = env->cpuid_vendor1;
1079
        *edx = env->cpuid_vendor2;
1080
        *ecx = env->cpuid_vendor3;
1081
        break;
1082
    case 0x80000001:
1083
        *eax = env->cpuid_version;
1084
        *ebx = 0;
1085
        *ecx = env->cpuid_ext3_features;
1086
        *edx = env->cpuid_ext2_features;
1087

    
1088
        /* The Linux kernel checks for the CMPLegacy bit and
1089
         * discards multiple thread information if it is set.
1090
         * So dont set it here for Intel to make Linux guests happy.
1091
         */
1092
        if (env->nr_cores * env->nr_threads > 1) {
1093
            uint32_t tebx, tecx, tedx;
1094
            get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1095
            if (tebx != CPUID_VENDOR_INTEL_1 ||
1096
                tedx != CPUID_VENDOR_INTEL_2 ||
1097
                tecx != CPUID_VENDOR_INTEL_3) {
1098
                *ecx |= 1 << 1;    /* CmpLegacy bit */
1099
            }
1100
        }
1101

    
1102
        if (kvm_enabled()) {
1103
            /* Nested SVM not yet supported in upstream QEMU */
1104
            *ecx &= ~CPUID_EXT3_SVM;
1105
        }
1106
        break;
1107
    case 0x80000002:
1108
    case 0x80000003:
1109
    case 0x80000004:
1110
        *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1111
        *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1112
        *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1113
        *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1114
        break;
1115
    case 0x80000005:
1116
        /* cache info (L1 cache) */
1117
        *eax = 0x01ff01ff;
1118
        *ebx = 0x01ff01ff;
1119
        *ecx = 0x40020140;
1120
        *edx = 0x40020140;
1121
        break;
1122
    case 0x80000006:
1123
        /* cache info (L2 cache) */
1124
        *eax = 0;
1125
        *ebx = 0x42004200;
1126
        *ecx = 0x02008140;
1127
        *edx = 0;
1128
        break;
1129
    case 0x80000008:
1130
        /* virtual & phys address size in low 2 bytes. */
1131
/* XXX: This value must match the one used in the MMU code. */
1132
        if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1133
            /* 64 bit processor */
1134
/* XXX: The physical address space is limited to 42 bits in exec.c. */
1135
            *eax = 0x00003028;        /* 48 bits virtual, 40 bits physical */
1136
        } else {
1137
            if (env->cpuid_features & CPUID_PSE36)
1138
                *eax = 0x00000024; /* 36 bits physical */
1139
            else
1140
                *eax = 0x00000020; /* 32 bits physical */
1141
        }
1142
        *ebx = 0;
1143
        *ecx = 0;
1144
        *edx = 0;
1145
        if (env->nr_cores * env->nr_threads > 1) {
1146
            *ecx |= (env->nr_cores * env->nr_threads) - 1;
1147
        }
1148
        break;
1149
    case 0x8000000A:
1150
        *eax = 0x00000001; /* SVM Revision */
1151
        *ebx = 0x00000010; /* nr of ASIDs */
1152
        *ecx = 0;
1153
        *edx = 0; /* optional features */
1154
        break;
1155
    default:
1156
        /* reserved values: zero */
1157
        *eax = 0;
1158
        *ebx = 0;
1159
        *ecx = 0;
1160
        *edx = 0;
1161
        break;
1162
    }
1163
}