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1 | e6e5906b | pbrook | /*
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2 | e6e5906b | pbrook | * m68k translation
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3 | 5fafdf24 | ths | *
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4 | 0633879f | pbrook | * Copyright (c) 2005-2007 CodeSourcery
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5 | e6e5906b | pbrook | * Written by Paul Brook
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6 | e6e5906b | pbrook | *
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7 | e6e5906b | pbrook | * This library is free software; you can redistribute it and/or
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8 | e6e5906b | pbrook | * modify it under the terms of the GNU Lesser General Public
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9 | e6e5906b | pbrook | * License as published by the Free Software Foundation; either
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10 | e6e5906b | pbrook | * version 2 of the License, or (at your option) any later version.
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11 | e6e5906b | pbrook | *
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12 | e6e5906b | pbrook | * This library is distributed in the hope that it will be useful,
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13 | e6e5906b | pbrook | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | e6e5906b | pbrook | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | e6e5906b | pbrook | * General Public License for more details.
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16 | e6e5906b | pbrook | *
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17 | e6e5906b | pbrook | * You should have received a copy of the GNU Lesser General Public
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18 | e6e5906b | pbrook | * License along with this library; if not, write to the Free Software
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19 | e6e5906b | pbrook | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 | e6e5906b | pbrook | */
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21 | e6e5906b | pbrook | #include <stdarg.h> |
22 | e6e5906b | pbrook | #include <stdlib.h> |
23 | e6e5906b | pbrook | #include <stdio.h> |
24 | e6e5906b | pbrook | #include <string.h> |
25 | e6e5906b | pbrook | #include <inttypes.h> |
26 | e1f3808e | pbrook | #include <assert.h> |
27 | e6e5906b | pbrook | |
28 | e6e5906b | pbrook | #include "config.h" |
29 | e6e5906b | pbrook | #include "cpu.h" |
30 | e6e5906b | pbrook | #include "exec-all.h" |
31 | e6e5906b | pbrook | #include "disas.h" |
32 | 57fec1fe | bellard | #include "tcg-op.h" |
33 | e1f3808e | pbrook | |
34 | e1f3808e | pbrook | #define GEN_HELPER 1 |
35 | e1f3808e | pbrook | #include "helpers.h" |
36 | e6e5906b | pbrook | |
37 | 0633879f | pbrook | //#define DEBUG_DISPATCH 1
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38 | 0633879f | pbrook | |
39 | e1f3808e | pbrook | #define DEFO32(name, offset) static TCGv QREG_##name; |
40 | e1f3808e | pbrook | #define DEFO64(name, offset) static TCGv QREG_##name; |
41 | e1f3808e | pbrook | #define DEFF64(name, offset) static TCGv QREG_##name; |
42 | e1f3808e | pbrook | #include "qregs.def" |
43 | e1f3808e | pbrook | #undef DEFO32
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44 | e1f3808e | pbrook | #undef DEFO64
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45 | e1f3808e | pbrook | #undef DEFF64
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46 | e1f3808e | pbrook | |
47 | e1f3808e | pbrook | static TCGv cpu_env;
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48 | e1f3808e | pbrook | |
49 | e1f3808e | pbrook | static char cpu_reg_names[3*8*3 + 5*4]; |
50 | e1f3808e | pbrook | static TCGv cpu_dregs[8]; |
51 | e1f3808e | pbrook | static TCGv cpu_aregs[8]; |
52 | e1f3808e | pbrook | static TCGv cpu_fregs[8]; |
53 | e1f3808e | pbrook | static TCGv cpu_macc[4]; |
54 | e1f3808e | pbrook | |
55 | e1f3808e | pbrook | #define DREG(insn, pos) cpu_dregs[((insn) >> (pos)) & 7] |
56 | e1f3808e | pbrook | #define AREG(insn, pos) cpu_aregs[((insn) >> (pos)) & 7] |
57 | e1f3808e | pbrook | #define FREG(insn, pos) cpu_fregs[((insn) >> (pos)) & 7] |
58 | e1f3808e | pbrook | #define MACREG(acc) cpu_macc[acc]
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59 | e1f3808e | pbrook | #define QREG_SP cpu_aregs[7] |
60 | e1f3808e | pbrook | |
61 | e1f3808e | pbrook | static TCGv NULL_QREG;
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62 | e1f3808e | pbrook | #define IS_NULL_QREG(t) (GET_TCGV(t) == GET_TCGV(NULL_QREG))
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63 | e1f3808e | pbrook | /* Used to distinguish stores from bad addressing modes. */
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64 | e1f3808e | pbrook | static TCGv store_dummy;
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65 | e1f3808e | pbrook | |
66 | 2e70f6ef | pbrook | #include "gen-icount.h" |
67 | 2e70f6ef | pbrook | |
68 | e1f3808e | pbrook | void m68k_tcg_init(void) |
69 | e1f3808e | pbrook | { |
70 | e1f3808e | pbrook | char *p;
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71 | e1f3808e | pbrook | int i;
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72 | e1f3808e | pbrook | |
73 | e1f3808e | pbrook | #define DEFO32(name, offset) QREG_##name = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, offsetof(CPUState, offset), #name); |
74 | e1f3808e | pbrook | #define DEFO64(name, offset) QREG_##name = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0, offsetof(CPUState, offset), #name); |
75 | e1f3808e | pbrook | #define DEFF64(name, offset) DEFO64(name, offset)
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76 | e1f3808e | pbrook | #include "qregs.def" |
77 | e1f3808e | pbrook | #undef DEFO32
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78 | e1f3808e | pbrook | #undef DEFO64
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79 | e1f3808e | pbrook | #undef DEFF64
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80 | e1f3808e | pbrook | |
81 | e1f3808e | pbrook | cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
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82 | e1f3808e | pbrook | |
83 | e1f3808e | pbrook | p = cpu_reg_names; |
84 | e1f3808e | pbrook | for (i = 0; i < 8; i++) { |
85 | e1f3808e | pbrook | sprintf(p, "D%d", i);
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86 | e1f3808e | pbrook | cpu_dregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, |
87 | e1f3808e | pbrook | offsetof(CPUM68KState, dregs[i]), p); |
88 | e1f3808e | pbrook | p += 3;
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89 | e1f3808e | pbrook | sprintf(p, "A%d", i);
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90 | e1f3808e | pbrook | cpu_aregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, |
91 | e1f3808e | pbrook | offsetof(CPUM68KState, aregs[i]), p); |
92 | e1f3808e | pbrook | p += 3;
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93 | e1f3808e | pbrook | sprintf(p, "F%d", i);
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94 | e1f3808e | pbrook | cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, |
95 | e1f3808e | pbrook | offsetof(CPUM68KState, fregs[i]), p); |
96 | e1f3808e | pbrook | p += 3;
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97 | e1f3808e | pbrook | } |
98 | e1f3808e | pbrook | for (i = 0; i < 4; i++) { |
99 | e1f3808e | pbrook | sprintf(p, "ACC%d", i);
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100 | e1f3808e | pbrook | cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, |
101 | e1f3808e | pbrook | offsetof(CPUM68KState, macc[i]), p); |
102 | e1f3808e | pbrook | p += 5;
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103 | e1f3808e | pbrook | } |
104 | e1f3808e | pbrook | |
105 | e1f3808e | pbrook | NULL_QREG = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, -4, "NULL"); |
106 | e1f3808e | pbrook | store_dummy = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0, -8, "NULL"); |
107 | e1f3808e | pbrook | |
108 | e1f3808e | pbrook | #define DEF_HELPER(name, ret, args) \
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109 | e1f3808e | pbrook | tcg_register_helper(HELPER(name), #name);
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110 | e1f3808e | pbrook | #include "helpers.h" |
111 | e1f3808e | pbrook | } |
112 | e1f3808e | pbrook | |
113 | e6e5906b | pbrook | static inline void qemu_assert(int cond, const char *msg) |
114 | e6e5906b | pbrook | { |
115 | e6e5906b | pbrook | if (!cond) {
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116 | e6e5906b | pbrook | fprintf (stderr, "badness: %s\n", msg);
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117 | e6e5906b | pbrook | abort(); |
118 | e6e5906b | pbrook | } |
119 | e6e5906b | pbrook | } |
120 | e6e5906b | pbrook | |
121 | e6e5906b | pbrook | /* internal defines */
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122 | e6e5906b | pbrook | typedef struct DisasContext { |
123 | e6dbd3b3 | pbrook | CPUM68KState *env; |
124 | 510ff0b7 | pbrook | target_ulong insn_pc; /* Start of the current instruction. */
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125 | e6e5906b | pbrook | target_ulong pc; |
126 | e6e5906b | pbrook | int is_jmp;
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127 | e6e5906b | pbrook | int cc_op;
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128 | 0633879f | pbrook | int user;
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129 | e6e5906b | pbrook | uint32_t fpcr; |
130 | e6e5906b | pbrook | struct TranslationBlock *tb;
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131 | e6e5906b | pbrook | int singlestep_enabled;
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132 | c9bac22c | pbrook | int is_mem;
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133 | e1f3808e | pbrook | TCGv mactmp; |
134 | e6e5906b | pbrook | } DisasContext; |
135 | e6e5906b | pbrook | |
136 | e6e5906b | pbrook | #define DISAS_JUMP_NEXT 4 |
137 | e6e5906b | pbrook | |
138 | 0633879f | pbrook | #if defined(CONFIG_USER_ONLY)
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139 | 0633879f | pbrook | #define IS_USER(s) 1 |
140 | 0633879f | pbrook | #else
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141 | 0633879f | pbrook | #define IS_USER(s) s->user
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142 | 0633879f | pbrook | #endif
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143 | 0633879f | pbrook | |
144 | e6e5906b | pbrook | /* XXX: move that elsewhere */
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145 | e6e5906b | pbrook | /* ??? Fix exceptions. */
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146 | e6e5906b | pbrook | static void *gen_throws_exception; |
147 | e6e5906b | pbrook | #define gen_last_qop NULL |
148 | e6e5906b | pbrook | |
149 | e6e5906b | pbrook | extern FILE *logfile;
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150 | e6e5906b | pbrook | extern int loglevel; |
151 | e6e5906b | pbrook | |
152 | e6e5906b | pbrook | #define OS_BYTE 0 |
153 | e6e5906b | pbrook | #define OS_WORD 1 |
154 | e6e5906b | pbrook | #define OS_LONG 2 |
155 | e6e5906b | pbrook | #define OS_SINGLE 4 |
156 | e6e5906b | pbrook | #define OS_DOUBLE 5 |
157 | e6e5906b | pbrook | |
158 | e6e5906b | pbrook | typedef void (*disas_proc)(DisasContext *, uint16_t); |
159 | e6e5906b | pbrook | |
160 | 0633879f | pbrook | #ifdef DEBUG_DISPATCH
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161 | 0633879f | pbrook | #define DISAS_INSN(name) \
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162 | 0633879f | pbrook | static void real_disas_##name (DisasContext *s, uint16_t insn); \ |
163 | 0633879f | pbrook | static void disas_##name (DisasContext *s, uint16_t insn) { \ |
164 | 0633879f | pbrook | if (logfile) fprintf(logfile, "Dispatch " #name "\n"); \ |
165 | 0633879f | pbrook | real_disas_##name(s, insn); } \ |
166 | 0633879f | pbrook | static void real_disas_##name (DisasContext *s, uint16_t insn) |
167 | 0633879f | pbrook | #else
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168 | e6e5906b | pbrook | #define DISAS_INSN(name) \
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169 | e6e5906b | pbrook | static void disas_##name (DisasContext *s, uint16_t insn) |
170 | 0633879f | pbrook | #endif
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171 | e6e5906b | pbrook | |
172 | e1f3808e | pbrook | /* FIXME: Remove this. */
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173 | e1f3808e | pbrook | #define gen_im32(val) tcg_const_i32(val)
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174 | e1f3808e | pbrook | |
175 | e1f3808e | pbrook | /* Fake floating point. */
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176 | e1f3808e | pbrook | #define TCG_TYPE_F32 TCG_TYPE_I32
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177 | e1f3808e | pbrook | #define TCG_TYPE_F64 TCG_TYPE_I64
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178 | e1f3808e | pbrook | #define tcg_gen_mov_f64 tcg_gen_mov_i64
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179 | e1f3808e | pbrook | #define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
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180 | e1f3808e | pbrook | #define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
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181 | e1f3808e | pbrook | #define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
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182 | e1f3808e | pbrook | #define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
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183 | e1f3808e | pbrook | #define gen_helper_pack_32_f32 tcg_gen_mov_i32
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184 | e1f3808e | pbrook | #define gen_helper_pack_f32_32 tcg_gen_mov_i32
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185 | e1f3808e | pbrook | |
186 | e1f3808e | pbrook | #define QMODE_I32 TCG_TYPE_I32
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187 | e1f3808e | pbrook | #define QMODE_I64 TCG_TYPE_I64
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188 | e1f3808e | pbrook | #define QMODE_F32 TCG_TYPE_F32
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189 | e1f3808e | pbrook | #define QMODE_F64 TCG_TYPE_F64
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190 | e1f3808e | pbrook | static inline TCGv gen_new_qreg(int mode) |
191 | e1f3808e | pbrook | { |
192 | e1f3808e | pbrook | return tcg_temp_new(mode);
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193 | e1f3808e | pbrook | } |
194 | e1f3808e | pbrook | |
195 | e6e5906b | pbrook | /* Generate a load from the specified address. Narrow values are
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196 | e6e5906b | pbrook | sign extended to full register width. */
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197 | e1f3808e | pbrook | static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign) |
198 | e6e5906b | pbrook | { |
199 | e1f3808e | pbrook | TCGv tmp; |
200 | e1f3808e | pbrook | int index = IS_USER(s);
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201 | c9bac22c | pbrook | s->is_mem = 1;
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202 | e6e5906b | pbrook | switch(opsize) {
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203 | e6e5906b | pbrook | case OS_BYTE:
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204 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
205 | e6e5906b | pbrook | if (sign)
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206 | e1f3808e | pbrook | tcg_gen_qemu_ld8s(tmp, addr, index); |
207 | e6e5906b | pbrook | else
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208 | e1f3808e | pbrook | tcg_gen_qemu_ld8u(tmp, addr, index); |
209 | e6e5906b | pbrook | break;
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210 | e6e5906b | pbrook | case OS_WORD:
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211 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
212 | e6e5906b | pbrook | if (sign)
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213 | e1f3808e | pbrook | tcg_gen_qemu_ld16s(tmp, addr, index); |
214 | e6e5906b | pbrook | else
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215 | e1f3808e | pbrook | tcg_gen_qemu_ld16u(tmp, addr, index); |
216 | e6e5906b | pbrook | break;
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217 | e6e5906b | pbrook | case OS_LONG:
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218 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
219 | e1f3808e | pbrook | tcg_gen_qemu_ld32u(tmp, addr, index); |
220 | e6e5906b | pbrook | break;
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221 | e6e5906b | pbrook | case OS_SINGLE:
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222 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_F32); |
223 | e1f3808e | pbrook | tcg_gen_qemu_ldf32(tmp, addr, index); |
224 | e6e5906b | pbrook | break;
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225 | e6e5906b | pbrook | case OS_DOUBLE:
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226 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_F64); |
227 | e1f3808e | pbrook | tcg_gen_qemu_ldf64(tmp, addr, index); |
228 | e6e5906b | pbrook | break;
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229 | e6e5906b | pbrook | default:
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230 | e6e5906b | pbrook | qemu_assert(0, "bad load size"); |
231 | e6e5906b | pbrook | } |
232 | e6e5906b | pbrook | gen_throws_exception = gen_last_qop; |
233 | e6e5906b | pbrook | return tmp;
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234 | e6e5906b | pbrook | } |
235 | e6e5906b | pbrook | |
236 | e6e5906b | pbrook | /* Generate a store. */
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237 | e1f3808e | pbrook | static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val) |
238 | e6e5906b | pbrook | { |
239 | e1f3808e | pbrook | int index = IS_USER(s);
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240 | c9bac22c | pbrook | s->is_mem = 1;
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241 | e6e5906b | pbrook | switch(opsize) {
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242 | e6e5906b | pbrook | case OS_BYTE:
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243 | e1f3808e | pbrook | tcg_gen_qemu_st8(val, addr, index); |
244 | e6e5906b | pbrook | break;
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245 | e6e5906b | pbrook | case OS_WORD:
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246 | e1f3808e | pbrook | tcg_gen_qemu_st16(val, addr, index); |
247 | e6e5906b | pbrook | break;
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248 | e6e5906b | pbrook | case OS_LONG:
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249 | e1f3808e | pbrook | tcg_gen_qemu_st32(val, addr, index); |
250 | e6e5906b | pbrook | break;
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251 | e6e5906b | pbrook | case OS_SINGLE:
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252 | e1f3808e | pbrook | tcg_gen_qemu_stf32(val, addr, index); |
253 | e6e5906b | pbrook | break;
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254 | e6e5906b | pbrook | case OS_DOUBLE:
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255 | e1f3808e | pbrook | tcg_gen_qemu_stf64(val, addr, index); |
256 | e6e5906b | pbrook | break;
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257 | e6e5906b | pbrook | default:
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258 | e6e5906b | pbrook | qemu_assert(0, "bad store size"); |
259 | e6e5906b | pbrook | } |
260 | e6e5906b | pbrook | gen_throws_exception = gen_last_qop; |
261 | e6e5906b | pbrook | } |
262 | e6e5906b | pbrook | |
263 | e1f3808e | pbrook | typedef enum { |
264 | e1f3808e | pbrook | EA_STORE, |
265 | e1f3808e | pbrook | EA_LOADU, |
266 | e1f3808e | pbrook | EA_LOADS |
267 | e1f3808e | pbrook | } ea_what; |
268 | e1f3808e | pbrook | |
269 | e6e5906b | pbrook | /* Generate an unsigned load if VAL is 0 a signed load if val is -1,
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270 | e6e5906b | pbrook | otherwise generate a store. */
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271 | e1f3808e | pbrook | static TCGv gen_ldst(DisasContext *s, int opsize, TCGv addr, TCGv val, |
272 | e1f3808e | pbrook | ea_what what) |
273 | e6e5906b | pbrook | { |
274 | e1f3808e | pbrook | if (what == EA_STORE) {
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275 | 0633879f | pbrook | gen_store(s, opsize, addr, val); |
276 | e1f3808e | pbrook | return store_dummy;
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277 | e6e5906b | pbrook | } else {
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278 | e1f3808e | pbrook | return gen_load(s, opsize, addr, what == EA_LOADS);
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279 | e6e5906b | pbrook | } |
280 | e6e5906b | pbrook | } |
281 | e6e5906b | pbrook | |
282 | e6dbd3b3 | pbrook | /* Read a 32-bit immediate constant. */
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283 | e6dbd3b3 | pbrook | static inline uint32_t read_im32(DisasContext *s) |
284 | e6dbd3b3 | pbrook | { |
285 | e6dbd3b3 | pbrook | uint32_t im; |
286 | e6dbd3b3 | pbrook | im = ((uint32_t)lduw_code(s->pc)) << 16;
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287 | e6dbd3b3 | pbrook | s->pc += 2;
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288 | e6dbd3b3 | pbrook | im |= lduw_code(s->pc); |
289 | e6dbd3b3 | pbrook | s->pc += 2;
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290 | e6dbd3b3 | pbrook | return im;
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291 | e6dbd3b3 | pbrook | } |
292 | e6dbd3b3 | pbrook | |
293 | e6dbd3b3 | pbrook | /* Calculate and address index. */
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294 | e1f3808e | pbrook | static TCGv gen_addr_index(uint16_t ext, TCGv tmp)
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295 | e6dbd3b3 | pbrook | { |
296 | e1f3808e | pbrook | TCGv add; |
297 | e6dbd3b3 | pbrook | int scale;
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298 | e6dbd3b3 | pbrook | |
299 | e6dbd3b3 | pbrook | add = (ext & 0x8000) ? AREG(ext, 12) : DREG(ext, 12); |
300 | e6dbd3b3 | pbrook | if ((ext & 0x800) == 0) { |
301 | e1f3808e | pbrook | tcg_gen_ext16s_i32(tmp, add); |
302 | e6dbd3b3 | pbrook | add = tmp; |
303 | e6dbd3b3 | pbrook | } |
304 | e6dbd3b3 | pbrook | scale = (ext >> 9) & 3; |
305 | e6dbd3b3 | pbrook | if (scale != 0) { |
306 | e1f3808e | pbrook | tcg_gen_shli_i32(tmp, add, scale); |
307 | e6dbd3b3 | pbrook | add = tmp; |
308 | e6dbd3b3 | pbrook | } |
309 | e6dbd3b3 | pbrook | return add;
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310 | e6dbd3b3 | pbrook | } |
311 | e6dbd3b3 | pbrook | |
312 | e1f3808e | pbrook | /* Handle a base + index + displacement effective addresss.
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313 | e1f3808e | pbrook | A NULL_QREG base means pc-relative. */
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314 | e1f3808e | pbrook | static TCGv gen_lea_indexed(DisasContext *s, int opsize, TCGv base) |
315 | e6e5906b | pbrook | { |
316 | e6e5906b | pbrook | uint32_t offset; |
317 | e6e5906b | pbrook | uint16_t ext; |
318 | e1f3808e | pbrook | TCGv add; |
319 | e1f3808e | pbrook | TCGv tmp; |
320 | e6dbd3b3 | pbrook | uint32_t bd, od; |
321 | e6e5906b | pbrook | |
322 | e6e5906b | pbrook | offset = s->pc; |
323 | 0633879f | pbrook | ext = lduw_code(s->pc); |
324 | e6e5906b | pbrook | s->pc += 2;
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325 | e6dbd3b3 | pbrook | |
326 | e6dbd3b3 | pbrook | if ((ext & 0x800) == 0 && !m68k_feature(s->env, M68K_FEATURE_WORD_INDEX)) |
327 | e1f3808e | pbrook | return NULL_QREG;
|
328 | e6dbd3b3 | pbrook | |
329 | e6dbd3b3 | pbrook | if (ext & 0x100) { |
330 | e6dbd3b3 | pbrook | /* full extension word format */
|
331 | e6dbd3b3 | pbrook | if (!m68k_feature(s->env, M68K_FEATURE_EXT_FULL))
|
332 | e1f3808e | pbrook | return NULL_QREG;
|
333 | e6dbd3b3 | pbrook | |
334 | e6dbd3b3 | pbrook | if ((ext & 0x30) > 0x10) { |
335 | e6dbd3b3 | pbrook | /* base displacement */
|
336 | e6dbd3b3 | pbrook | if ((ext & 0x30) == 0x20) { |
337 | e6dbd3b3 | pbrook | bd = (int16_t)lduw_code(s->pc); |
338 | e6dbd3b3 | pbrook | s->pc += 2;
|
339 | e6dbd3b3 | pbrook | } else {
|
340 | e6dbd3b3 | pbrook | bd = read_im32(s); |
341 | e6dbd3b3 | pbrook | } |
342 | e6dbd3b3 | pbrook | } else {
|
343 | e6dbd3b3 | pbrook | bd = 0;
|
344 | e6dbd3b3 | pbrook | } |
345 | e6dbd3b3 | pbrook | tmp = gen_new_qreg(QMODE_I32); |
346 | e6dbd3b3 | pbrook | if ((ext & 0x44) == 0) { |
347 | e6dbd3b3 | pbrook | /* pre-index */
|
348 | e6dbd3b3 | pbrook | add = gen_addr_index(ext, tmp); |
349 | e6dbd3b3 | pbrook | } else {
|
350 | e1f3808e | pbrook | add = NULL_QREG; |
351 | e6dbd3b3 | pbrook | } |
352 | e6dbd3b3 | pbrook | if ((ext & 0x80) == 0) { |
353 | e6dbd3b3 | pbrook | /* base not suppressed */
|
354 | e1f3808e | pbrook | if (IS_NULL_QREG(base)) {
|
355 | e6dbd3b3 | pbrook | base = gen_im32(offset + bd); |
356 | e6dbd3b3 | pbrook | bd = 0;
|
357 | e6dbd3b3 | pbrook | } |
358 | e1f3808e | pbrook | if (!IS_NULL_QREG(add)) {
|
359 | e1f3808e | pbrook | tcg_gen_add_i32(tmp, add, base); |
360 | e6dbd3b3 | pbrook | add = tmp; |
361 | e6dbd3b3 | pbrook | } else {
|
362 | e6dbd3b3 | pbrook | add = base; |
363 | e6dbd3b3 | pbrook | } |
364 | e6dbd3b3 | pbrook | } |
365 | e1f3808e | pbrook | if (!IS_NULL_QREG(add)) {
|
366 | e6dbd3b3 | pbrook | if (bd != 0) { |
367 | e1f3808e | pbrook | tcg_gen_addi_i32(tmp, add, bd); |
368 | e6dbd3b3 | pbrook | add = tmp; |
369 | e6dbd3b3 | pbrook | } |
370 | e6dbd3b3 | pbrook | } else {
|
371 | e6dbd3b3 | pbrook | add = gen_im32(bd); |
372 | e6dbd3b3 | pbrook | } |
373 | e6dbd3b3 | pbrook | if ((ext & 3) != 0) { |
374 | e6dbd3b3 | pbrook | /* memory indirect */
|
375 | e6dbd3b3 | pbrook | base = gen_load(s, OS_LONG, add, 0);
|
376 | e6dbd3b3 | pbrook | if ((ext & 0x44) == 4) { |
377 | e6dbd3b3 | pbrook | add = gen_addr_index(ext, tmp); |
378 | e1f3808e | pbrook | tcg_gen_add_i32(tmp, add, base); |
379 | e6dbd3b3 | pbrook | add = tmp; |
380 | e6dbd3b3 | pbrook | } else {
|
381 | e6dbd3b3 | pbrook | add = base; |
382 | e6dbd3b3 | pbrook | } |
383 | e6dbd3b3 | pbrook | if ((ext & 3) > 1) { |
384 | e6dbd3b3 | pbrook | /* outer displacement */
|
385 | e6dbd3b3 | pbrook | if ((ext & 3) == 2) { |
386 | e6dbd3b3 | pbrook | od = (int16_t)lduw_code(s->pc); |
387 | e6dbd3b3 | pbrook | s->pc += 2;
|
388 | e6dbd3b3 | pbrook | } else {
|
389 | e6dbd3b3 | pbrook | od = read_im32(s); |
390 | e6dbd3b3 | pbrook | } |
391 | e6dbd3b3 | pbrook | } else {
|
392 | e6dbd3b3 | pbrook | od = 0;
|
393 | e6dbd3b3 | pbrook | } |
394 | e6dbd3b3 | pbrook | if (od != 0) { |
395 | e1f3808e | pbrook | tcg_gen_addi_i32(tmp, add, od); |
396 | e6dbd3b3 | pbrook | add = tmp; |
397 | e6dbd3b3 | pbrook | } |
398 | e6dbd3b3 | pbrook | } |
399 | e6e5906b | pbrook | } else {
|
400 | e6dbd3b3 | pbrook | /* brief extension word format */
|
401 | e6dbd3b3 | pbrook | tmp = gen_new_qreg(QMODE_I32); |
402 | e6dbd3b3 | pbrook | add = gen_addr_index(ext, tmp); |
403 | e1f3808e | pbrook | if (!IS_NULL_QREG(base)) {
|
404 | e1f3808e | pbrook | tcg_gen_add_i32(tmp, add, base); |
405 | e6dbd3b3 | pbrook | if ((int8_t)ext)
|
406 | e1f3808e | pbrook | tcg_gen_addi_i32(tmp, tmp, (int8_t)ext); |
407 | e6dbd3b3 | pbrook | } else {
|
408 | e1f3808e | pbrook | tcg_gen_addi_i32(tmp, add, offset + (int8_t)ext); |
409 | e6dbd3b3 | pbrook | } |
410 | e6dbd3b3 | pbrook | add = tmp; |
411 | e6e5906b | pbrook | } |
412 | e6dbd3b3 | pbrook | return add;
|
413 | e6e5906b | pbrook | } |
414 | e6e5906b | pbrook | |
415 | e6e5906b | pbrook | /* Update the CPU env CC_OP state. */
|
416 | e6e5906b | pbrook | static inline void gen_flush_cc_op(DisasContext *s) |
417 | e6e5906b | pbrook | { |
418 | e6e5906b | pbrook | if (s->cc_op != CC_OP_DYNAMIC)
|
419 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_CC_OP, s->cc_op); |
420 | e6e5906b | pbrook | } |
421 | e6e5906b | pbrook | |
422 | e6e5906b | pbrook | /* Evaluate all the CC flags. */
|
423 | e6e5906b | pbrook | static inline void gen_flush_flags(DisasContext *s) |
424 | e6e5906b | pbrook | { |
425 | e6e5906b | pbrook | if (s->cc_op == CC_OP_FLAGS)
|
426 | e6e5906b | pbrook | return;
|
427 | 0cf5c677 | pbrook | gen_flush_cc_op(s); |
428 | e1f3808e | pbrook | gen_helper_flush_flags(cpu_env, QREG_CC_OP); |
429 | e6e5906b | pbrook | s->cc_op = CC_OP_FLAGS; |
430 | e6e5906b | pbrook | } |
431 | e6e5906b | pbrook | |
432 | e1f3808e | pbrook | static void gen_logic_cc(DisasContext *s, TCGv val) |
433 | e1f3808e | pbrook | { |
434 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_CC_DEST, val); |
435 | e1f3808e | pbrook | s->cc_op = CC_OP_LOGIC; |
436 | e1f3808e | pbrook | } |
437 | e1f3808e | pbrook | |
438 | e1f3808e | pbrook | static void gen_update_cc_add(TCGv dest, TCGv src) |
439 | e1f3808e | pbrook | { |
440 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_CC_DEST, dest); |
441 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_CC_SRC, src); |
442 | e1f3808e | pbrook | } |
443 | e1f3808e | pbrook | |
444 | e6e5906b | pbrook | static inline int opsize_bytes(int opsize) |
445 | e6e5906b | pbrook | { |
446 | e6e5906b | pbrook | switch (opsize) {
|
447 | e6e5906b | pbrook | case OS_BYTE: return 1; |
448 | e6e5906b | pbrook | case OS_WORD: return 2; |
449 | e6e5906b | pbrook | case OS_LONG: return 4; |
450 | e6e5906b | pbrook | case OS_SINGLE: return 4; |
451 | e6e5906b | pbrook | case OS_DOUBLE: return 8; |
452 | e6e5906b | pbrook | default:
|
453 | e6e5906b | pbrook | qemu_assert(0, "bad operand size"); |
454 | e6e5906b | pbrook | } |
455 | e6e5906b | pbrook | } |
456 | e6e5906b | pbrook | |
457 | e6e5906b | pbrook | /* Assign value to a register. If the width is less than the register width
|
458 | e6e5906b | pbrook | only the low part of the register is set. */
|
459 | e1f3808e | pbrook | static void gen_partset_reg(int opsize, TCGv reg, TCGv val) |
460 | e6e5906b | pbrook | { |
461 | e1f3808e | pbrook | TCGv tmp; |
462 | e6e5906b | pbrook | switch (opsize) {
|
463 | e6e5906b | pbrook | case OS_BYTE:
|
464 | e1f3808e | pbrook | tcg_gen_andi_i32(reg, reg, 0xffffff00);
|
465 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
466 | e1f3808e | pbrook | tcg_gen_ext8u_i32(tmp, val); |
467 | e1f3808e | pbrook | tcg_gen_or_i32(reg, reg, tmp); |
468 | e6e5906b | pbrook | break;
|
469 | e6e5906b | pbrook | case OS_WORD:
|
470 | e1f3808e | pbrook | tcg_gen_andi_i32(reg, reg, 0xffff0000);
|
471 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
472 | e1f3808e | pbrook | tcg_gen_ext16u_i32(tmp, val); |
473 | e1f3808e | pbrook | tcg_gen_or_i32(reg, reg, tmp); |
474 | e6e5906b | pbrook | break;
|
475 | e6e5906b | pbrook | case OS_LONG:
|
476 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, val); |
477 | e6e5906b | pbrook | break;
|
478 | e6e5906b | pbrook | case OS_SINGLE:
|
479 | e1f3808e | pbrook | gen_helper_pack_32_f32(reg, val); |
480 | e6e5906b | pbrook | break;
|
481 | e6e5906b | pbrook | default:
|
482 | e6e5906b | pbrook | qemu_assert(0, "Bad operand size"); |
483 | e6e5906b | pbrook | break;
|
484 | e6e5906b | pbrook | } |
485 | e6e5906b | pbrook | } |
486 | e6e5906b | pbrook | |
487 | e6e5906b | pbrook | /* Sign or zero extend a value. */
|
488 | e1f3808e | pbrook | static inline TCGv gen_extend(TCGv val, int opsize, int sign) |
489 | e6e5906b | pbrook | { |
490 | e1f3808e | pbrook | TCGv tmp; |
491 | e6e5906b | pbrook | |
492 | e6e5906b | pbrook | switch (opsize) {
|
493 | e6e5906b | pbrook | case OS_BYTE:
|
494 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
495 | e6e5906b | pbrook | if (sign)
|
496 | e1f3808e | pbrook | tcg_gen_ext8s_i32(tmp, val); |
497 | e6e5906b | pbrook | else
|
498 | e1f3808e | pbrook | tcg_gen_ext8u_i32(tmp, val); |
499 | e6e5906b | pbrook | break;
|
500 | e6e5906b | pbrook | case OS_WORD:
|
501 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
502 | e6e5906b | pbrook | if (sign)
|
503 | e1f3808e | pbrook | tcg_gen_ext16s_i32(tmp, val); |
504 | e6e5906b | pbrook | else
|
505 | e1f3808e | pbrook | tcg_gen_ext16u_i32(tmp, val); |
506 | e6e5906b | pbrook | break;
|
507 | e6e5906b | pbrook | case OS_LONG:
|
508 | e6e5906b | pbrook | tmp = val; |
509 | e6e5906b | pbrook | break;
|
510 | e6e5906b | pbrook | case OS_SINGLE:
|
511 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_F32); |
512 | e1f3808e | pbrook | gen_helper_pack_f32_32(tmp, val); |
513 | e6e5906b | pbrook | break;
|
514 | e6e5906b | pbrook | default:
|
515 | e6e5906b | pbrook | qemu_assert(0, "Bad operand size"); |
516 | e6e5906b | pbrook | } |
517 | e6e5906b | pbrook | return tmp;
|
518 | e6e5906b | pbrook | } |
519 | e6e5906b | pbrook | |
520 | e6e5906b | pbrook | /* Generate code for an "effective address". Does not adjust the base
|
521 | e6e5906b | pbrook | register for autoincrememnt addressing modes. */
|
522 | e1f3808e | pbrook | static TCGv gen_lea(DisasContext *s, uint16_t insn, int opsize) |
523 | e6e5906b | pbrook | { |
524 | e1f3808e | pbrook | TCGv reg; |
525 | e1f3808e | pbrook | TCGv tmp; |
526 | e6e5906b | pbrook | uint16_t ext; |
527 | e6e5906b | pbrook | uint32_t offset; |
528 | e6e5906b | pbrook | |
529 | e6e5906b | pbrook | switch ((insn >> 3) & 7) { |
530 | e6e5906b | pbrook | case 0: /* Data register direct. */ |
531 | e6e5906b | pbrook | case 1: /* Address register direct. */ |
532 | e1f3808e | pbrook | return NULL_QREG;
|
533 | e6e5906b | pbrook | case 2: /* Indirect register */ |
534 | e6e5906b | pbrook | case 3: /* Indirect postincrement. */ |
535 | e1f3808e | pbrook | return AREG(insn, 0); |
536 | e6e5906b | pbrook | case 4: /* Indirect predecrememnt. */ |
537 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
538 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
539 | e1f3808e | pbrook | tcg_gen_subi_i32(tmp, reg, opsize_bytes(opsize)); |
540 | e6e5906b | pbrook | return tmp;
|
541 | e6e5906b | pbrook | case 5: /* Indirect displacement. */ |
542 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
543 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
544 | 0633879f | pbrook | ext = lduw_code(s->pc); |
545 | e6e5906b | pbrook | s->pc += 2;
|
546 | e1f3808e | pbrook | tcg_gen_addi_i32(tmp, reg, (int16_t)ext); |
547 | e6e5906b | pbrook | return tmp;
|
548 | e6e5906b | pbrook | case 6: /* Indirect index + displacement. */ |
549 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
550 | e6e5906b | pbrook | return gen_lea_indexed(s, opsize, reg);
|
551 | e6e5906b | pbrook | case 7: /* Other */ |
552 | e1f3808e | pbrook | switch (insn & 7) { |
553 | e6e5906b | pbrook | case 0: /* Absolute short. */ |
554 | 0633879f | pbrook | offset = ldsw_code(s->pc); |
555 | e6e5906b | pbrook | s->pc += 2;
|
556 | e6e5906b | pbrook | return gen_im32(offset);
|
557 | e6e5906b | pbrook | case 1: /* Absolute long. */ |
558 | e6e5906b | pbrook | offset = read_im32(s); |
559 | e6e5906b | pbrook | return gen_im32(offset);
|
560 | e6e5906b | pbrook | case 2: /* pc displacement */ |
561 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
562 | e6e5906b | pbrook | offset = s->pc; |
563 | 0633879f | pbrook | offset += ldsw_code(s->pc); |
564 | e6e5906b | pbrook | s->pc += 2;
|
565 | e6e5906b | pbrook | return gen_im32(offset);
|
566 | e6e5906b | pbrook | case 3: /* pc index+displacement. */ |
567 | e1f3808e | pbrook | return gen_lea_indexed(s, opsize, NULL_QREG);
|
568 | e6e5906b | pbrook | case 4: /* Immediate. */ |
569 | e6e5906b | pbrook | default:
|
570 | e1f3808e | pbrook | return NULL_QREG;
|
571 | e6e5906b | pbrook | } |
572 | e6e5906b | pbrook | } |
573 | e6e5906b | pbrook | /* Should never happen. */
|
574 | e1f3808e | pbrook | return NULL_QREG;
|
575 | e6e5906b | pbrook | } |
576 | e6e5906b | pbrook | |
577 | e6e5906b | pbrook | /* Helper function for gen_ea. Reuse the computed address between the
|
578 | e6e5906b | pbrook | for read/write operands. */
|
579 | e1f3808e | pbrook | static inline TCGv gen_ea_once(DisasContext *s, uint16_t insn, int opsize, |
580 | e1f3808e | pbrook | TCGv val, TCGv *addrp, ea_what what) |
581 | e6e5906b | pbrook | { |
582 | e1f3808e | pbrook | TCGv tmp; |
583 | e6e5906b | pbrook | |
584 | e1f3808e | pbrook | if (addrp && what == EA_STORE) {
|
585 | e6e5906b | pbrook | tmp = *addrp; |
586 | e6e5906b | pbrook | } else {
|
587 | e6e5906b | pbrook | tmp = gen_lea(s, insn, opsize); |
588 | e1f3808e | pbrook | if (IS_NULL_QREG(tmp))
|
589 | e1f3808e | pbrook | return tmp;
|
590 | e6e5906b | pbrook | if (addrp)
|
591 | e6e5906b | pbrook | *addrp = tmp; |
592 | e6e5906b | pbrook | } |
593 | e1f3808e | pbrook | return gen_ldst(s, opsize, tmp, val, what);
|
594 | e6e5906b | pbrook | } |
595 | e6e5906b | pbrook | |
596 | e6e5906b | pbrook | /* Generate code to load/store a value ito/from an EA. If VAL > 0 this is
|
597 | e6e5906b | pbrook | a write otherwise it is a read (0 == sign extend, -1 == zero extend).
|
598 | e6e5906b | pbrook | ADDRP is non-null for readwrite operands. */
|
599 | e1f3808e | pbrook | static TCGv gen_ea(DisasContext *s, uint16_t insn, int opsize, TCGv val, |
600 | e1f3808e | pbrook | TCGv *addrp, ea_what what) |
601 | e6e5906b | pbrook | { |
602 | e1f3808e | pbrook | TCGv reg; |
603 | e1f3808e | pbrook | TCGv result; |
604 | e6e5906b | pbrook | uint32_t offset; |
605 | e6e5906b | pbrook | |
606 | e6e5906b | pbrook | switch ((insn >> 3) & 7) { |
607 | e6e5906b | pbrook | case 0: /* Data register direct. */ |
608 | e1f3808e | pbrook | reg = DREG(insn, 0);
|
609 | e1f3808e | pbrook | if (what == EA_STORE) {
|
610 | e6e5906b | pbrook | gen_partset_reg(opsize, reg, val); |
611 | e1f3808e | pbrook | return store_dummy;
|
612 | e6e5906b | pbrook | } else {
|
613 | e1f3808e | pbrook | return gen_extend(reg, opsize, what == EA_LOADS);
|
614 | e6e5906b | pbrook | } |
615 | e6e5906b | pbrook | case 1: /* Address register direct. */ |
616 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
617 | e1f3808e | pbrook | if (what == EA_STORE) {
|
618 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, val); |
619 | e1f3808e | pbrook | return store_dummy;
|
620 | e6e5906b | pbrook | } else {
|
621 | e1f3808e | pbrook | return gen_extend(reg, opsize, what == EA_LOADS);
|
622 | e6e5906b | pbrook | } |
623 | e6e5906b | pbrook | case 2: /* Indirect register */ |
624 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
625 | e1f3808e | pbrook | return gen_ldst(s, opsize, reg, val, what);
|
626 | e6e5906b | pbrook | case 3: /* Indirect postincrement. */ |
627 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
628 | e1f3808e | pbrook | result = gen_ldst(s, opsize, reg, val, what); |
629 | e6e5906b | pbrook | /* ??? This is not exception safe. The instruction may still
|
630 | e6e5906b | pbrook | fault after this point. */
|
631 | e1f3808e | pbrook | if (what == EA_STORE || !addrp)
|
632 | e1f3808e | pbrook | tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize)); |
633 | e6e5906b | pbrook | return result;
|
634 | e6e5906b | pbrook | case 4: /* Indirect predecrememnt. */ |
635 | e6e5906b | pbrook | { |
636 | e1f3808e | pbrook | TCGv tmp; |
637 | e1f3808e | pbrook | if (addrp && what == EA_STORE) {
|
638 | e6e5906b | pbrook | tmp = *addrp; |
639 | e6e5906b | pbrook | } else {
|
640 | e6e5906b | pbrook | tmp = gen_lea(s, insn, opsize); |
641 | e1f3808e | pbrook | if (IS_NULL_QREG(tmp))
|
642 | e1f3808e | pbrook | return tmp;
|
643 | e6e5906b | pbrook | if (addrp)
|
644 | e6e5906b | pbrook | *addrp = tmp; |
645 | e6e5906b | pbrook | } |
646 | e1f3808e | pbrook | result = gen_ldst(s, opsize, tmp, val, what); |
647 | e6e5906b | pbrook | /* ??? This is not exception safe. The instruction may still
|
648 | e6e5906b | pbrook | fault after this point. */
|
649 | e1f3808e | pbrook | if (what == EA_STORE || !addrp) {
|
650 | e1f3808e | pbrook | reg = AREG(insn, 0);
|
651 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
652 | e6e5906b | pbrook | } |
653 | e6e5906b | pbrook | } |
654 | e6e5906b | pbrook | return result;
|
655 | e6e5906b | pbrook | case 5: /* Indirect displacement. */ |
656 | e6e5906b | pbrook | case 6: /* Indirect index + displacement. */ |
657 | e1f3808e | pbrook | return gen_ea_once(s, insn, opsize, val, addrp, what);
|
658 | e6e5906b | pbrook | case 7: /* Other */ |
659 | e1f3808e | pbrook | switch (insn & 7) { |
660 | e6e5906b | pbrook | case 0: /* Absolute short. */ |
661 | e6e5906b | pbrook | case 1: /* Absolute long. */ |
662 | e6e5906b | pbrook | case 2: /* pc displacement */ |
663 | e6e5906b | pbrook | case 3: /* pc index+displacement. */ |
664 | e1f3808e | pbrook | return gen_ea_once(s, insn, opsize, val, addrp, what);
|
665 | e6e5906b | pbrook | case 4: /* Immediate. */ |
666 | e6e5906b | pbrook | /* Sign extend values for consistency. */
|
667 | e6e5906b | pbrook | switch (opsize) {
|
668 | e6e5906b | pbrook | case OS_BYTE:
|
669 | e1f3808e | pbrook | if (what == EA_LOADS)
|
670 | 0633879f | pbrook | offset = ldsb_code(s->pc + 1);
|
671 | e6e5906b | pbrook | else
|
672 | 0633879f | pbrook | offset = ldub_code(s->pc + 1);
|
673 | e6e5906b | pbrook | s->pc += 2;
|
674 | e6e5906b | pbrook | break;
|
675 | e6e5906b | pbrook | case OS_WORD:
|
676 | e1f3808e | pbrook | if (what == EA_LOADS)
|
677 | 0633879f | pbrook | offset = ldsw_code(s->pc); |
678 | e6e5906b | pbrook | else
|
679 | 0633879f | pbrook | offset = lduw_code(s->pc); |
680 | e6e5906b | pbrook | s->pc += 2;
|
681 | e6e5906b | pbrook | break;
|
682 | e6e5906b | pbrook | case OS_LONG:
|
683 | e6e5906b | pbrook | offset = read_im32(s); |
684 | e6e5906b | pbrook | break;
|
685 | e6e5906b | pbrook | default:
|
686 | e6e5906b | pbrook | qemu_assert(0, "Bad immediate operand"); |
687 | e6e5906b | pbrook | } |
688 | e1f3808e | pbrook | return tcg_const_i32(offset);
|
689 | e6e5906b | pbrook | default:
|
690 | e1f3808e | pbrook | return NULL_QREG;
|
691 | e6e5906b | pbrook | } |
692 | e6e5906b | pbrook | } |
693 | e6e5906b | pbrook | /* Should never happen. */
|
694 | e1f3808e | pbrook | return NULL_QREG;
|
695 | e6e5906b | pbrook | } |
696 | e6e5906b | pbrook | |
697 | e1f3808e | pbrook | /* This generates a conditional branch, clobbering all temporaries. */
|
698 | e6e5906b | pbrook | static void gen_jmpcc(DisasContext *s, int cond, int l1) |
699 | e6e5906b | pbrook | { |
700 | e1f3808e | pbrook | TCGv tmp; |
701 | e6e5906b | pbrook | |
702 | e1f3808e | pbrook | /* TODO: Optimize compare/branch pairs rather than always flushing
|
703 | e1f3808e | pbrook | flag state to CC_OP_FLAGS. */
|
704 | e6e5906b | pbrook | gen_flush_flags(s); |
705 | e6e5906b | pbrook | switch (cond) {
|
706 | e6e5906b | pbrook | case 0: /* T */ |
707 | e1f3808e | pbrook | tcg_gen_br(l1); |
708 | e6e5906b | pbrook | break;
|
709 | e6e5906b | pbrook | case 1: /* F */ |
710 | e6e5906b | pbrook | break;
|
711 | e6e5906b | pbrook | case 2: /* HI (!C && !Z) */ |
712 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
713 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C | CCF_Z); |
714 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
715 | e6e5906b | pbrook | break;
|
716 | e6e5906b | pbrook | case 3: /* LS (C || Z) */ |
717 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
718 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C | CCF_Z); |
719 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
720 | e6e5906b | pbrook | break;
|
721 | e6e5906b | pbrook | case 4: /* CC (!C) */ |
722 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
723 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C); |
724 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
725 | e6e5906b | pbrook | break;
|
726 | e6e5906b | pbrook | case 5: /* CS (C) */ |
727 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
728 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_C); |
729 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
730 | e6e5906b | pbrook | break;
|
731 | e6e5906b | pbrook | case 6: /* NE (!Z) */ |
732 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
733 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_Z); |
734 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
735 | e6e5906b | pbrook | break;
|
736 | e6e5906b | pbrook | case 7: /* EQ (Z) */ |
737 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
738 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_Z); |
739 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
740 | e6e5906b | pbrook | break;
|
741 | e6e5906b | pbrook | case 8: /* VC (!V) */ |
742 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
743 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_V); |
744 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
745 | e6e5906b | pbrook | break;
|
746 | e6e5906b | pbrook | case 9: /* VS (V) */ |
747 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
748 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_V); |
749 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
750 | e6e5906b | pbrook | break;
|
751 | e6e5906b | pbrook | case 10: /* PL (!N) */ |
752 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
753 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N); |
754 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
755 | e6e5906b | pbrook | break;
|
756 | e6e5906b | pbrook | case 11: /* MI (N) */ |
757 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
758 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N); |
759 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
760 | e6e5906b | pbrook | break;
|
761 | e6e5906b | pbrook | case 12: /* GE (!(N ^ V)) */ |
762 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
763 | e1f3808e | pbrook | assert(CCF_V == (CCF_N >> 2));
|
764 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, QREG_CC_DEST, 2);
|
765 | e1f3808e | pbrook | tcg_gen_xor_i32(tmp, tmp, QREG_CC_DEST); |
766 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, tmp, CCF_V); |
767 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
768 | e6e5906b | pbrook | break;
|
769 | e6e5906b | pbrook | case 13: /* LT (N ^ V) */ |
770 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
771 | e1f3808e | pbrook | assert(CCF_V == (CCF_N >> 2));
|
772 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, QREG_CC_DEST, 2);
|
773 | e1f3808e | pbrook | tcg_gen_xor_i32(tmp, tmp, QREG_CC_DEST); |
774 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, tmp, CCF_V); |
775 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
776 | e6e5906b | pbrook | break;
|
777 | e6e5906b | pbrook | case 14: /* GT (!(Z || (N ^ V))) */ |
778 | e1f3808e | pbrook | tmp = gen_new_qreg(QMODE_I32); |
779 | e1f3808e | pbrook | assert(CCF_V == (CCF_N >> 2));
|
780 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N); |
781 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, tmp, 2);
|
782 | e1f3808e | pbrook | tcg_gen_xor_i32(tmp, tmp, QREG_CC_DEST); |
783 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, tmp, CCF_V | CCF_Z); |
784 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
|
785 | e6e5906b | pbrook | break;
|
786 | e6e5906b | pbrook | case 15: /* LE (Z || (N ^ V)) */ |
787 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
788 | e1f3808e | pbrook | assert(CCF_V == (CCF_N >> 2));
|
789 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_CC_DEST, CCF_N); |
790 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, tmp, 2);
|
791 | e1f3808e | pbrook | tcg_gen_xor_i32(tmp, tmp, QREG_CC_DEST); |
792 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, tmp, CCF_V | CCF_Z); |
793 | e1f3808e | pbrook | tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
|
794 | e6e5906b | pbrook | break;
|
795 | e6e5906b | pbrook | default:
|
796 | e6e5906b | pbrook | /* Should ever happen. */
|
797 | e6e5906b | pbrook | abort(); |
798 | e6e5906b | pbrook | } |
799 | e6e5906b | pbrook | } |
800 | e6e5906b | pbrook | |
801 | e6e5906b | pbrook | DISAS_INSN(scc) |
802 | e6e5906b | pbrook | { |
803 | e6e5906b | pbrook | int l1;
|
804 | e6e5906b | pbrook | int cond;
|
805 | e1f3808e | pbrook | TCGv reg; |
806 | e6e5906b | pbrook | |
807 | e6e5906b | pbrook | l1 = gen_new_label(); |
808 | e6e5906b | pbrook | cond = (insn >> 8) & 0xf; |
809 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
810 | e1f3808e | pbrook | tcg_gen_andi_i32(reg, reg, 0xffffff00);
|
811 | e1f3808e | pbrook | /* This is safe because we modify the reg directly, with no other values
|
812 | e1f3808e | pbrook | live. */
|
813 | e6e5906b | pbrook | gen_jmpcc(s, cond ^ 1, l1);
|
814 | e1f3808e | pbrook | tcg_gen_ori_i32(reg, reg, 0xff);
|
815 | e6e5906b | pbrook | gen_set_label(l1); |
816 | e6e5906b | pbrook | } |
817 | e6e5906b | pbrook | |
818 | 0633879f | pbrook | /* Force a TB lookup after an instruction that changes the CPU state. */
|
819 | 0633879f | pbrook | static void gen_lookup_tb(DisasContext *s) |
820 | 0633879f | pbrook | { |
821 | 0633879f | pbrook | gen_flush_cc_op(s); |
822 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_PC, s->pc); |
823 | 0633879f | pbrook | s->is_jmp = DISAS_UPDATE; |
824 | 0633879f | pbrook | } |
825 | 0633879f | pbrook | |
826 | e1f3808e | pbrook | /* Generate a jump to an immediate address. */
|
827 | e1f3808e | pbrook | static void gen_jmp_im(DisasContext *s, uint32_t dest) |
828 | e1f3808e | pbrook | { |
829 | e1f3808e | pbrook | gen_flush_cc_op(s); |
830 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_PC, dest); |
831 | e1f3808e | pbrook | s->is_jmp = DISAS_JUMP; |
832 | e1f3808e | pbrook | } |
833 | e1f3808e | pbrook | |
834 | e1f3808e | pbrook | /* Generate a jump to the address in qreg DEST. */
|
835 | e1f3808e | pbrook | static void gen_jmp(DisasContext *s, TCGv dest) |
836 | e6e5906b | pbrook | { |
837 | e6e5906b | pbrook | gen_flush_cc_op(s); |
838 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_PC, dest); |
839 | e6e5906b | pbrook | s->is_jmp = DISAS_JUMP; |
840 | e6e5906b | pbrook | } |
841 | e6e5906b | pbrook | |
842 | e6e5906b | pbrook | static void gen_exception(DisasContext *s, uint32_t where, int nr) |
843 | e6e5906b | pbrook | { |
844 | e6e5906b | pbrook | gen_flush_cc_op(s); |
845 | e1f3808e | pbrook | gen_jmp_im(s, where); |
846 | e1f3808e | pbrook | gen_helper_raise_exception(tcg_const_i32(nr)); |
847 | e6e5906b | pbrook | } |
848 | e6e5906b | pbrook | |
849 | 510ff0b7 | pbrook | static inline void gen_addr_fault(DisasContext *s) |
850 | 510ff0b7 | pbrook | { |
851 | 510ff0b7 | pbrook | gen_exception(s, s->insn_pc, EXCP_ADDRESS); |
852 | 510ff0b7 | pbrook | } |
853 | 510ff0b7 | pbrook | |
854 | e1f3808e | pbrook | #define SRC_EA(result, opsize, op_sign, addrp) do { \ |
855 | e1f3808e | pbrook | result = gen_ea(s, insn, opsize, NULL_QREG, addrp, op_sign ? EA_LOADS : EA_LOADU); \ |
856 | e1f3808e | pbrook | if (IS_NULL_QREG(result)) { \
|
857 | 510ff0b7 | pbrook | gen_addr_fault(s); \ |
858 | 510ff0b7 | pbrook | return; \
|
859 | 510ff0b7 | pbrook | } \ |
860 | 510ff0b7 | pbrook | } while (0) |
861 | 510ff0b7 | pbrook | |
862 | 510ff0b7 | pbrook | #define DEST_EA(insn, opsize, val, addrp) do { \ |
863 | e1f3808e | pbrook | TCGv ea_result = gen_ea(s, insn, opsize, val, addrp, EA_STORE); \ |
864 | e1f3808e | pbrook | if (IS_NULL_QREG(ea_result)) { \
|
865 | 510ff0b7 | pbrook | gen_addr_fault(s); \ |
866 | 510ff0b7 | pbrook | return; \
|
867 | 510ff0b7 | pbrook | } \ |
868 | 510ff0b7 | pbrook | } while (0) |
869 | 510ff0b7 | pbrook | |
870 | e6e5906b | pbrook | /* Generate a jump to an immediate address. */
|
871 | e6e5906b | pbrook | static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) |
872 | e6e5906b | pbrook | { |
873 | e6e5906b | pbrook | TranslationBlock *tb; |
874 | e6e5906b | pbrook | |
875 | e6e5906b | pbrook | tb = s->tb; |
876 | 551bd27f | ths | if (unlikely(s->singlestep_enabled)) {
|
877 | e6e5906b | pbrook | gen_exception(s, dest, EXCP_DEBUG); |
878 | e6e5906b | pbrook | } else if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) || |
879 | e6e5906b | pbrook | (s->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) { |
880 | 57fec1fe | bellard | tcg_gen_goto_tb(n); |
881 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_PC, dest); |
882 | 57fec1fe | bellard | tcg_gen_exit_tb((long)tb + n);
|
883 | e6e5906b | pbrook | } else {
|
884 | e1f3808e | pbrook | gen_jmp_im(s, dest); |
885 | 57fec1fe | bellard | tcg_gen_exit_tb(0);
|
886 | e6e5906b | pbrook | } |
887 | e6e5906b | pbrook | s->is_jmp = DISAS_TB_JUMP; |
888 | e6e5906b | pbrook | } |
889 | e6e5906b | pbrook | |
890 | e6e5906b | pbrook | DISAS_INSN(undef_mac) |
891 | e6e5906b | pbrook | { |
892 | e6e5906b | pbrook | gen_exception(s, s->pc - 2, EXCP_LINEA);
|
893 | e6e5906b | pbrook | } |
894 | e6e5906b | pbrook | |
895 | e6e5906b | pbrook | DISAS_INSN(undef_fpu) |
896 | e6e5906b | pbrook | { |
897 | e6e5906b | pbrook | gen_exception(s, s->pc - 2, EXCP_LINEF);
|
898 | e6e5906b | pbrook | } |
899 | e6e5906b | pbrook | |
900 | e6e5906b | pbrook | DISAS_INSN(undef) |
901 | e6e5906b | pbrook | { |
902 | e6e5906b | pbrook | gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED);
|
903 | e6e5906b | pbrook | cpu_abort(cpu_single_env, "Illegal instruction: %04x @ %08x",
|
904 | e6e5906b | pbrook | insn, s->pc - 2);
|
905 | e6e5906b | pbrook | } |
906 | e6e5906b | pbrook | |
907 | e6e5906b | pbrook | DISAS_INSN(mulw) |
908 | e6e5906b | pbrook | { |
909 | e1f3808e | pbrook | TCGv reg; |
910 | e1f3808e | pbrook | TCGv tmp; |
911 | e1f3808e | pbrook | TCGv src; |
912 | e6e5906b | pbrook | int sign;
|
913 | e6e5906b | pbrook | |
914 | e6e5906b | pbrook | sign = (insn & 0x100) != 0; |
915 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
916 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
917 | e6e5906b | pbrook | if (sign)
|
918 | e1f3808e | pbrook | tcg_gen_ext16s_i32(tmp, reg); |
919 | e6e5906b | pbrook | else
|
920 | e1f3808e | pbrook | tcg_gen_ext16u_i32(tmp, reg); |
921 | e1f3808e | pbrook | SRC_EA(src, OS_WORD, sign, NULL);
|
922 | e1f3808e | pbrook | tcg_gen_mul_i32(tmp, tmp, src); |
923 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
924 | e6e5906b | pbrook | /* Unlike m68k, coldfire always clears the overflow bit. */
|
925 | e6e5906b | pbrook | gen_logic_cc(s, tmp); |
926 | e6e5906b | pbrook | } |
927 | e6e5906b | pbrook | |
928 | e6e5906b | pbrook | DISAS_INSN(divw) |
929 | e6e5906b | pbrook | { |
930 | e1f3808e | pbrook | TCGv reg; |
931 | e1f3808e | pbrook | TCGv tmp; |
932 | e1f3808e | pbrook | TCGv src; |
933 | e6e5906b | pbrook | int sign;
|
934 | e6e5906b | pbrook | |
935 | e6e5906b | pbrook | sign = (insn & 0x100) != 0; |
936 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
937 | e6e5906b | pbrook | if (sign) {
|
938 | e1f3808e | pbrook | tcg_gen_ext16s_i32(QREG_DIV1, reg); |
939 | e6e5906b | pbrook | } else {
|
940 | e1f3808e | pbrook | tcg_gen_ext16u_i32(QREG_DIV1, reg); |
941 | e6e5906b | pbrook | } |
942 | e1f3808e | pbrook | SRC_EA(src, OS_WORD, sign, NULL);
|
943 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_DIV2, src); |
944 | e6e5906b | pbrook | if (sign) {
|
945 | e1f3808e | pbrook | gen_helper_divs(cpu_env, tcg_const_i32(1));
|
946 | e6e5906b | pbrook | } else {
|
947 | e1f3808e | pbrook | gen_helper_divu(cpu_env, tcg_const_i32(1));
|
948 | e6e5906b | pbrook | } |
949 | e6e5906b | pbrook | |
950 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
951 | e6e5906b | pbrook | src = gen_new_qreg(QMODE_I32); |
952 | e1f3808e | pbrook | tcg_gen_ext16u_i32(tmp, QREG_DIV1); |
953 | e1f3808e | pbrook | tcg_gen_shli_i32(src, QREG_DIV2, 16);
|
954 | e1f3808e | pbrook | tcg_gen_or_i32(reg, tmp, src); |
955 | e6e5906b | pbrook | s->cc_op = CC_OP_FLAGS; |
956 | e6e5906b | pbrook | } |
957 | e6e5906b | pbrook | |
958 | e6e5906b | pbrook | DISAS_INSN(divl) |
959 | e6e5906b | pbrook | { |
960 | e1f3808e | pbrook | TCGv num; |
961 | e1f3808e | pbrook | TCGv den; |
962 | e1f3808e | pbrook | TCGv reg; |
963 | e6e5906b | pbrook | uint16_t ext; |
964 | e6e5906b | pbrook | |
965 | 0633879f | pbrook | ext = lduw_code(s->pc); |
966 | e6e5906b | pbrook | s->pc += 2;
|
967 | e6e5906b | pbrook | if (ext & 0x87f8) { |
968 | e6e5906b | pbrook | gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED);
|
969 | e6e5906b | pbrook | return;
|
970 | e6e5906b | pbrook | } |
971 | e6e5906b | pbrook | num = DREG(ext, 12);
|
972 | e6e5906b | pbrook | reg = DREG(ext, 0);
|
973 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_DIV1, num); |
974 | 510ff0b7 | pbrook | SRC_EA(den, OS_LONG, 0, NULL); |
975 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_DIV2, den); |
976 | e6e5906b | pbrook | if (ext & 0x0800) { |
977 | e1f3808e | pbrook | gen_helper_divs(cpu_env, tcg_const_i32(0));
|
978 | e6e5906b | pbrook | } else {
|
979 | e1f3808e | pbrook | gen_helper_divu(cpu_env, tcg_const_i32(0));
|
980 | e6e5906b | pbrook | } |
981 | e1f3808e | pbrook | if ((ext & 7) == ((ext >> 12) & 7)) { |
982 | e6e5906b | pbrook | /* div */
|
983 | e1f3808e | pbrook | tcg_gen_mov_i32 (reg, QREG_DIV1); |
984 | e6e5906b | pbrook | } else {
|
985 | e6e5906b | pbrook | /* rem */
|
986 | e1f3808e | pbrook | tcg_gen_mov_i32 (reg, QREG_DIV2); |
987 | e6e5906b | pbrook | } |
988 | e6e5906b | pbrook | s->cc_op = CC_OP_FLAGS; |
989 | e6e5906b | pbrook | } |
990 | e6e5906b | pbrook | |
991 | e6e5906b | pbrook | DISAS_INSN(addsub) |
992 | e6e5906b | pbrook | { |
993 | e1f3808e | pbrook | TCGv reg; |
994 | e1f3808e | pbrook | TCGv dest; |
995 | e1f3808e | pbrook | TCGv src; |
996 | e1f3808e | pbrook | TCGv tmp; |
997 | e1f3808e | pbrook | TCGv addr; |
998 | e6e5906b | pbrook | int add;
|
999 | e6e5906b | pbrook | |
1000 | e6e5906b | pbrook | add = (insn & 0x4000) != 0; |
1001 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1002 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1003 | e6e5906b | pbrook | if (insn & 0x100) { |
1004 | 510ff0b7 | pbrook | SRC_EA(tmp, OS_LONG, 0, &addr);
|
1005 | e6e5906b | pbrook | src = reg; |
1006 | e6e5906b | pbrook | } else {
|
1007 | e6e5906b | pbrook | tmp = reg; |
1008 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, NULL); |
1009 | e6e5906b | pbrook | } |
1010 | e6e5906b | pbrook | if (add) {
|
1011 | e1f3808e | pbrook | tcg_gen_add_i32(dest, tmp, src); |
1012 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, dest, src); |
1013 | e6e5906b | pbrook | s->cc_op = CC_OP_ADD; |
1014 | e6e5906b | pbrook | } else {
|
1015 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, tmp, src); |
1016 | e1f3808e | pbrook | tcg_gen_sub_i32(dest, tmp, src); |
1017 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1018 | e6e5906b | pbrook | } |
1019 | e1f3808e | pbrook | gen_update_cc_add(dest, src); |
1020 | e6e5906b | pbrook | if (insn & 0x100) { |
1021 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, dest, &addr); |
1022 | e6e5906b | pbrook | } else {
|
1023 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, dest); |
1024 | e6e5906b | pbrook | } |
1025 | e6e5906b | pbrook | } |
1026 | e6e5906b | pbrook | |
1027 | e6e5906b | pbrook | |
1028 | e6e5906b | pbrook | /* Reverse the order of the bits in REG. */
|
1029 | e6e5906b | pbrook | DISAS_INSN(bitrev) |
1030 | e6e5906b | pbrook | { |
1031 | e1f3808e | pbrook | TCGv reg; |
1032 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1033 | e1f3808e | pbrook | gen_helper_bitrev(reg, reg); |
1034 | e6e5906b | pbrook | } |
1035 | e6e5906b | pbrook | |
1036 | e6e5906b | pbrook | DISAS_INSN(bitop_reg) |
1037 | e6e5906b | pbrook | { |
1038 | e6e5906b | pbrook | int opsize;
|
1039 | e6e5906b | pbrook | int op;
|
1040 | e1f3808e | pbrook | TCGv src1; |
1041 | e1f3808e | pbrook | TCGv src2; |
1042 | e1f3808e | pbrook | TCGv tmp; |
1043 | e1f3808e | pbrook | TCGv addr; |
1044 | e1f3808e | pbrook | TCGv dest; |
1045 | e6e5906b | pbrook | |
1046 | e6e5906b | pbrook | if ((insn & 0x38) != 0) |
1047 | e6e5906b | pbrook | opsize = OS_BYTE; |
1048 | e6e5906b | pbrook | else
|
1049 | e6e5906b | pbrook | opsize = OS_LONG; |
1050 | e6e5906b | pbrook | op = (insn >> 6) & 3; |
1051 | 510ff0b7 | pbrook | SRC_EA(src1, opsize, 0, op ? &addr: NULL); |
1052 | e6e5906b | pbrook | src2 = DREG(insn, 9);
|
1053 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1054 | e6e5906b | pbrook | |
1055 | e6e5906b | pbrook | gen_flush_flags(s); |
1056 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1057 | e6e5906b | pbrook | if (opsize == OS_BYTE)
|
1058 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, src2, 7);
|
1059 | e6e5906b | pbrook | else
|
1060 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, src2, 31);
|
1061 | e6e5906b | pbrook | src2 = tmp; |
1062 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1063 | e1f3808e | pbrook | tcg_gen_shr_i32(tmp, src1, src2); |
1064 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, tmp, 1);
|
1065 | e1f3808e | pbrook | tcg_gen_shli_i32(tmp, tmp, 2);
|
1066 | e1f3808e | pbrook | /* Clear CCF_Z if bit set. */
|
1067 | e1f3808e | pbrook | tcg_gen_ori_i32(QREG_CC_DEST, QREG_CC_DEST, CCF_Z); |
1068 | e1f3808e | pbrook | tcg_gen_xor_i32(QREG_CC_DEST, QREG_CC_DEST, tmp); |
1069 | e1f3808e | pbrook | |
1070 | e1f3808e | pbrook | tcg_gen_shl_i32(tmp, tcg_const_i32(1), src2);
|
1071 | e6e5906b | pbrook | switch (op) {
|
1072 | e6e5906b | pbrook | case 1: /* bchg */ |
1073 | e1f3808e | pbrook | tcg_gen_xor_i32(dest, src1, tmp); |
1074 | e6e5906b | pbrook | break;
|
1075 | e6e5906b | pbrook | case 2: /* bclr */ |
1076 | e1f3808e | pbrook | tcg_gen_not_i32(tmp, tmp); |
1077 | e1f3808e | pbrook | tcg_gen_and_i32(dest, src1, tmp); |
1078 | e6e5906b | pbrook | break;
|
1079 | e6e5906b | pbrook | case 3: /* bset */ |
1080 | e1f3808e | pbrook | tcg_gen_or_i32(dest, src1, tmp); |
1081 | e6e5906b | pbrook | break;
|
1082 | e6e5906b | pbrook | default: /* btst */ |
1083 | e6e5906b | pbrook | break;
|
1084 | e6e5906b | pbrook | } |
1085 | e6e5906b | pbrook | if (op)
|
1086 | 510ff0b7 | pbrook | DEST_EA(insn, opsize, dest, &addr); |
1087 | e6e5906b | pbrook | } |
1088 | e6e5906b | pbrook | |
1089 | e6e5906b | pbrook | DISAS_INSN(sats) |
1090 | e6e5906b | pbrook | { |
1091 | e1f3808e | pbrook | TCGv reg; |
1092 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1093 | e6e5906b | pbrook | gen_flush_flags(s); |
1094 | e1f3808e | pbrook | gen_helper_sats(reg, reg, QREG_CC_DEST); |
1095 | e1f3808e | pbrook | gen_logic_cc(s, reg); |
1096 | e6e5906b | pbrook | } |
1097 | e6e5906b | pbrook | |
1098 | e1f3808e | pbrook | static void gen_push(DisasContext *s, TCGv val) |
1099 | e6e5906b | pbrook | { |
1100 | e1f3808e | pbrook | TCGv tmp; |
1101 | e6e5906b | pbrook | |
1102 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1103 | e1f3808e | pbrook | tcg_gen_subi_i32(tmp, QREG_SP, 4);
|
1104 | 0633879f | pbrook | gen_store(s, OS_LONG, tmp, val); |
1105 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_SP, tmp); |
1106 | e6e5906b | pbrook | } |
1107 | e6e5906b | pbrook | |
1108 | e6e5906b | pbrook | DISAS_INSN(movem) |
1109 | e6e5906b | pbrook | { |
1110 | e1f3808e | pbrook | TCGv addr; |
1111 | e6e5906b | pbrook | int i;
|
1112 | e6e5906b | pbrook | uint16_t mask; |
1113 | e1f3808e | pbrook | TCGv reg; |
1114 | e1f3808e | pbrook | TCGv tmp; |
1115 | e6e5906b | pbrook | int is_load;
|
1116 | e6e5906b | pbrook | |
1117 | 0633879f | pbrook | mask = lduw_code(s->pc); |
1118 | e6e5906b | pbrook | s->pc += 2;
|
1119 | e6e5906b | pbrook | tmp = gen_lea(s, insn, OS_LONG); |
1120 | e1f3808e | pbrook | if (IS_NULL_QREG(tmp)) {
|
1121 | 510ff0b7 | pbrook | gen_addr_fault(s); |
1122 | 510ff0b7 | pbrook | return;
|
1123 | 510ff0b7 | pbrook | } |
1124 | e6e5906b | pbrook | addr = gen_new_qreg(QMODE_I32); |
1125 | e1f3808e | pbrook | tcg_gen_mov_i32(addr, tmp); |
1126 | e6e5906b | pbrook | is_load = ((insn & 0x0400) != 0); |
1127 | e6e5906b | pbrook | for (i = 0; i < 16; i++, mask >>= 1) { |
1128 | e6e5906b | pbrook | if (mask & 1) { |
1129 | e6e5906b | pbrook | if (i < 8) |
1130 | e6e5906b | pbrook | reg = DREG(i, 0);
|
1131 | e6e5906b | pbrook | else
|
1132 | e6e5906b | pbrook | reg = AREG(i, 0);
|
1133 | e6e5906b | pbrook | if (is_load) {
|
1134 | 0633879f | pbrook | tmp = gen_load(s, OS_LONG, addr, 0);
|
1135 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
1136 | e6e5906b | pbrook | } else {
|
1137 | 0633879f | pbrook | gen_store(s, OS_LONG, addr, reg); |
1138 | e6e5906b | pbrook | } |
1139 | e6e5906b | pbrook | if (mask != 1) |
1140 | e1f3808e | pbrook | tcg_gen_addi_i32(addr, addr, 4);
|
1141 | e6e5906b | pbrook | } |
1142 | e6e5906b | pbrook | } |
1143 | e6e5906b | pbrook | } |
1144 | e6e5906b | pbrook | |
1145 | e6e5906b | pbrook | DISAS_INSN(bitop_im) |
1146 | e6e5906b | pbrook | { |
1147 | e6e5906b | pbrook | int opsize;
|
1148 | e6e5906b | pbrook | int op;
|
1149 | e1f3808e | pbrook | TCGv src1; |
1150 | e6e5906b | pbrook | uint32_t mask; |
1151 | e6e5906b | pbrook | int bitnum;
|
1152 | e1f3808e | pbrook | TCGv tmp; |
1153 | e1f3808e | pbrook | TCGv addr; |
1154 | e6e5906b | pbrook | |
1155 | e6e5906b | pbrook | if ((insn & 0x38) != 0) |
1156 | e6e5906b | pbrook | opsize = OS_BYTE; |
1157 | e6e5906b | pbrook | else
|
1158 | e6e5906b | pbrook | opsize = OS_LONG; |
1159 | e6e5906b | pbrook | op = (insn >> 6) & 3; |
1160 | e6e5906b | pbrook | |
1161 | 0633879f | pbrook | bitnum = lduw_code(s->pc); |
1162 | e6e5906b | pbrook | s->pc += 2;
|
1163 | e6e5906b | pbrook | if (bitnum & 0xff00) { |
1164 | e6e5906b | pbrook | disas_undef(s, insn); |
1165 | e6e5906b | pbrook | return;
|
1166 | e6e5906b | pbrook | } |
1167 | e6e5906b | pbrook | |
1168 | 510ff0b7 | pbrook | SRC_EA(src1, opsize, 0, op ? &addr: NULL); |
1169 | e6e5906b | pbrook | |
1170 | e6e5906b | pbrook | gen_flush_flags(s); |
1171 | e6e5906b | pbrook | if (opsize == OS_BYTE)
|
1172 | e6e5906b | pbrook | bitnum &= 7;
|
1173 | e6e5906b | pbrook | else
|
1174 | e6e5906b | pbrook | bitnum &= 31;
|
1175 | e6e5906b | pbrook | mask = 1 << bitnum;
|
1176 | e6e5906b | pbrook | |
1177 | e1f3808e | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1178 | e1f3808e | pbrook | assert (CCF_Z == (1 << 2)); |
1179 | e1f3808e | pbrook | if (bitnum > 2) |
1180 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, src1, bitnum - 2);
|
1181 | e1f3808e | pbrook | else if (bitnum < 2) |
1182 | e1f3808e | pbrook | tcg_gen_shli_i32(tmp, src1, 2 - bitnum);
|
1183 | e6e5906b | pbrook | else
|
1184 | e1f3808e | pbrook | tcg_gen_mov_i32(tmp, src1); |
1185 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, tmp, CCF_Z); |
1186 | e1f3808e | pbrook | /* Clear CCF_Z if bit set. */
|
1187 | e1f3808e | pbrook | tcg_gen_ori_i32(QREG_CC_DEST, QREG_CC_DEST, CCF_Z); |
1188 | e1f3808e | pbrook | tcg_gen_xor_i32(QREG_CC_DEST, QREG_CC_DEST, tmp); |
1189 | e1f3808e | pbrook | if (op) {
|
1190 | e1f3808e | pbrook | switch (op) {
|
1191 | e1f3808e | pbrook | case 1: /* bchg */ |
1192 | e1f3808e | pbrook | tcg_gen_xori_i32(tmp, src1, mask); |
1193 | e1f3808e | pbrook | break;
|
1194 | e1f3808e | pbrook | case 2: /* bclr */ |
1195 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, src1, ~mask); |
1196 | e1f3808e | pbrook | break;
|
1197 | e1f3808e | pbrook | case 3: /* bset */ |
1198 | e1f3808e | pbrook | tcg_gen_ori_i32(tmp, src1, mask); |
1199 | e1f3808e | pbrook | break;
|
1200 | e1f3808e | pbrook | default: /* btst */ |
1201 | e1f3808e | pbrook | break;
|
1202 | e1f3808e | pbrook | } |
1203 | e1f3808e | pbrook | DEST_EA(insn, opsize, tmp, &addr); |
1204 | e6e5906b | pbrook | } |
1205 | e6e5906b | pbrook | } |
1206 | e6e5906b | pbrook | |
1207 | e6e5906b | pbrook | DISAS_INSN(arith_im) |
1208 | e6e5906b | pbrook | { |
1209 | e6e5906b | pbrook | int op;
|
1210 | e1f3808e | pbrook | uint32_t im; |
1211 | e1f3808e | pbrook | TCGv src1; |
1212 | e1f3808e | pbrook | TCGv dest; |
1213 | e1f3808e | pbrook | TCGv addr; |
1214 | e6e5906b | pbrook | |
1215 | e6e5906b | pbrook | op = (insn >> 9) & 7; |
1216 | 510ff0b7 | pbrook | SRC_EA(src1, OS_LONG, 0, (op == 6) ? NULL : &addr); |
1217 | e1f3808e | pbrook | im = read_im32(s); |
1218 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1219 | e6e5906b | pbrook | switch (op) {
|
1220 | e6e5906b | pbrook | case 0: /* ori */ |
1221 | e1f3808e | pbrook | tcg_gen_ori_i32(dest, src1, im); |
1222 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1223 | e6e5906b | pbrook | break;
|
1224 | e6e5906b | pbrook | case 1: /* andi */ |
1225 | e1f3808e | pbrook | tcg_gen_andi_i32(dest, src1, im); |
1226 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1227 | e6e5906b | pbrook | break;
|
1228 | e6e5906b | pbrook | case 2: /* subi */ |
1229 | e1f3808e | pbrook | tcg_gen_mov_i32(dest, src1); |
1230 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, dest, gen_im32(im)); |
1231 | e1f3808e | pbrook | tcg_gen_subi_i32(dest, dest, im); |
1232 | e1f3808e | pbrook | gen_update_cc_add(dest, gen_im32(im)); |
1233 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1234 | e6e5906b | pbrook | break;
|
1235 | e6e5906b | pbrook | case 3: /* addi */ |
1236 | e1f3808e | pbrook | tcg_gen_mov_i32(dest, src1); |
1237 | e1f3808e | pbrook | tcg_gen_addi_i32(dest, dest, im); |
1238 | e1f3808e | pbrook | gen_update_cc_add(dest, gen_im32(im)); |
1239 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, dest, gen_im32(im)); |
1240 | e6e5906b | pbrook | s->cc_op = CC_OP_ADD; |
1241 | e6e5906b | pbrook | break;
|
1242 | e6e5906b | pbrook | case 5: /* eori */ |
1243 | e1f3808e | pbrook | tcg_gen_xori_i32(dest, src1, im); |
1244 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1245 | e6e5906b | pbrook | break;
|
1246 | e6e5906b | pbrook | case 6: /* cmpi */ |
1247 | e1f3808e | pbrook | tcg_gen_mov_i32(dest, src1); |
1248 | e1f3808e | pbrook | tcg_gen_subi_i32(dest, dest, im); |
1249 | e1f3808e | pbrook | gen_update_cc_add(dest, gen_im32(im)); |
1250 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1251 | e6e5906b | pbrook | break;
|
1252 | e6e5906b | pbrook | default:
|
1253 | e6e5906b | pbrook | abort(); |
1254 | e6e5906b | pbrook | } |
1255 | e6e5906b | pbrook | if (op != 6) { |
1256 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, dest, &addr); |
1257 | e6e5906b | pbrook | } |
1258 | e6e5906b | pbrook | } |
1259 | e6e5906b | pbrook | |
1260 | e6e5906b | pbrook | DISAS_INSN(byterev) |
1261 | e6e5906b | pbrook | { |
1262 | e1f3808e | pbrook | TCGv reg; |
1263 | e6e5906b | pbrook | |
1264 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1265 | e1f3808e | pbrook | tcg_gen_bswap_i32(reg, reg); |
1266 | e6e5906b | pbrook | } |
1267 | e6e5906b | pbrook | |
1268 | e6e5906b | pbrook | DISAS_INSN(move) |
1269 | e6e5906b | pbrook | { |
1270 | e1f3808e | pbrook | TCGv src; |
1271 | e1f3808e | pbrook | TCGv dest; |
1272 | e6e5906b | pbrook | int op;
|
1273 | e6e5906b | pbrook | int opsize;
|
1274 | e6e5906b | pbrook | |
1275 | e6e5906b | pbrook | switch (insn >> 12) { |
1276 | e6e5906b | pbrook | case 1: /* move.b */ |
1277 | e6e5906b | pbrook | opsize = OS_BYTE; |
1278 | e6e5906b | pbrook | break;
|
1279 | e6e5906b | pbrook | case 2: /* move.l */ |
1280 | e6e5906b | pbrook | opsize = OS_LONG; |
1281 | e6e5906b | pbrook | break;
|
1282 | e6e5906b | pbrook | case 3: /* move.w */ |
1283 | e6e5906b | pbrook | opsize = OS_WORD; |
1284 | e6e5906b | pbrook | break;
|
1285 | e6e5906b | pbrook | default:
|
1286 | e6e5906b | pbrook | abort(); |
1287 | e6e5906b | pbrook | } |
1288 | e1f3808e | pbrook | SRC_EA(src, opsize, 1, NULL); |
1289 | e6e5906b | pbrook | op = (insn >> 6) & 7; |
1290 | e6e5906b | pbrook | if (op == 1) { |
1291 | e6e5906b | pbrook | /* movea */
|
1292 | e6e5906b | pbrook | /* The value will already have been sign extended. */
|
1293 | e6e5906b | pbrook | dest = AREG(insn, 9);
|
1294 | e1f3808e | pbrook | tcg_gen_mov_i32(dest, src); |
1295 | e6e5906b | pbrook | } else {
|
1296 | e6e5906b | pbrook | /* normal move */
|
1297 | e6e5906b | pbrook | uint16_t dest_ea; |
1298 | e6e5906b | pbrook | dest_ea = ((insn >> 9) & 7) | (op << 3); |
1299 | 510ff0b7 | pbrook | DEST_EA(dest_ea, opsize, src, NULL);
|
1300 | e6e5906b | pbrook | /* This will be correct because loads sign extend. */
|
1301 | e6e5906b | pbrook | gen_logic_cc(s, src); |
1302 | e6e5906b | pbrook | } |
1303 | e6e5906b | pbrook | } |
1304 | e6e5906b | pbrook | |
1305 | e6e5906b | pbrook | DISAS_INSN(negx) |
1306 | e6e5906b | pbrook | { |
1307 | e1f3808e | pbrook | TCGv reg; |
1308 | e6e5906b | pbrook | |
1309 | e6e5906b | pbrook | gen_flush_flags(s); |
1310 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1311 | e1f3808e | pbrook | gen_helper_subx_cc(reg, cpu_env, tcg_const_i32(0), reg);
|
1312 | e6e5906b | pbrook | } |
1313 | e6e5906b | pbrook | |
1314 | e6e5906b | pbrook | DISAS_INSN(lea) |
1315 | e6e5906b | pbrook | { |
1316 | e1f3808e | pbrook | TCGv reg; |
1317 | e1f3808e | pbrook | TCGv tmp; |
1318 | e6e5906b | pbrook | |
1319 | e6e5906b | pbrook | reg = AREG(insn, 9);
|
1320 | e6e5906b | pbrook | tmp = gen_lea(s, insn, OS_LONG); |
1321 | e1f3808e | pbrook | if (IS_NULL_QREG(tmp)) {
|
1322 | 510ff0b7 | pbrook | gen_addr_fault(s); |
1323 | 510ff0b7 | pbrook | return;
|
1324 | 510ff0b7 | pbrook | } |
1325 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
1326 | e6e5906b | pbrook | } |
1327 | e6e5906b | pbrook | |
1328 | e6e5906b | pbrook | DISAS_INSN(clr) |
1329 | e6e5906b | pbrook | { |
1330 | e6e5906b | pbrook | int opsize;
|
1331 | e6e5906b | pbrook | |
1332 | e6e5906b | pbrook | switch ((insn >> 6) & 3) { |
1333 | e6e5906b | pbrook | case 0: /* clr.b */ |
1334 | e6e5906b | pbrook | opsize = OS_BYTE; |
1335 | e6e5906b | pbrook | break;
|
1336 | e6e5906b | pbrook | case 1: /* clr.w */ |
1337 | e6e5906b | pbrook | opsize = OS_WORD; |
1338 | e6e5906b | pbrook | break;
|
1339 | e6e5906b | pbrook | case 2: /* clr.l */ |
1340 | e6e5906b | pbrook | opsize = OS_LONG; |
1341 | e6e5906b | pbrook | break;
|
1342 | e6e5906b | pbrook | default:
|
1343 | e6e5906b | pbrook | abort(); |
1344 | e6e5906b | pbrook | } |
1345 | 510ff0b7 | pbrook | DEST_EA(insn, opsize, gen_im32(0), NULL); |
1346 | e6e5906b | pbrook | gen_logic_cc(s, gen_im32(0));
|
1347 | e6e5906b | pbrook | } |
1348 | e6e5906b | pbrook | |
1349 | e1f3808e | pbrook | static TCGv gen_get_ccr(DisasContext *s)
|
1350 | e6e5906b | pbrook | { |
1351 | e1f3808e | pbrook | TCGv dest; |
1352 | e6e5906b | pbrook | |
1353 | e6e5906b | pbrook | gen_flush_flags(s); |
1354 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1355 | e1f3808e | pbrook | tcg_gen_shli_i32(dest, QREG_CC_X, 4);
|
1356 | e1f3808e | pbrook | tcg_gen_or_i32(dest, dest, QREG_CC_DEST); |
1357 | 0633879f | pbrook | return dest;
|
1358 | 0633879f | pbrook | } |
1359 | 0633879f | pbrook | |
1360 | 0633879f | pbrook | DISAS_INSN(move_from_ccr) |
1361 | 0633879f | pbrook | { |
1362 | e1f3808e | pbrook | TCGv reg; |
1363 | e1f3808e | pbrook | TCGv ccr; |
1364 | 0633879f | pbrook | |
1365 | 0633879f | pbrook | ccr = gen_get_ccr(s); |
1366 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1367 | 0633879f | pbrook | gen_partset_reg(OS_WORD, reg, ccr); |
1368 | e6e5906b | pbrook | } |
1369 | e6e5906b | pbrook | |
1370 | e6e5906b | pbrook | DISAS_INSN(neg) |
1371 | e6e5906b | pbrook | { |
1372 | e1f3808e | pbrook | TCGv reg; |
1373 | e1f3808e | pbrook | TCGv src1; |
1374 | e6e5906b | pbrook | |
1375 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1376 | e6e5906b | pbrook | src1 = gen_new_qreg(QMODE_I32); |
1377 | e1f3808e | pbrook | tcg_gen_mov_i32(src1, reg); |
1378 | e1f3808e | pbrook | tcg_gen_neg_i32(reg, src1); |
1379 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1380 | e1f3808e | pbrook | gen_update_cc_add(reg, src1); |
1381 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, tcg_const_i32(0), src1);
|
1382 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1383 | e6e5906b | pbrook | } |
1384 | e6e5906b | pbrook | |
1385 | 0633879f | pbrook | static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only) |
1386 | 0633879f | pbrook | { |
1387 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_CC_DEST, val & 0xf);
|
1388 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_CC_X, (val & 0x10) >> 4); |
1389 | 0633879f | pbrook | if (!ccr_only) {
|
1390 | e1f3808e | pbrook | gen_helper_set_sr(cpu_env, tcg_const_i32(val & 0xff00));
|
1391 | 0633879f | pbrook | } |
1392 | 0633879f | pbrook | } |
1393 | 0633879f | pbrook | |
1394 | 0633879f | pbrook | static void gen_set_sr(DisasContext *s, uint16_t insn, int ccr_only) |
1395 | e6e5906b | pbrook | { |
1396 | e1f3808e | pbrook | TCGv tmp; |
1397 | e1f3808e | pbrook | TCGv reg; |
1398 | e6e5906b | pbrook | |
1399 | e6e5906b | pbrook | s->cc_op = CC_OP_FLAGS; |
1400 | e6e5906b | pbrook | if ((insn & 0x38) == 0) |
1401 | e6e5906b | pbrook | { |
1402 | e1f3808e | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1403 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1404 | e1f3808e | pbrook | tcg_gen_andi_i32(QREG_CC_DEST, reg, 0xf);
|
1405 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, reg, 4);
|
1406 | e1f3808e | pbrook | tcg_gen_andi_i32(QREG_CC_X, tmp, 1);
|
1407 | 0633879f | pbrook | if (!ccr_only) {
|
1408 | e1f3808e | pbrook | gen_helper_set_sr(cpu_env, reg); |
1409 | 0633879f | pbrook | } |
1410 | e6e5906b | pbrook | } |
1411 | 0633879f | pbrook | else if ((insn & 0x3f) == 0x3c) |
1412 | e6e5906b | pbrook | { |
1413 | 0633879f | pbrook | uint16_t val; |
1414 | 0633879f | pbrook | val = lduw_code(s->pc); |
1415 | e6e5906b | pbrook | s->pc += 2;
|
1416 | 0633879f | pbrook | gen_set_sr_im(s, val, ccr_only); |
1417 | e6e5906b | pbrook | } |
1418 | e6e5906b | pbrook | else
|
1419 | e6e5906b | pbrook | disas_undef(s, insn); |
1420 | e6e5906b | pbrook | } |
1421 | e6e5906b | pbrook | |
1422 | 0633879f | pbrook | DISAS_INSN(move_to_ccr) |
1423 | 0633879f | pbrook | { |
1424 | 0633879f | pbrook | gen_set_sr(s, insn, 1);
|
1425 | 0633879f | pbrook | } |
1426 | 0633879f | pbrook | |
1427 | e6e5906b | pbrook | DISAS_INSN(not) |
1428 | e6e5906b | pbrook | { |
1429 | e1f3808e | pbrook | TCGv reg; |
1430 | e6e5906b | pbrook | |
1431 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1432 | e1f3808e | pbrook | tcg_gen_not_i32(reg, reg); |
1433 | e6e5906b | pbrook | gen_logic_cc(s, reg); |
1434 | e6e5906b | pbrook | } |
1435 | e6e5906b | pbrook | |
1436 | e6e5906b | pbrook | DISAS_INSN(swap) |
1437 | e6e5906b | pbrook | { |
1438 | e1f3808e | pbrook | TCGv src1; |
1439 | e1f3808e | pbrook | TCGv src2; |
1440 | e1f3808e | pbrook | TCGv reg; |
1441 | e6e5906b | pbrook | |
1442 | e6e5906b | pbrook | src1 = gen_new_qreg(QMODE_I32); |
1443 | e6e5906b | pbrook | src2 = gen_new_qreg(QMODE_I32); |
1444 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1445 | e1f3808e | pbrook | tcg_gen_shli_i32(src1, reg, 16);
|
1446 | e1f3808e | pbrook | tcg_gen_shri_i32(src2, reg, 16);
|
1447 | e1f3808e | pbrook | tcg_gen_or_i32(reg, src1, src2); |
1448 | e1f3808e | pbrook | gen_logic_cc(s, reg); |
1449 | e6e5906b | pbrook | } |
1450 | e6e5906b | pbrook | |
1451 | e6e5906b | pbrook | DISAS_INSN(pea) |
1452 | e6e5906b | pbrook | { |
1453 | e1f3808e | pbrook | TCGv tmp; |
1454 | e6e5906b | pbrook | |
1455 | e6e5906b | pbrook | tmp = gen_lea(s, insn, OS_LONG); |
1456 | e1f3808e | pbrook | if (IS_NULL_QREG(tmp)) {
|
1457 | 510ff0b7 | pbrook | gen_addr_fault(s); |
1458 | 510ff0b7 | pbrook | return;
|
1459 | 510ff0b7 | pbrook | } |
1460 | 0633879f | pbrook | gen_push(s, tmp); |
1461 | e6e5906b | pbrook | } |
1462 | e6e5906b | pbrook | |
1463 | e6e5906b | pbrook | DISAS_INSN(ext) |
1464 | e6e5906b | pbrook | { |
1465 | e6e5906b | pbrook | int op;
|
1466 | e1f3808e | pbrook | TCGv reg; |
1467 | e1f3808e | pbrook | TCGv tmp; |
1468 | e6e5906b | pbrook | |
1469 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1470 | e6e5906b | pbrook | op = (insn >> 6) & 7; |
1471 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1472 | e6e5906b | pbrook | if (op == 3) |
1473 | e1f3808e | pbrook | tcg_gen_ext16s_i32(tmp, reg); |
1474 | e6e5906b | pbrook | else
|
1475 | e1f3808e | pbrook | tcg_gen_ext8s_i32(tmp, reg); |
1476 | e6e5906b | pbrook | if (op == 2) |
1477 | e6e5906b | pbrook | gen_partset_reg(OS_WORD, reg, tmp); |
1478 | e6e5906b | pbrook | else
|
1479 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
1480 | e6e5906b | pbrook | gen_logic_cc(s, tmp); |
1481 | e6e5906b | pbrook | } |
1482 | e6e5906b | pbrook | |
1483 | e6e5906b | pbrook | DISAS_INSN(tst) |
1484 | e6e5906b | pbrook | { |
1485 | e6e5906b | pbrook | int opsize;
|
1486 | e1f3808e | pbrook | TCGv tmp; |
1487 | e6e5906b | pbrook | |
1488 | e6e5906b | pbrook | switch ((insn >> 6) & 3) { |
1489 | e6e5906b | pbrook | case 0: /* tst.b */ |
1490 | e6e5906b | pbrook | opsize = OS_BYTE; |
1491 | e6e5906b | pbrook | break;
|
1492 | e6e5906b | pbrook | case 1: /* tst.w */ |
1493 | e6e5906b | pbrook | opsize = OS_WORD; |
1494 | e6e5906b | pbrook | break;
|
1495 | e6e5906b | pbrook | case 2: /* tst.l */ |
1496 | e6e5906b | pbrook | opsize = OS_LONG; |
1497 | e6e5906b | pbrook | break;
|
1498 | e6e5906b | pbrook | default:
|
1499 | e6e5906b | pbrook | abort(); |
1500 | e6e5906b | pbrook | } |
1501 | e1f3808e | pbrook | SRC_EA(tmp, opsize, 1, NULL); |
1502 | e6e5906b | pbrook | gen_logic_cc(s, tmp); |
1503 | e6e5906b | pbrook | } |
1504 | e6e5906b | pbrook | |
1505 | e6e5906b | pbrook | DISAS_INSN(pulse) |
1506 | e6e5906b | pbrook | { |
1507 | e6e5906b | pbrook | /* Implemented as a NOP. */
|
1508 | e6e5906b | pbrook | } |
1509 | e6e5906b | pbrook | |
1510 | e6e5906b | pbrook | DISAS_INSN(illegal) |
1511 | e6e5906b | pbrook | { |
1512 | e6e5906b | pbrook | gen_exception(s, s->pc - 2, EXCP_ILLEGAL);
|
1513 | e6e5906b | pbrook | } |
1514 | e6e5906b | pbrook | |
1515 | e6e5906b | pbrook | /* ??? This should be atomic. */
|
1516 | e6e5906b | pbrook | DISAS_INSN(tas) |
1517 | e6e5906b | pbrook | { |
1518 | e1f3808e | pbrook | TCGv dest; |
1519 | e1f3808e | pbrook | TCGv src1; |
1520 | e1f3808e | pbrook | TCGv addr; |
1521 | e6e5906b | pbrook | |
1522 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1523 | e1f3808e | pbrook | SRC_EA(src1, OS_BYTE, 1, &addr);
|
1524 | e6e5906b | pbrook | gen_logic_cc(s, src1); |
1525 | e1f3808e | pbrook | tcg_gen_ori_i32(dest, src1, 0x80);
|
1526 | 510ff0b7 | pbrook | DEST_EA(insn, OS_BYTE, dest, &addr); |
1527 | e6e5906b | pbrook | } |
1528 | e6e5906b | pbrook | |
1529 | e6e5906b | pbrook | DISAS_INSN(mull) |
1530 | e6e5906b | pbrook | { |
1531 | e6e5906b | pbrook | uint16_t ext; |
1532 | e1f3808e | pbrook | TCGv reg; |
1533 | e1f3808e | pbrook | TCGv src1; |
1534 | e1f3808e | pbrook | TCGv dest; |
1535 | e6e5906b | pbrook | |
1536 | e6e5906b | pbrook | /* The upper 32 bits of the product are discarded, so
|
1537 | e6e5906b | pbrook | muls.l and mulu.l are functionally equivalent. */
|
1538 | 0633879f | pbrook | ext = lduw_code(s->pc); |
1539 | e6e5906b | pbrook | s->pc += 2;
|
1540 | e6e5906b | pbrook | if (ext & 0x87ff) { |
1541 | e6e5906b | pbrook | gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED);
|
1542 | e6e5906b | pbrook | return;
|
1543 | e6e5906b | pbrook | } |
1544 | e6e5906b | pbrook | reg = DREG(ext, 12);
|
1545 | 510ff0b7 | pbrook | SRC_EA(src1, OS_LONG, 0, NULL); |
1546 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1547 | e1f3808e | pbrook | tcg_gen_mul_i32(dest, src1, reg); |
1548 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, dest); |
1549 | e6e5906b | pbrook | /* Unlike m68k, coldfire always clears the overflow bit. */
|
1550 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1551 | e6e5906b | pbrook | } |
1552 | e6e5906b | pbrook | |
1553 | e6e5906b | pbrook | DISAS_INSN(link) |
1554 | e6e5906b | pbrook | { |
1555 | e6e5906b | pbrook | int16_t offset; |
1556 | e1f3808e | pbrook | TCGv reg; |
1557 | e1f3808e | pbrook | TCGv tmp; |
1558 | e6e5906b | pbrook | |
1559 | 0633879f | pbrook | offset = ldsw_code(s->pc); |
1560 | e6e5906b | pbrook | s->pc += 2;
|
1561 | e6e5906b | pbrook | reg = AREG(insn, 0);
|
1562 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_I32); |
1563 | e1f3808e | pbrook | tcg_gen_subi_i32(tmp, QREG_SP, 4);
|
1564 | 0633879f | pbrook | gen_store(s, OS_LONG, tmp, reg); |
1565 | e1f3808e | pbrook | if ((insn & 7) != 7) |
1566 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
1567 | e1f3808e | pbrook | tcg_gen_addi_i32(QREG_SP, tmp, offset); |
1568 | e6e5906b | pbrook | } |
1569 | e6e5906b | pbrook | |
1570 | e6e5906b | pbrook | DISAS_INSN(unlk) |
1571 | e6e5906b | pbrook | { |
1572 | e1f3808e | pbrook | TCGv src; |
1573 | e1f3808e | pbrook | TCGv reg; |
1574 | e1f3808e | pbrook | TCGv tmp; |
1575 | e6e5906b | pbrook | |
1576 | e6e5906b | pbrook | src = gen_new_qreg(QMODE_I32); |
1577 | e6e5906b | pbrook | reg = AREG(insn, 0);
|
1578 | e1f3808e | pbrook | tcg_gen_mov_i32(src, reg); |
1579 | 0633879f | pbrook | tmp = gen_load(s, OS_LONG, src, 0);
|
1580 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, tmp); |
1581 | e1f3808e | pbrook | tcg_gen_addi_i32(QREG_SP, src, 4);
|
1582 | e6e5906b | pbrook | } |
1583 | e6e5906b | pbrook | |
1584 | e6e5906b | pbrook | DISAS_INSN(nop) |
1585 | e6e5906b | pbrook | { |
1586 | e6e5906b | pbrook | } |
1587 | e6e5906b | pbrook | |
1588 | e6e5906b | pbrook | DISAS_INSN(rts) |
1589 | e6e5906b | pbrook | { |
1590 | e1f3808e | pbrook | TCGv tmp; |
1591 | e6e5906b | pbrook | |
1592 | 0633879f | pbrook | tmp = gen_load(s, OS_LONG, QREG_SP, 0);
|
1593 | e1f3808e | pbrook | tcg_gen_addi_i32(QREG_SP, QREG_SP, 4);
|
1594 | e6e5906b | pbrook | gen_jmp(s, tmp); |
1595 | e6e5906b | pbrook | } |
1596 | e6e5906b | pbrook | |
1597 | e6e5906b | pbrook | DISAS_INSN(jump) |
1598 | e6e5906b | pbrook | { |
1599 | e1f3808e | pbrook | TCGv tmp; |
1600 | e6e5906b | pbrook | |
1601 | e6e5906b | pbrook | /* Load the target address first to ensure correct exception
|
1602 | e6e5906b | pbrook | behavior. */
|
1603 | e6e5906b | pbrook | tmp = gen_lea(s, insn, OS_LONG); |
1604 | e1f3808e | pbrook | if (IS_NULL_QREG(tmp)) {
|
1605 | 510ff0b7 | pbrook | gen_addr_fault(s); |
1606 | 510ff0b7 | pbrook | return;
|
1607 | 510ff0b7 | pbrook | } |
1608 | e6e5906b | pbrook | if ((insn & 0x40) == 0) { |
1609 | e6e5906b | pbrook | /* jsr */
|
1610 | 0633879f | pbrook | gen_push(s, gen_im32(s->pc)); |
1611 | e6e5906b | pbrook | } |
1612 | e6e5906b | pbrook | gen_jmp(s, tmp); |
1613 | e6e5906b | pbrook | } |
1614 | e6e5906b | pbrook | |
1615 | e6e5906b | pbrook | DISAS_INSN(addsubq) |
1616 | e6e5906b | pbrook | { |
1617 | e1f3808e | pbrook | TCGv src1; |
1618 | e1f3808e | pbrook | TCGv src2; |
1619 | e1f3808e | pbrook | TCGv dest; |
1620 | e6e5906b | pbrook | int val;
|
1621 | e1f3808e | pbrook | TCGv addr; |
1622 | e6e5906b | pbrook | |
1623 | 510ff0b7 | pbrook | SRC_EA(src1, OS_LONG, 0, &addr);
|
1624 | e6e5906b | pbrook | val = (insn >> 9) & 7; |
1625 | e6e5906b | pbrook | if (val == 0) |
1626 | e6e5906b | pbrook | val = 8;
|
1627 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1628 | e1f3808e | pbrook | tcg_gen_mov_i32(dest, src1); |
1629 | e6e5906b | pbrook | if ((insn & 0x38) == 0x08) { |
1630 | e6e5906b | pbrook | /* Don't update condition codes if the destination is an
|
1631 | e6e5906b | pbrook | address register. */
|
1632 | e6e5906b | pbrook | if (insn & 0x0100) { |
1633 | e1f3808e | pbrook | tcg_gen_subi_i32(dest, dest, val); |
1634 | e6e5906b | pbrook | } else {
|
1635 | e1f3808e | pbrook | tcg_gen_addi_i32(dest, dest, val); |
1636 | e6e5906b | pbrook | } |
1637 | e6e5906b | pbrook | } else {
|
1638 | e1f3808e | pbrook | src2 = gen_im32(val); |
1639 | e6e5906b | pbrook | if (insn & 0x0100) { |
1640 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, dest, src2); |
1641 | e1f3808e | pbrook | tcg_gen_subi_i32(dest, dest, val); |
1642 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1643 | e6e5906b | pbrook | } else {
|
1644 | e1f3808e | pbrook | tcg_gen_addi_i32(dest, dest, val); |
1645 | e1f3808e | pbrook | gen_helper_xflag_lt(QREG_CC_X, dest, src2); |
1646 | e6e5906b | pbrook | s->cc_op = CC_OP_ADD; |
1647 | e6e5906b | pbrook | } |
1648 | e1f3808e | pbrook | gen_update_cc_add(dest, src2); |
1649 | e6e5906b | pbrook | } |
1650 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, dest, &addr); |
1651 | e6e5906b | pbrook | } |
1652 | e6e5906b | pbrook | |
1653 | e6e5906b | pbrook | DISAS_INSN(tpf) |
1654 | e6e5906b | pbrook | { |
1655 | e6e5906b | pbrook | switch (insn & 7) { |
1656 | e6e5906b | pbrook | case 2: /* One extension word. */ |
1657 | e6e5906b | pbrook | s->pc += 2;
|
1658 | e6e5906b | pbrook | break;
|
1659 | e6e5906b | pbrook | case 3: /* Two extension words. */ |
1660 | e6e5906b | pbrook | s->pc += 4;
|
1661 | e6e5906b | pbrook | break;
|
1662 | e6e5906b | pbrook | case 4: /* No extension words. */ |
1663 | e6e5906b | pbrook | break;
|
1664 | e6e5906b | pbrook | default:
|
1665 | e6e5906b | pbrook | disas_undef(s, insn); |
1666 | e6e5906b | pbrook | } |
1667 | e6e5906b | pbrook | } |
1668 | e6e5906b | pbrook | |
1669 | e6e5906b | pbrook | DISAS_INSN(branch) |
1670 | e6e5906b | pbrook | { |
1671 | e6e5906b | pbrook | int32_t offset; |
1672 | e6e5906b | pbrook | uint32_t base; |
1673 | e6e5906b | pbrook | int op;
|
1674 | e6e5906b | pbrook | int l1;
|
1675 | 3b46e624 | ths | |
1676 | e6e5906b | pbrook | base = s->pc; |
1677 | e6e5906b | pbrook | op = (insn >> 8) & 0xf; |
1678 | e6e5906b | pbrook | offset = (int8_t)insn; |
1679 | e6e5906b | pbrook | if (offset == 0) { |
1680 | 0633879f | pbrook | offset = ldsw_code(s->pc); |
1681 | e6e5906b | pbrook | s->pc += 2;
|
1682 | e6e5906b | pbrook | } else if (offset == -1) { |
1683 | e6e5906b | pbrook | offset = read_im32(s); |
1684 | e6e5906b | pbrook | } |
1685 | e6e5906b | pbrook | if (op == 1) { |
1686 | e6e5906b | pbrook | /* bsr */
|
1687 | 0633879f | pbrook | gen_push(s, gen_im32(s->pc)); |
1688 | e6e5906b | pbrook | } |
1689 | e6e5906b | pbrook | gen_flush_cc_op(s); |
1690 | e6e5906b | pbrook | if (op > 1) { |
1691 | e6e5906b | pbrook | /* Bcc */
|
1692 | e6e5906b | pbrook | l1 = gen_new_label(); |
1693 | e6e5906b | pbrook | gen_jmpcc(s, ((insn >> 8) & 0xf) ^ 1, l1); |
1694 | e6e5906b | pbrook | gen_jmp_tb(s, 1, base + offset);
|
1695 | e6e5906b | pbrook | gen_set_label(l1); |
1696 | e6e5906b | pbrook | gen_jmp_tb(s, 0, s->pc);
|
1697 | e6e5906b | pbrook | } else {
|
1698 | e6e5906b | pbrook | /* Unconditional branch. */
|
1699 | e6e5906b | pbrook | gen_jmp_tb(s, 0, base + offset);
|
1700 | e6e5906b | pbrook | } |
1701 | e6e5906b | pbrook | } |
1702 | e6e5906b | pbrook | |
1703 | e6e5906b | pbrook | DISAS_INSN(moveq) |
1704 | e6e5906b | pbrook | { |
1705 | e1f3808e | pbrook | uint32_t val; |
1706 | e6e5906b | pbrook | |
1707 | e1f3808e | pbrook | val = (int8_t)insn; |
1708 | e1f3808e | pbrook | tcg_gen_movi_i32(DREG(insn, 9), val);
|
1709 | e1f3808e | pbrook | gen_logic_cc(s, tcg_const_i32(val)); |
1710 | e6e5906b | pbrook | } |
1711 | e6e5906b | pbrook | |
1712 | e6e5906b | pbrook | DISAS_INSN(mvzs) |
1713 | e6e5906b | pbrook | { |
1714 | e6e5906b | pbrook | int opsize;
|
1715 | e1f3808e | pbrook | TCGv src; |
1716 | e1f3808e | pbrook | TCGv reg; |
1717 | e6e5906b | pbrook | |
1718 | e6e5906b | pbrook | if (insn & 0x40) |
1719 | e6e5906b | pbrook | opsize = OS_WORD; |
1720 | e6e5906b | pbrook | else
|
1721 | e6e5906b | pbrook | opsize = OS_BYTE; |
1722 | e1f3808e | pbrook | SRC_EA(src, opsize, (insn & 0x80) != 0, NULL); |
1723 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1724 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, src); |
1725 | e6e5906b | pbrook | gen_logic_cc(s, src); |
1726 | e6e5906b | pbrook | } |
1727 | e6e5906b | pbrook | |
1728 | e6e5906b | pbrook | DISAS_INSN(or) |
1729 | e6e5906b | pbrook | { |
1730 | e1f3808e | pbrook | TCGv reg; |
1731 | e1f3808e | pbrook | TCGv dest; |
1732 | e1f3808e | pbrook | TCGv src; |
1733 | e1f3808e | pbrook | TCGv addr; |
1734 | e6e5906b | pbrook | |
1735 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1736 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1737 | e6e5906b | pbrook | if (insn & 0x100) { |
1738 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, &addr);
|
1739 | e1f3808e | pbrook | tcg_gen_or_i32(dest, src, reg); |
1740 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, dest, &addr); |
1741 | e6e5906b | pbrook | } else {
|
1742 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, NULL); |
1743 | e1f3808e | pbrook | tcg_gen_or_i32(dest, src, reg); |
1744 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, dest); |
1745 | e6e5906b | pbrook | } |
1746 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1747 | e6e5906b | pbrook | } |
1748 | e6e5906b | pbrook | |
1749 | e6e5906b | pbrook | DISAS_INSN(suba) |
1750 | e6e5906b | pbrook | { |
1751 | e1f3808e | pbrook | TCGv src; |
1752 | e1f3808e | pbrook | TCGv reg; |
1753 | e6e5906b | pbrook | |
1754 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, NULL); |
1755 | e6e5906b | pbrook | reg = AREG(insn, 9);
|
1756 | e1f3808e | pbrook | tcg_gen_sub_i32(reg, reg, src); |
1757 | e6e5906b | pbrook | } |
1758 | e6e5906b | pbrook | |
1759 | e6e5906b | pbrook | DISAS_INSN(subx) |
1760 | e6e5906b | pbrook | { |
1761 | e1f3808e | pbrook | TCGv reg; |
1762 | e1f3808e | pbrook | TCGv src; |
1763 | e6e5906b | pbrook | |
1764 | e6e5906b | pbrook | gen_flush_flags(s); |
1765 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1766 | e6e5906b | pbrook | src = DREG(insn, 0);
|
1767 | e1f3808e | pbrook | gen_helper_subx_cc(reg, cpu_env, reg, src); |
1768 | e6e5906b | pbrook | } |
1769 | e6e5906b | pbrook | |
1770 | e6e5906b | pbrook | DISAS_INSN(mov3q) |
1771 | e6e5906b | pbrook | { |
1772 | e1f3808e | pbrook | TCGv src; |
1773 | e6e5906b | pbrook | int val;
|
1774 | e6e5906b | pbrook | |
1775 | e6e5906b | pbrook | val = (insn >> 9) & 7; |
1776 | e6e5906b | pbrook | if (val == 0) |
1777 | e6e5906b | pbrook | val = -1;
|
1778 | e6e5906b | pbrook | src = gen_im32(val); |
1779 | e6e5906b | pbrook | gen_logic_cc(s, src); |
1780 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, src, NULL);
|
1781 | e6e5906b | pbrook | } |
1782 | e6e5906b | pbrook | |
1783 | e6e5906b | pbrook | DISAS_INSN(cmp) |
1784 | e6e5906b | pbrook | { |
1785 | e6e5906b | pbrook | int op;
|
1786 | e1f3808e | pbrook | TCGv src; |
1787 | e1f3808e | pbrook | TCGv reg; |
1788 | e1f3808e | pbrook | TCGv dest; |
1789 | e6e5906b | pbrook | int opsize;
|
1790 | e6e5906b | pbrook | |
1791 | e6e5906b | pbrook | op = (insn >> 6) & 3; |
1792 | e6e5906b | pbrook | switch (op) {
|
1793 | e6e5906b | pbrook | case 0: /* cmp.b */ |
1794 | e6e5906b | pbrook | opsize = OS_BYTE; |
1795 | e6e5906b | pbrook | s->cc_op = CC_OP_CMPB; |
1796 | e6e5906b | pbrook | break;
|
1797 | e6e5906b | pbrook | case 1: /* cmp.w */ |
1798 | e6e5906b | pbrook | opsize = OS_WORD; |
1799 | e6e5906b | pbrook | s->cc_op = CC_OP_CMPW; |
1800 | e6e5906b | pbrook | break;
|
1801 | e6e5906b | pbrook | case 2: /* cmp.l */ |
1802 | e6e5906b | pbrook | opsize = OS_LONG; |
1803 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1804 | e6e5906b | pbrook | break;
|
1805 | e6e5906b | pbrook | default:
|
1806 | e6e5906b | pbrook | abort(); |
1807 | e6e5906b | pbrook | } |
1808 | e1f3808e | pbrook | SRC_EA(src, opsize, 1, NULL); |
1809 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1810 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1811 | e1f3808e | pbrook | tcg_gen_sub_i32(dest, reg, src); |
1812 | e1f3808e | pbrook | gen_update_cc_add(dest, src); |
1813 | e6e5906b | pbrook | } |
1814 | e6e5906b | pbrook | |
1815 | e6e5906b | pbrook | DISAS_INSN(cmpa) |
1816 | e6e5906b | pbrook | { |
1817 | e6e5906b | pbrook | int opsize;
|
1818 | e1f3808e | pbrook | TCGv src; |
1819 | e1f3808e | pbrook | TCGv reg; |
1820 | e1f3808e | pbrook | TCGv dest; |
1821 | e6e5906b | pbrook | |
1822 | e6e5906b | pbrook | if (insn & 0x100) { |
1823 | e6e5906b | pbrook | opsize = OS_LONG; |
1824 | e6e5906b | pbrook | } else {
|
1825 | e6e5906b | pbrook | opsize = OS_WORD; |
1826 | e6e5906b | pbrook | } |
1827 | e1f3808e | pbrook | SRC_EA(src, opsize, 1, NULL); |
1828 | e6e5906b | pbrook | reg = AREG(insn, 9);
|
1829 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1830 | e1f3808e | pbrook | tcg_gen_sub_i32(dest, reg, src); |
1831 | e1f3808e | pbrook | gen_update_cc_add(dest, src); |
1832 | e6e5906b | pbrook | s->cc_op = CC_OP_SUB; |
1833 | e6e5906b | pbrook | } |
1834 | e6e5906b | pbrook | |
1835 | e6e5906b | pbrook | DISAS_INSN(eor) |
1836 | e6e5906b | pbrook | { |
1837 | e1f3808e | pbrook | TCGv src; |
1838 | e1f3808e | pbrook | TCGv reg; |
1839 | e1f3808e | pbrook | TCGv dest; |
1840 | e1f3808e | pbrook | TCGv addr; |
1841 | e6e5906b | pbrook | |
1842 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, &addr);
|
1843 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1844 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1845 | e1f3808e | pbrook | tcg_gen_xor_i32(dest, src, reg); |
1846 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1847 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, dest, &addr); |
1848 | e6e5906b | pbrook | } |
1849 | e6e5906b | pbrook | |
1850 | e6e5906b | pbrook | DISAS_INSN(and) |
1851 | e6e5906b | pbrook | { |
1852 | e1f3808e | pbrook | TCGv src; |
1853 | e1f3808e | pbrook | TCGv reg; |
1854 | e1f3808e | pbrook | TCGv dest; |
1855 | e1f3808e | pbrook | TCGv addr; |
1856 | e6e5906b | pbrook | |
1857 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1858 | e6e5906b | pbrook | dest = gen_new_qreg(QMODE_I32); |
1859 | e6e5906b | pbrook | if (insn & 0x100) { |
1860 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, &addr);
|
1861 | e1f3808e | pbrook | tcg_gen_and_i32(dest, src, reg); |
1862 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, dest, &addr); |
1863 | e6e5906b | pbrook | } else {
|
1864 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, NULL); |
1865 | e1f3808e | pbrook | tcg_gen_and_i32(dest, src, reg); |
1866 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, dest); |
1867 | e6e5906b | pbrook | } |
1868 | e6e5906b | pbrook | gen_logic_cc(s, dest); |
1869 | e6e5906b | pbrook | } |
1870 | e6e5906b | pbrook | |
1871 | e6e5906b | pbrook | DISAS_INSN(adda) |
1872 | e6e5906b | pbrook | { |
1873 | e1f3808e | pbrook | TCGv src; |
1874 | e1f3808e | pbrook | TCGv reg; |
1875 | e6e5906b | pbrook | |
1876 | 510ff0b7 | pbrook | SRC_EA(src, OS_LONG, 0, NULL); |
1877 | e6e5906b | pbrook | reg = AREG(insn, 9);
|
1878 | e1f3808e | pbrook | tcg_gen_add_i32(reg, reg, src); |
1879 | e6e5906b | pbrook | } |
1880 | e6e5906b | pbrook | |
1881 | e6e5906b | pbrook | DISAS_INSN(addx) |
1882 | e6e5906b | pbrook | { |
1883 | e1f3808e | pbrook | TCGv reg; |
1884 | e1f3808e | pbrook | TCGv src; |
1885 | e6e5906b | pbrook | |
1886 | e6e5906b | pbrook | gen_flush_flags(s); |
1887 | e6e5906b | pbrook | reg = DREG(insn, 9);
|
1888 | e6e5906b | pbrook | src = DREG(insn, 0);
|
1889 | e1f3808e | pbrook | gen_helper_addx_cc(reg, cpu_env, reg, src); |
1890 | e6e5906b | pbrook | s->cc_op = CC_OP_FLAGS; |
1891 | e6e5906b | pbrook | } |
1892 | e6e5906b | pbrook | |
1893 | e1f3808e | pbrook | /* TODO: This could be implemented without helper functions. */
|
1894 | e6e5906b | pbrook | DISAS_INSN(shift_im) |
1895 | e6e5906b | pbrook | { |
1896 | e1f3808e | pbrook | TCGv reg; |
1897 | e6e5906b | pbrook | int tmp;
|
1898 | e1f3808e | pbrook | TCGv shift; |
1899 | e6e5906b | pbrook | |
1900 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1901 | e6e5906b | pbrook | tmp = (insn >> 9) & 7; |
1902 | e6e5906b | pbrook | if (tmp == 0) |
1903 | e1f3808e | pbrook | tmp = 8;
|
1904 | e1f3808e | pbrook | shift = gen_im32(tmp); |
1905 | e1f3808e | pbrook | /* No need to flush flags becuse we know we will set C flag. */
|
1906 | e6e5906b | pbrook | if (insn & 0x100) { |
1907 | e1f3808e | pbrook | gen_helper_shl_cc(reg, cpu_env, reg, shift); |
1908 | e6e5906b | pbrook | } else {
|
1909 | e6e5906b | pbrook | if (insn & 8) { |
1910 | e1f3808e | pbrook | gen_helper_shr_cc(reg, cpu_env, reg, shift); |
1911 | e6e5906b | pbrook | } else {
|
1912 | e1f3808e | pbrook | gen_helper_sar_cc(reg, cpu_env, reg, shift); |
1913 | e6e5906b | pbrook | } |
1914 | e6e5906b | pbrook | } |
1915 | e1f3808e | pbrook | s->cc_op = CC_OP_SHIFT; |
1916 | e6e5906b | pbrook | } |
1917 | e6e5906b | pbrook | |
1918 | e6e5906b | pbrook | DISAS_INSN(shift_reg) |
1919 | e6e5906b | pbrook | { |
1920 | e1f3808e | pbrook | TCGv reg; |
1921 | e1f3808e | pbrook | TCGv shift; |
1922 | e6e5906b | pbrook | |
1923 | e6e5906b | pbrook | reg = DREG(insn, 0);
|
1924 | e1f3808e | pbrook | shift = DREG(insn, 9);
|
1925 | e1f3808e | pbrook | /* Shift by zero leaves C flag unmodified. */
|
1926 | e1f3808e | pbrook | gen_flush_flags(s); |
1927 | e6e5906b | pbrook | if (insn & 0x100) { |
1928 | e1f3808e | pbrook | gen_helper_shl_cc(reg, cpu_env, reg, shift); |
1929 | e6e5906b | pbrook | } else {
|
1930 | e6e5906b | pbrook | if (insn & 8) { |
1931 | e1f3808e | pbrook | gen_helper_shr_cc(reg, cpu_env, reg, shift); |
1932 | e6e5906b | pbrook | } else {
|
1933 | e1f3808e | pbrook | gen_helper_sar_cc(reg, cpu_env, reg, shift); |
1934 | e6e5906b | pbrook | } |
1935 | e6e5906b | pbrook | } |
1936 | e1f3808e | pbrook | s->cc_op = CC_OP_SHIFT; |
1937 | e6e5906b | pbrook | } |
1938 | e6e5906b | pbrook | |
1939 | e6e5906b | pbrook | DISAS_INSN(ff1) |
1940 | e6e5906b | pbrook | { |
1941 | e1f3808e | pbrook | TCGv reg; |
1942 | 821f7e76 | pbrook | reg = DREG(insn, 0);
|
1943 | 821f7e76 | pbrook | gen_logic_cc(s, reg); |
1944 | e1f3808e | pbrook | gen_helper_ff1(reg, reg); |
1945 | e6e5906b | pbrook | } |
1946 | e6e5906b | pbrook | |
1947 | e1f3808e | pbrook | static TCGv gen_get_sr(DisasContext *s)
|
1948 | 0633879f | pbrook | { |
1949 | e1f3808e | pbrook | TCGv ccr; |
1950 | e1f3808e | pbrook | TCGv sr; |
1951 | 0633879f | pbrook | |
1952 | 0633879f | pbrook | ccr = gen_get_ccr(s); |
1953 | 0633879f | pbrook | sr = gen_new_qreg(QMODE_I32); |
1954 | e1f3808e | pbrook | tcg_gen_andi_i32(sr, QREG_SR, 0xffe0);
|
1955 | e1f3808e | pbrook | tcg_gen_or_i32(sr, sr, ccr); |
1956 | 0633879f | pbrook | return sr;
|
1957 | 0633879f | pbrook | } |
1958 | 0633879f | pbrook | |
1959 | e6e5906b | pbrook | DISAS_INSN(strldsr) |
1960 | e6e5906b | pbrook | { |
1961 | e6e5906b | pbrook | uint16_t ext; |
1962 | e6e5906b | pbrook | uint32_t addr; |
1963 | e6e5906b | pbrook | |
1964 | e6e5906b | pbrook | addr = s->pc - 2;
|
1965 | 0633879f | pbrook | ext = lduw_code(s->pc); |
1966 | e6e5906b | pbrook | s->pc += 2;
|
1967 | 0633879f | pbrook | if (ext != 0x46FC) { |
1968 | e6e5906b | pbrook | gen_exception(s, addr, EXCP_UNSUPPORTED); |
1969 | 0633879f | pbrook | return;
|
1970 | 0633879f | pbrook | } |
1971 | 0633879f | pbrook | ext = lduw_code(s->pc); |
1972 | 0633879f | pbrook | s->pc += 2;
|
1973 | 0633879f | pbrook | if (IS_USER(s) || (ext & SR_S) == 0) { |
1974 | e6e5906b | pbrook | gen_exception(s, addr, EXCP_PRIVILEGE); |
1975 | 0633879f | pbrook | return;
|
1976 | 0633879f | pbrook | } |
1977 | 0633879f | pbrook | gen_push(s, gen_get_sr(s)); |
1978 | 0633879f | pbrook | gen_set_sr_im(s, ext, 0);
|
1979 | e6e5906b | pbrook | } |
1980 | e6e5906b | pbrook | |
1981 | e6e5906b | pbrook | DISAS_INSN(move_from_sr) |
1982 | e6e5906b | pbrook | { |
1983 | e1f3808e | pbrook | TCGv reg; |
1984 | e1f3808e | pbrook | TCGv sr; |
1985 | 0633879f | pbrook | |
1986 | 0633879f | pbrook | if (IS_USER(s)) {
|
1987 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
1988 | 0633879f | pbrook | return;
|
1989 | 0633879f | pbrook | } |
1990 | 0633879f | pbrook | sr = gen_get_sr(s); |
1991 | 0633879f | pbrook | reg = DREG(insn, 0);
|
1992 | 0633879f | pbrook | gen_partset_reg(OS_WORD, reg, sr); |
1993 | e6e5906b | pbrook | } |
1994 | e6e5906b | pbrook | |
1995 | e6e5906b | pbrook | DISAS_INSN(move_to_sr) |
1996 | e6e5906b | pbrook | { |
1997 | 0633879f | pbrook | if (IS_USER(s)) {
|
1998 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
1999 | 0633879f | pbrook | return;
|
2000 | 0633879f | pbrook | } |
2001 | 0633879f | pbrook | gen_set_sr(s, insn, 0);
|
2002 | 0633879f | pbrook | gen_lookup_tb(s); |
2003 | e6e5906b | pbrook | } |
2004 | e6e5906b | pbrook | |
2005 | e6e5906b | pbrook | DISAS_INSN(move_from_usp) |
2006 | e6e5906b | pbrook | { |
2007 | 0633879f | pbrook | if (IS_USER(s)) {
|
2008 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2009 | 0633879f | pbrook | return;
|
2010 | 0633879f | pbrook | } |
2011 | 0633879f | pbrook | /* TODO: Implement USP. */
|
2012 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_ILLEGAL);
|
2013 | e6e5906b | pbrook | } |
2014 | e6e5906b | pbrook | |
2015 | e6e5906b | pbrook | DISAS_INSN(move_to_usp) |
2016 | e6e5906b | pbrook | { |
2017 | 0633879f | pbrook | if (IS_USER(s)) {
|
2018 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2019 | 0633879f | pbrook | return;
|
2020 | 0633879f | pbrook | } |
2021 | 0633879f | pbrook | /* TODO: Implement USP. */
|
2022 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_ILLEGAL);
|
2023 | e6e5906b | pbrook | } |
2024 | e6e5906b | pbrook | |
2025 | e6e5906b | pbrook | DISAS_INSN(halt) |
2026 | e6e5906b | pbrook | { |
2027 | e1f3808e | pbrook | gen_exception(s, s->pc, EXCP_HALT_INSN); |
2028 | e6e5906b | pbrook | } |
2029 | e6e5906b | pbrook | |
2030 | e6e5906b | pbrook | DISAS_INSN(stop) |
2031 | e6e5906b | pbrook | { |
2032 | 0633879f | pbrook | uint16_t ext; |
2033 | 0633879f | pbrook | |
2034 | 0633879f | pbrook | if (IS_USER(s)) {
|
2035 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2036 | 0633879f | pbrook | return;
|
2037 | 0633879f | pbrook | } |
2038 | 0633879f | pbrook | |
2039 | 0633879f | pbrook | ext = lduw_code(s->pc); |
2040 | 0633879f | pbrook | s->pc += 2;
|
2041 | 0633879f | pbrook | |
2042 | 0633879f | pbrook | gen_set_sr_im(s, ext, 0);
|
2043 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_HALTED, 1);
|
2044 | e1f3808e | pbrook | gen_exception(s, s->pc, EXCP_HLT); |
2045 | e6e5906b | pbrook | } |
2046 | e6e5906b | pbrook | |
2047 | e6e5906b | pbrook | DISAS_INSN(rte) |
2048 | e6e5906b | pbrook | { |
2049 | 0633879f | pbrook | if (IS_USER(s)) {
|
2050 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2051 | 0633879f | pbrook | return;
|
2052 | 0633879f | pbrook | } |
2053 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_RTE);
|
2054 | e6e5906b | pbrook | } |
2055 | e6e5906b | pbrook | |
2056 | e6e5906b | pbrook | DISAS_INSN(movec) |
2057 | e6e5906b | pbrook | { |
2058 | 0633879f | pbrook | uint16_t ext; |
2059 | e1f3808e | pbrook | TCGv reg; |
2060 | 0633879f | pbrook | |
2061 | 0633879f | pbrook | if (IS_USER(s)) {
|
2062 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2063 | 0633879f | pbrook | return;
|
2064 | 0633879f | pbrook | } |
2065 | 0633879f | pbrook | |
2066 | 0633879f | pbrook | ext = lduw_code(s->pc); |
2067 | 0633879f | pbrook | s->pc += 2;
|
2068 | 0633879f | pbrook | |
2069 | 0633879f | pbrook | if (ext & 0x8000) { |
2070 | 0633879f | pbrook | reg = AREG(ext, 12);
|
2071 | 0633879f | pbrook | } else {
|
2072 | 0633879f | pbrook | reg = DREG(ext, 12);
|
2073 | 0633879f | pbrook | } |
2074 | e1f3808e | pbrook | gen_helper_movec(cpu_env, tcg_const_i32(ext & 0xfff), reg);
|
2075 | 0633879f | pbrook | gen_lookup_tb(s); |
2076 | e6e5906b | pbrook | } |
2077 | e6e5906b | pbrook | |
2078 | e6e5906b | pbrook | DISAS_INSN(intouch) |
2079 | e6e5906b | pbrook | { |
2080 | 0633879f | pbrook | if (IS_USER(s)) {
|
2081 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2082 | 0633879f | pbrook | return;
|
2083 | 0633879f | pbrook | } |
2084 | 0633879f | pbrook | /* ICache fetch. Implement as no-op. */
|
2085 | e6e5906b | pbrook | } |
2086 | e6e5906b | pbrook | |
2087 | e6e5906b | pbrook | DISAS_INSN(cpushl) |
2088 | e6e5906b | pbrook | { |
2089 | 0633879f | pbrook | if (IS_USER(s)) {
|
2090 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2091 | 0633879f | pbrook | return;
|
2092 | 0633879f | pbrook | } |
2093 | 0633879f | pbrook | /* Cache push/invalidate. Implement as no-op. */
|
2094 | e6e5906b | pbrook | } |
2095 | e6e5906b | pbrook | |
2096 | e6e5906b | pbrook | DISAS_INSN(wddata) |
2097 | e6e5906b | pbrook | { |
2098 | e6e5906b | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2099 | e6e5906b | pbrook | } |
2100 | e6e5906b | pbrook | |
2101 | e6e5906b | pbrook | DISAS_INSN(wdebug) |
2102 | e6e5906b | pbrook | { |
2103 | 0633879f | pbrook | if (IS_USER(s)) {
|
2104 | 0633879f | pbrook | gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
|
2105 | 0633879f | pbrook | return;
|
2106 | 0633879f | pbrook | } |
2107 | 0633879f | pbrook | /* TODO: Implement wdebug. */
|
2108 | 0633879f | pbrook | qemu_assert(0, "WDEBUG not implemented"); |
2109 | e6e5906b | pbrook | } |
2110 | e6e5906b | pbrook | |
2111 | e6e5906b | pbrook | DISAS_INSN(trap) |
2112 | e6e5906b | pbrook | { |
2113 | e6e5906b | pbrook | gen_exception(s, s->pc - 2, EXCP_TRAP0 + (insn & 0xf)); |
2114 | e6e5906b | pbrook | } |
2115 | e6e5906b | pbrook | |
2116 | e6e5906b | pbrook | /* ??? FP exceptions are not implemented. Most exceptions are deferred until
|
2117 | e6e5906b | pbrook | immediately before the next FP instruction is executed. */
|
2118 | e6e5906b | pbrook | DISAS_INSN(fpu) |
2119 | e6e5906b | pbrook | { |
2120 | e6e5906b | pbrook | uint16_t ext; |
2121 | e6e5906b | pbrook | int opmode;
|
2122 | e1f3808e | pbrook | TCGv src; |
2123 | e1f3808e | pbrook | TCGv dest; |
2124 | e1f3808e | pbrook | TCGv res; |
2125 | e6e5906b | pbrook | int round;
|
2126 | e6e5906b | pbrook | int opsize;
|
2127 | e6e5906b | pbrook | |
2128 | 0633879f | pbrook | ext = lduw_code(s->pc); |
2129 | e6e5906b | pbrook | s->pc += 2;
|
2130 | e6e5906b | pbrook | opmode = ext & 0x7f;
|
2131 | e6e5906b | pbrook | switch ((ext >> 13) & 7) { |
2132 | e6e5906b | pbrook | case 0: case 2: |
2133 | e6e5906b | pbrook | break;
|
2134 | e6e5906b | pbrook | case 1: |
2135 | e6e5906b | pbrook | goto undef;
|
2136 | e6e5906b | pbrook | case 3: /* fmove out */ |
2137 | e6e5906b | pbrook | src = FREG(ext, 7);
|
2138 | e6e5906b | pbrook | /* fmove */
|
2139 | e6e5906b | pbrook | /* ??? TODO: Proper behavior on overflow. */
|
2140 | e6e5906b | pbrook | switch ((ext >> 10) & 7) { |
2141 | e6e5906b | pbrook | case 0: |
2142 | e6e5906b | pbrook | opsize = OS_LONG; |
2143 | e6e5906b | pbrook | res = gen_new_qreg(QMODE_I32); |
2144 | e1f3808e | pbrook | gen_helper_f64_to_i32(res, cpu_env, src); |
2145 | e6e5906b | pbrook | break;
|
2146 | e6e5906b | pbrook | case 1: |
2147 | e6e5906b | pbrook | opsize = OS_SINGLE; |
2148 | e6e5906b | pbrook | res = gen_new_qreg(QMODE_F32); |
2149 | e1f3808e | pbrook | gen_helper_f64_to_f32(res, cpu_env, src); |
2150 | e6e5906b | pbrook | break;
|
2151 | e6e5906b | pbrook | case 4: |
2152 | e6e5906b | pbrook | opsize = OS_WORD; |
2153 | e6e5906b | pbrook | res = gen_new_qreg(QMODE_I32); |
2154 | e1f3808e | pbrook | gen_helper_f64_to_i32(res, cpu_env, src); |
2155 | e6e5906b | pbrook | break;
|
2156 | e6e5906b | pbrook | case 5: |
2157 | e6e5906b | pbrook | opsize = OS_DOUBLE; |
2158 | e6e5906b | pbrook | res = src; |
2159 | e6e5906b | pbrook | break;
|
2160 | e6e5906b | pbrook | case 6: |
2161 | e6e5906b | pbrook | opsize = OS_BYTE; |
2162 | e6e5906b | pbrook | res = gen_new_qreg(QMODE_I32); |
2163 | e1f3808e | pbrook | gen_helper_f64_to_i32(res, cpu_env, src); |
2164 | e6e5906b | pbrook | break;
|
2165 | e6e5906b | pbrook | default:
|
2166 | e6e5906b | pbrook | goto undef;
|
2167 | e6e5906b | pbrook | } |
2168 | 510ff0b7 | pbrook | DEST_EA(insn, opsize, res, NULL);
|
2169 | e6e5906b | pbrook | return;
|
2170 | e6e5906b | pbrook | case 4: /* fmove to control register. */ |
2171 | e6e5906b | pbrook | switch ((ext >> 10) & 7) { |
2172 | e6e5906b | pbrook | case 4: /* FPCR */ |
2173 | e6e5906b | pbrook | /* Not implemented. Ignore writes. */
|
2174 | e6e5906b | pbrook | break;
|
2175 | e6e5906b | pbrook | case 1: /* FPIAR */ |
2176 | e6e5906b | pbrook | case 2: /* FPSR */ |
2177 | e6e5906b | pbrook | default:
|
2178 | e6e5906b | pbrook | cpu_abort(NULL, "Unimplemented: fmove to control %d", |
2179 | e6e5906b | pbrook | (ext >> 10) & 7); |
2180 | e6e5906b | pbrook | } |
2181 | e6e5906b | pbrook | break;
|
2182 | e6e5906b | pbrook | case 5: /* fmove from control register. */ |
2183 | e6e5906b | pbrook | switch ((ext >> 10) & 7) { |
2184 | e6e5906b | pbrook | case 4: /* FPCR */ |
2185 | e6e5906b | pbrook | /* Not implemented. Always return zero. */
|
2186 | e6e5906b | pbrook | res = gen_im32(0);
|
2187 | e6e5906b | pbrook | break;
|
2188 | e6e5906b | pbrook | case 1: /* FPIAR */ |
2189 | e6e5906b | pbrook | case 2: /* FPSR */ |
2190 | e6e5906b | pbrook | default:
|
2191 | e6e5906b | pbrook | cpu_abort(NULL, "Unimplemented: fmove from control %d", |
2192 | e6e5906b | pbrook | (ext >> 10) & 7); |
2193 | e6e5906b | pbrook | goto undef;
|
2194 | e6e5906b | pbrook | } |
2195 | 510ff0b7 | pbrook | DEST_EA(insn, OS_LONG, res, NULL);
|
2196 | e6e5906b | pbrook | break;
|
2197 | 5fafdf24 | ths | case 6: /* fmovem */ |
2198 | e6e5906b | pbrook | case 7: |
2199 | e6e5906b | pbrook | { |
2200 | e1f3808e | pbrook | TCGv addr; |
2201 | e1f3808e | pbrook | uint16_t mask; |
2202 | e1f3808e | pbrook | int i;
|
2203 | e1f3808e | pbrook | if ((ext & 0x1f00) != 0x1000 || (ext & 0xff) == 0) |
2204 | e1f3808e | pbrook | goto undef;
|
2205 | e1f3808e | pbrook | src = gen_lea(s, insn, OS_LONG); |
2206 | e1f3808e | pbrook | if (IS_NULL_QREG(src)) {
|
2207 | e1f3808e | pbrook | gen_addr_fault(s); |
2208 | e1f3808e | pbrook | return;
|
2209 | e1f3808e | pbrook | } |
2210 | e1f3808e | pbrook | addr = gen_new_qreg(QMODE_I32); |
2211 | e1f3808e | pbrook | tcg_gen_mov_i32(addr, src); |
2212 | e1f3808e | pbrook | mask = 0x80;
|
2213 | e1f3808e | pbrook | for (i = 0; i < 8; i++) { |
2214 | e1f3808e | pbrook | if (ext & mask) {
|
2215 | e1f3808e | pbrook | s->is_mem = 1;
|
2216 | e1f3808e | pbrook | dest = FREG(i, 0);
|
2217 | e1f3808e | pbrook | if (ext & (1 << 13)) { |
2218 | e1f3808e | pbrook | /* store */
|
2219 | e1f3808e | pbrook | tcg_gen_qemu_stf64(dest, addr, IS_USER(s)); |
2220 | e1f3808e | pbrook | } else {
|
2221 | e1f3808e | pbrook | /* load */
|
2222 | e1f3808e | pbrook | tcg_gen_qemu_ldf64(dest, addr, IS_USER(s)); |
2223 | e1f3808e | pbrook | } |
2224 | e1f3808e | pbrook | if (ext & (mask - 1)) |
2225 | e1f3808e | pbrook | tcg_gen_addi_i32(addr, addr, 8);
|
2226 | e6e5906b | pbrook | } |
2227 | e1f3808e | pbrook | mask >>= 1;
|
2228 | e6e5906b | pbrook | } |
2229 | e6e5906b | pbrook | } |
2230 | e6e5906b | pbrook | return;
|
2231 | e6e5906b | pbrook | } |
2232 | e6e5906b | pbrook | if (ext & (1 << 14)) { |
2233 | e1f3808e | pbrook | TCGv tmp; |
2234 | e6e5906b | pbrook | |
2235 | e6e5906b | pbrook | /* Source effective address. */
|
2236 | e6e5906b | pbrook | switch ((ext >> 10) & 7) { |
2237 | e6e5906b | pbrook | case 0: opsize = OS_LONG; break; |
2238 | e6e5906b | pbrook | case 1: opsize = OS_SINGLE; break; |
2239 | e6e5906b | pbrook | case 4: opsize = OS_WORD; break; |
2240 | e6e5906b | pbrook | case 5: opsize = OS_DOUBLE; break; |
2241 | e6e5906b | pbrook | case 6: opsize = OS_BYTE; break; |
2242 | e6e5906b | pbrook | default:
|
2243 | e6e5906b | pbrook | goto undef;
|
2244 | e6e5906b | pbrook | } |
2245 | e1f3808e | pbrook | SRC_EA(tmp, opsize, 1, NULL); |
2246 | e6e5906b | pbrook | if (opsize == OS_DOUBLE) {
|
2247 | e6e5906b | pbrook | src = tmp; |
2248 | e6e5906b | pbrook | } else {
|
2249 | e6e5906b | pbrook | src = gen_new_qreg(QMODE_F64); |
2250 | e6e5906b | pbrook | switch (opsize) {
|
2251 | e6e5906b | pbrook | case OS_LONG:
|
2252 | e6e5906b | pbrook | case OS_WORD:
|
2253 | e6e5906b | pbrook | case OS_BYTE:
|
2254 | e1f3808e | pbrook | gen_helper_i32_to_f64(src, cpu_env, tmp); |
2255 | e6e5906b | pbrook | break;
|
2256 | e6e5906b | pbrook | case OS_SINGLE:
|
2257 | e1f3808e | pbrook | gen_helper_f32_to_f64(src, cpu_env, tmp); |
2258 | e6e5906b | pbrook | break;
|
2259 | e6e5906b | pbrook | } |
2260 | e6e5906b | pbrook | } |
2261 | e6e5906b | pbrook | } else {
|
2262 | e6e5906b | pbrook | /* Source register. */
|
2263 | e6e5906b | pbrook | src = FREG(ext, 10);
|
2264 | e6e5906b | pbrook | } |
2265 | e6e5906b | pbrook | dest = FREG(ext, 7);
|
2266 | e6e5906b | pbrook | res = gen_new_qreg(QMODE_F64); |
2267 | e6e5906b | pbrook | if (opmode != 0x3a) |
2268 | e1f3808e | pbrook | tcg_gen_mov_f64(res, dest); |
2269 | e6e5906b | pbrook | round = 1;
|
2270 | e6e5906b | pbrook | switch (opmode) {
|
2271 | e6e5906b | pbrook | case 0: case 0x40: case 0x44: /* fmove */ |
2272 | e1f3808e | pbrook | tcg_gen_mov_f64(res, src); |
2273 | e6e5906b | pbrook | break;
|
2274 | e6e5906b | pbrook | case 1: /* fint */ |
2275 | e1f3808e | pbrook | gen_helper_iround_f64(res, cpu_env, src); |
2276 | e6e5906b | pbrook | round = 0;
|
2277 | e6e5906b | pbrook | break;
|
2278 | e6e5906b | pbrook | case 3: /* fintrz */ |
2279 | e1f3808e | pbrook | gen_helper_itrunc_f64(res, cpu_env, src); |
2280 | e6e5906b | pbrook | round = 0;
|
2281 | e6e5906b | pbrook | break;
|
2282 | e6e5906b | pbrook | case 4: case 0x41: case 0x45: /* fsqrt */ |
2283 | e1f3808e | pbrook | gen_helper_sqrt_f64(res, cpu_env, src); |
2284 | e6e5906b | pbrook | break;
|
2285 | e6e5906b | pbrook | case 0x18: case 0x58: case 0x5c: /* fabs */ |
2286 | e1f3808e | pbrook | gen_helper_abs_f64(res, src); |
2287 | e6e5906b | pbrook | break;
|
2288 | e6e5906b | pbrook | case 0x1a: case 0x5a: case 0x5e: /* fneg */ |
2289 | e1f3808e | pbrook | gen_helper_chs_f64(res, src); |
2290 | e6e5906b | pbrook | break;
|
2291 | e6e5906b | pbrook | case 0x20: case 0x60: case 0x64: /* fdiv */ |
2292 | e1f3808e | pbrook | gen_helper_div_f64(res, cpu_env, res, src); |
2293 | e6e5906b | pbrook | break;
|
2294 | e6e5906b | pbrook | case 0x22: case 0x62: case 0x66: /* fadd */ |
2295 | e1f3808e | pbrook | gen_helper_add_f64(res, cpu_env, res, src); |
2296 | e6e5906b | pbrook | break;
|
2297 | e6e5906b | pbrook | case 0x23: case 0x63: case 0x67: /* fmul */ |
2298 | e1f3808e | pbrook | gen_helper_mul_f64(res, cpu_env, res, src); |
2299 | e6e5906b | pbrook | break;
|
2300 | e6e5906b | pbrook | case 0x28: case 0x68: case 0x6c: /* fsub */ |
2301 | e1f3808e | pbrook | gen_helper_sub_f64(res, cpu_env, res, src); |
2302 | e6e5906b | pbrook | break;
|
2303 | e6e5906b | pbrook | case 0x38: /* fcmp */ |
2304 | e1f3808e | pbrook | gen_helper_sub_cmp_f64(res, cpu_env, res, src); |
2305 | e1f3808e | pbrook | dest = NULL_QREG; |
2306 | e6e5906b | pbrook | round = 0;
|
2307 | e6e5906b | pbrook | break;
|
2308 | e6e5906b | pbrook | case 0x3a: /* ftst */ |
2309 | e1f3808e | pbrook | tcg_gen_mov_f64(res, src); |
2310 | e1f3808e | pbrook | dest = NULL_QREG; |
2311 | e6e5906b | pbrook | round = 0;
|
2312 | e6e5906b | pbrook | break;
|
2313 | e6e5906b | pbrook | default:
|
2314 | e6e5906b | pbrook | goto undef;
|
2315 | e6e5906b | pbrook | } |
2316 | e6e5906b | pbrook | if (round) {
|
2317 | e6e5906b | pbrook | if (opmode & 0x40) { |
2318 | e6e5906b | pbrook | if ((opmode & 0x4) != 0) |
2319 | e6e5906b | pbrook | round = 0;
|
2320 | e6e5906b | pbrook | } else if ((s->fpcr & M68K_FPCR_PREC) == 0) { |
2321 | e6e5906b | pbrook | round = 0;
|
2322 | e6e5906b | pbrook | } |
2323 | e6e5906b | pbrook | } |
2324 | e6e5906b | pbrook | if (round) {
|
2325 | e1f3808e | pbrook | TCGv tmp; |
2326 | e6e5906b | pbrook | |
2327 | e6e5906b | pbrook | tmp = gen_new_qreg(QMODE_F32); |
2328 | e1f3808e | pbrook | gen_helper_f64_to_f32(tmp, cpu_env, res); |
2329 | e1f3808e | pbrook | gen_helper_f32_to_f64(res, cpu_env, tmp); |
2330 | 5fafdf24 | ths | } |
2331 | e1f3808e | pbrook | tcg_gen_mov_f64(QREG_FP_RESULT, res); |
2332 | e1f3808e | pbrook | if (!IS_NULL_QREG(dest)) {
|
2333 | e1f3808e | pbrook | tcg_gen_mov_f64(dest, res); |
2334 | e6e5906b | pbrook | } |
2335 | e6e5906b | pbrook | return;
|
2336 | e6e5906b | pbrook | undef:
|
2337 | e6e5906b | pbrook | s->pc -= 2;
|
2338 | e6e5906b | pbrook | disas_undef_fpu(s, insn); |
2339 | e6e5906b | pbrook | } |
2340 | e6e5906b | pbrook | |
2341 | e6e5906b | pbrook | DISAS_INSN(fbcc) |
2342 | e6e5906b | pbrook | { |
2343 | e6e5906b | pbrook | uint32_t offset; |
2344 | e6e5906b | pbrook | uint32_t addr; |
2345 | e1f3808e | pbrook | TCGv flag; |
2346 | e6e5906b | pbrook | int l1;
|
2347 | e6e5906b | pbrook | |
2348 | e6e5906b | pbrook | addr = s->pc; |
2349 | 0633879f | pbrook | offset = ldsw_code(s->pc); |
2350 | e6e5906b | pbrook | s->pc += 2;
|
2351 | e6e5906b | pbrook | if (insn & (1 << 6)) { |
2352 | 0633879f | pbrook | offset = (offset << 16) | lduw_code(s->pc);
|
2353 | e6e5906b | pbrook | s->pc += 2;
|
2354 | e6e5906b | pbrook | } |
2355 | e6e5906b | pbrook | |
2356 | e6e5906b | pbrook | l1 = gen_new_label(); |
2357 | e6e5906b | pbrook | /* TODO: Raise BSUN exception. */
|
2358 | e6e5906b | pbrook | flag = gen_new_qreg(QMODE_I32); |
2359 | e1f3808e | pbrook | gen_helper_compare_f64(flag, cpu_env, QREG_FP_RESULT); |
2360 | e6e5906b | pbrook | /* Jump to l1 if condition is true. */
|
2361 | e6e5906b | pbrook | switch (insn & 0xf) { |
2362 | e6e5906b | pbrook | case 0: /* f */ |
2363 | e6e5906b | pbrook | break;
|
2364 | e6e5906b | pbrook | case 1: /* eq (=0) */ |
2365 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_EQ, flag, tcg_const_i32(0), l1);
|
2366 | e6e5906b | pbrook | break;
|
2367 | e6e5906b | pbrook | case 2: /* ogt (=1) */ |
2368 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_EQ, flag, tcg_const_i32(1), l1);
|
2369 | e6e5906b | pbrook | break;
|
2370 | e6e5906b | pbrook | case 3: /* oge (=0 or =1) */ |
2371 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_LEU, flag, tcg_const_i32(1), l1);
|
2372 | e6e5906b | pbrook | break;
|
2373 | e6e5906b | pbrook | case 4: /* olt (=-1) */ |
2374 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_LT, flag, tcg_const_i32(0), l1);
|
2375 | e6e5906b | pbrook | break;
|
2376 | e6e5906b | pbrook | case 5: /* ole (=-1 or =0) */ |
2377 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_LE, flag, tcg_const_i32(0), l1);
|
2378 | e6e5906b | pbrook | break;
|
2379 | e6e5906b | pbrook | case 6: /* ogl (=-1 or =1) */ |
2380 | e1f3808e | pbrook | tcg_gen_andi_i32(flag, flag, 1);
|
2381 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_NE, flag, tcg_const_i32(0), l1);
|
2382 | e6e5906b | pbrook | break;
|
2383 | e6e5906b | pbrook | case 7: /* or (=2) */ |
2384 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_EQ, flag, tcg_const_i32(2), l1);
|
2385 | e6e5906b | pbrook | break;
|
2386 | e6e5906b | pbrook | case 8: /* un (<2) */ |
2387 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_LT, flag, tcg_const_i32(2), l1);
|
2388 | e6e5906b | pbrook | break;
|
2389 | e6e5906b | pbrook | case 9: /* ueq (=0 or =2) */ |
2390 | e1f3808e | pbrook | tcg_gen_andi_i32(flag, flag, 1);
|
2391 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_EQ, flag, tcg_const_i32(0), l1);
|
2392 | e6e5906b | pbrook | break;
|
2393 | e6e5906b | pbrook | case 10: /* ugt (>0) */ |
2394 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_GT, flag, tcg_const_i32(0), l1);
|
2395 | e6e5906b | pbrook | break;
|
2396 | e6e5906b | pbrook | case 11: /* uge (>=0) */ |
2397 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_GE, flag, tcg_const_i32(0), l1);
|
2398 | e6e5906b | pbrook | break;
|
2399 | e6e5906b | pbrook | case 12: /* ult (=-1 or =2) */ |
2400 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_GEU, flag, tcg_const_i32(2), l1);
|
2401 | e6e5906b | pbrook | break;
|
2402 | e6e5906b | pbrook | case 13: /* ule (!=1) */ |
2403 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_NE, flag, tcg_const_i32(1), l1);
|
2404 | e6e5906b | pbrook | break;
|
2405 | e6e5906b | pbrook | case 14: /* ne (!=0) */ |
2406 | e1f3808e | pbrook | tcg_gen_brcond_i32(TCG_COND_NE, flag, tcg_const_i32(0), l1);
|
2407 | e6e5906b | pbrook | break;
|
2408 | e6e5906b | pbrook | case 15: /* t */ |
2409 | e1f3808e | pbrook | tcg_gen_br(l1); |
2410 | e6e5906b | pbrook | break;
|
2411 | e6e5906b | pbrook | } |
2412 | e6e5906b | pbrook | gen_jmp_tb(s, 0, s->pc);
|
2413 | e6e5906b | pbrook | gen_set_label(l1); |
2414 | e6e5906b | pbrook | gen_jmp_tb(s, 1, addr + offset);
|
2415 | e6e5906b | pbrook | } |
2416 | e6e5906b | pbrook | |
2417 | 0633879f | pbrook | DISAS_INSN(frestore) |
2418 | 0633879f | pbrook | { |
2419 | 0633879f | pbrook | /* TODO: Implement frestore. */
|
2420 | 0633879f | pbrook | qemu_assert(0, "FRESTORE not implemented"); |
2421 | 0633879f | pbrook | } |
2422 | 0633879f | pbrook | |
2423 | 0633879f | pbrook | DISAS_INSN(fsave) |
2424 | 0633879f | pbrook | { |
2425 | 0633879f | pbrook | /* TODO: Implement fsave. */
|
2426 | 0633879f | pbrook | qemu_assert(0, "FSAVE not implemented"); |
2427 | 0633879f | pbrook | } |
2428 | 0633879f | pbrook | |
2429 | e1f3808e | pbrook | static inline TCGv gen_mac_extract_word(DisasContext *s, TCGv val, int upper) |
2430 | acf930aa | pbrook | { |
2431 | e1f3808e | pbrook | TCGv tmp = gen_new_qreg(QMODE_I32); |
2432 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI) {
|
2433 | acf930aa | pbrook | if (upper)
|
2434 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, val, 0xffff0000);
|
2435 | acf930aa | pbrook | else
|
2436 | e1f3808e | pbrook | tcg_gen_shli_i32(tmp, val, 16);
|
2437 | acf930aa | pbrook | } else if (s->env->macsr & MACSR_SU) { |
2438 | acf930aa | pbrook | if (upper)
|
2439 | e1f3808e | pbrook | tcg_gen_sari_i32(tmp, val, 16);
|
2440 | acf930aa | pbrook | else
|
2441 | e1f3808e | pbrook | tcg_gen_ext16s_i32(tmp, val); |
2442 | acf930aa | pbrook | } else {
|
2443 | acf930aa | pbrook | if (upper)
|
2444 | e1f3808e | pbrook | tcg_gen_shri_i32(tmp, val, 16);
|
2445 | acf930aa | pbrook | else
|
2446 | e1f3808e | pbrook | tcg_gen_ext16u_i32(tmp, val); |
2447 | acf930aa | pbrook | } |
2448 | acf930aa | pbrook | return tmp;
|
2449 | acf930aa | pbrook | } |
2450 | acf930aa | pbrook | |
2451 | e1f3808e | pbrook | static void gen_mac_clear_flags(void) |
2452 | e1f3808e | pbrook | { |
2453 | e1f3808e | pbrook | tcg_gen_andi_i32(QREG_MACSR, QREG_MACSR, |
2454 | e1f3808e | pbrook | ~(MACSR_V | MACSR_Z | MACSR_N | MACSR_EV)); |
2455 | e1f3808e | pbrook | } |
2456 | e1f3808e | pbrook | |
2457 | acf930aa | pbrook | DISAS_INSN(mac) |
2458 | acf930aa | pbrook | { |
2459 | e1f3808e | pbrook | TCGv rx; |
2460 | e1f3808e | pbrook | TCGv ry; |
2461 | acf930aa | pbrook | uint16_t ext; |
2462 | acf930aa | pbrook | int acc;
|
2463 | e1f3808e | pbrook | TCGv tmp; |
2464 | e1f3808e | pbrook | TCGv addr; |
2465 | e1f3808e | pbrook | TCGv loadval; |
2466 | acf930aa | pbrook | int dual;
|
2467 | e1f3808e | pbrook | TCGv saved_flags; |
2468 | e1f3808e | pbrook | |
2469 | e1f3808e | pbrook | if (IS_NULL_QREG(s->mactmp))
|
2470 | e1f3808e | pbrook | s->mactmp = tcg_temp_new(TCG_TYPE_I64); |
2471 | acf930aa | pbrook | |
2472 | acf930aa | pbrook | ext = lduw_code(s->pc); |
2473 | acf930aa | pbrook | s->pc += 2;
|
2474 | acf930aa | pbrook | |
2475 | acf930aa | pbrook | acc = ((insn >> 7) & 1) | ((ext >> 3) & 2); |
2476 | acf930aa | pbrook | dual = ((insn & 0x30) != 0 && (ext & 3) != 0); |
2477 | d315c888 | pbrook | if (dual && !m68k_feature(s->env, M68K_FEATURE_CF_EMAC_B)) {
|
2478 | d315c888 | pbrook | disas_undef(s, insn); |
2479 | d315c888 | pbrook | return;
|
2480 | d315c888 | pbrook | } |
2481 | acf930aa | pbrook | if (insn & 0x30) { |
2482 | acf930aa | pbrook | /* MAC with load. */
|
2483 | acf930aa | pbrook | tmp = gen_lea(s, insn, OS_LONG); |
2484 | acf930aa | pbrook | addr = gen_new_qreg(QMODE_I32); |
2485 | e1f3808e | pbrook | tcg_gen_and_i32(addr, tmp, QREG_MAC_MASK); |
2486 | acf930aa | pbrook | /* Load the value now to ensure correct exception behavior.
|
2487 | acf930aa | pbrook | Perform writeback after reading the MAC inputs. */
|
2488 | acf930aa | pbrook | loadval = gen_load(s, OS_LONG, addr, 0);
|
2489 | acf930aa | pbrook | |
2490 | acf930aa | pbrook | acc ^= 1;
|
2491 | acf930aa | pbrook | rx = (ext & 0x8000) ? AREG(ext, 12) : DREG(insn, 12); |
2492 | acf930aa | pbrook | ry = (ext & 8) ? AREG(ext, 0) : DREG(ext, 0); |
2493 | acf930aa | pbrook | } else {
|
2494 | e1f3808e | pbrook | loadval = addr = NULL_QREG; |
2495 | acf930aa | pbrook | rx = (insn & 0x40) ? AREG(insn, 9) : DREG(insn, 9); |
2496 | acf930aa | pbrook | ry = (insn & 8) ? AREG(insn, 0) : DREG(insn, 0); |
2497 | acf930aa | pbrook | } |
2498 | acf930aa | pbrook | |
2499 | e1f3808e | pbrook | gen_mac_clear_flags(); |
2500 | e1f3808e | pbrook | #if 0
|
2501 | acf930aa | pbrook | l1 = -1;
|
2502 | e1f3808e | pbrook | /* Disabled because conditional branches clobber temporary vars. */
|
2503 | acf930aa | pbrook | if ((s->env->macsr & MACSR_OMC) != 0 && !dual) {
|
2504 | acf930aa | pbrook | /* Skip the multiply if we know we will ignore it. */
|
2505 | acf930aa | pbrook | l1 = gen_new_label();
|
2506 | acf930aa | pbrook | tmp = gen_new_qreg(QMODE_I32);
|
2507 | e1f3808e | pbrook | tcg_gen_andi_i32(tmp, QREG_MACSR, 1 << (acc + 8));
|
2508 | acf930aa | pbrook | gen_op_jmp_nz32(tmp, l1);
|
2509 | acf930aa | pbrook | }
|
2510 | e1f3808e | pbrook | #endif
|
2511 | acf930aa | pbrook | |
2512 | acf930aa | pbrook | if ((ext & 0x0800) == 0) { |
2513 | acf930aa | pbrook | /* Word. */
|
2514 | acf930aa | pbrook | rx = gen_mac_extract_word(s, rx, (ext & 0x80) != 0); |
2515 | acf930aa | pbrook | ry = gen_mac_extract_word(s, ry, (ext & 0x40) != 0); |
2516 | acf930aa | pbrook | } |
2517 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI) {
|
2518 | e1f3808e | pbrook | gen_helper_macmulf(s->mactmp, cpu_env, rx, ry); |
2519 | acf930aa | pbrook | } else {
|
2520 | acf930aa | pbrook | if (s->env->macsr & MACSR_SU)
|
2521 | e1f3808e | pbrook | gen_helper_macmuls(s->mactmp, cpu_env, rx, ry); |
2522 | acf930aa | pbrook | else
|
2523 | e1f3808e | pbrook | gen_helper_macmulu(s->mactmp, cpu_env, rx, ry); |
2524 | acf930aa | pbrook | switch ((ext >> 9) & 3) { |
2525 | acf930aa | pbrook | case 1: |
2526 | e1f3808e | pbrook | tcg_gen_shli_i64(s->mactmp, s->mactmp, 1);
|
2527 | acf930aa | pbrook | break;
|
2528 | acf930aa | pbrook | case 3: |
2529 | e1f3808e | pbrook | tcg_gen_shri_i64(s->mactmp, s->mactmp, 1);
|
2530 | acf930aa | pbrook | break;
|
2531 | acf930aa | pbrook | } |
2532 | acf930aa | pbrook | } |
2533 | acf930aa | pbrook | |
2534 | acf930aa | pbrook | if (dual) {
|
2535 | acf930aa | pbrook | /* Save the overflow flag from the multiply. */
|
2536 | acf930aa | pbrook | saved_flags = gen_new_qreg(QMODE_I32); |
2537 | e1f3808e | pbrook | tcg_gen_mov_i32(saved_flags, QREG_MACSR); |
2538 | e1f3808e | pbrook | } else {
|
2539 | e1f3808e | pbrook | saved_flags = NULL_QREG; |
2540 | acf930aa | pbrook | } |
2541 | acf930aa | pbrook | |
2542 | e1f3808e | pbrook | #if 0
|
2543 | e1f3808e | pbrook | /* Disabled because conditional branches clobber temporary vars. */
|
2544 | acf930aa | pbrook | if ((s->env->macsr & MACSR_OMC) != 0 && dual) {
|
2545 | acf930aa | pbrook | /* Skip the accumulate if the value is already saturated. */
|
2546 | acf930aa | pbrook | l1 = gen_new_label();
|
2547 | acf930aa | pbrook | tmp = gen_new_qreg(QMODE_I32);
|
2548 | acf930aa | pbrook | gen_op_and32(tmp, QREG_MACSR, gen_im32(MACSR_PAV0 << acc));
|
2549 | acf930aa | pbrook | gen_op_jmp_nz32(tmp, l1);
|
2550 | acf930aa | pbrook | }
|
2551 | e1f3808e | pbrook | #endif
|
2552 | acf930aa | pbrook | |
2553 | acf930aa | pbrook | if (insn & 0x100) |
2554 | e1f3808e | pbrook | tcg_gen_sub_i64(MACREG(acc), MACREG(acc), s->mactmp); |
2555 | acf930aa | pbrook | else
|
2556 | e1f3808e | pbrook | tcg_gen_add_i64(MACREG(acc), MACREG(acc), s->mactmp); |
2557 | acf930aa | pbrook | |
2558 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI)
|
2559 | e1f3808e | pbrook | gen_helper_macsatf(cpu_env, tcg_const_i32(acc)); |
2560 | acf930aa | pbrook | else if (s->env->macsr & MACSR_SU) |
2561 | e1f3808e | pbrook | gen_helper_macsats(cpu_env, tcg_const_i32(acc)); |
2562 | acf930aa | pbrook | else
|
2563 | e1f3808e | pbrook | gen_helper_macsatu(cpu_env, tcg_const_i32(acc)); |
2564 | acf930aa | pbrook | |
2565 | e1f3808e | pbrook | #if 0
|
2566 | e1f3808e | pbrook | /* Disabled because conditional branches clobber temporary vars. */
|
2567 | acf930aa | pbrook | if (l1 != -1)
|
2568 | acf930aa | pbrook | gen_set_label(l1);
|
2569 | e1f3808e | pbrook | #endif
|
2570 | acf930aa | pbrook | |
2571 | acf930aa | pbrook | if (dual) {
|
2572 | acf930aa | pbrook | /* Dual accumulate variant. */
|
2573 | acf930aa | pbrook | acc = (ext >> 2) & 3; |
2574 | acf930aa | pbrook | /* Restore the overflow flag from the multiplier. */
|
2575 | e1f3808e | pbrook | tcg_gen_mov_i32(QREG_MACSR, saved_flags); |
2576 | e1f3808e | pbrook | #if 0
|
2577 | e1f3808e | pbrook | /* Disabled because conditional branches clobber temporary vars. */
|
2578 | acf930aa | pbrook | if ((s->env->macsr & MACSR_OMC) != 0) {
|
2579 | acf930aa | pbrook | /* Skip the accumulate if the value is already saturated. */
|
2580 | acf930aa | pbrook | l1 = gen_new_label();
|
2581 | acf930aa | pbrook | tmp = gen_new_qreg(QMODE_I32);
|
2582 | acf930aa | pbrook | gen_op_and32(tmp, QREG_MACSR, gen_im32(MACSR_PAV0 << acc));
|
2583 | acf930aa | pbrook | gen_op_jmp_nz32(tmp, l1);
|
2584 | acf930aa | pbrook | }
|
2585 | e1f3808e | pbrook | #endif
|
2586 | acf930aa | pbrook | if (ext & 2) |
2587 | e1f3808e | pbrook | tcg_gen_sub_i64(MACREG(acc), MACREG(acc), s->mactmp); |
2588 | acf930aa | pbrook | else
|
2589 | e1f3808e | pbrook | tcg_gen_add_i64(MACREG(acc), MACREG(acc), s->mactmp); |
2590 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI)
|
2591 | e1f3808e | pbrook | gen_helper_macsatf(cpu_env, tcg_const_i32(acc)); |
2592 | acf930aa | pbrook | else if (s->env->macsr & MACSR_SU) |
2593 | e1f3808e | pbrook | gen_helper_macsats(cpu_env, tcg_const_i32(acc)); |
2594 | acf930aa | pbrook | else
|
2595 | e1f3808e | pbrook | gen_helper_macsatu(cpu_env, tcg_const_i32(acc)); |
2596 | e1f3808e | pbrook | #if 0
|
2597 | e1f3808e | pbrook | /* Disabled because conditional branches clobber temporary vars. */
|
2598 | acf930aa | pbrook | if (l1 != -1)
|
2599 | acf930aa | pbrook | gen_set_label(l1);
|
2600 | e1f3808e | pbrook | #endif
|
2601 | acf930aa | pbrook | } |
2602 | e1f3808e | pbrook | gen_helper_mac_set_flags(cpu_env, tcg_const_i32(acc)); |
2603 | acf930aa | pbrook | |
2604 | acf930aa | pbrook | if (insn & 0x30) { |
2605 | e1f3808e | pbrook | TCGv rw; |
2606 | acf930aa | pbrook | rw = (insn & 0x40) ? AREG(insn, 9) : DREG(insn, 9); |
2607 | e1f3808e | pbrook | tcg_gen_mov_i32(rw, loadval); |
2608 | acf930aa | pbrook | /* FIXME: Should address writeback happen with the masked or
|
2609 | acf930aa | pbrook | unmasked value? */
|
2610 | acf930aa | pbrook | switch ((insn >> 3) & 7) { |
2611 | acf930aa | pbrook | case 3: /* Post-increment. */ |
2612 | e1f3808e | pbrook | tcg_gen_addi_i32(AREG(insn, 0), addr, 4); |
2613 | acf930aa | pbrook | break;
|
2614 | acf930aa | pbrook | case 4: /* Pre-decrement. */ |
2615 | e1f3808e | pbrook | tcg_gen_mov_i32(AREG(insn, 0), addr);
|
2616 | acf930aa | pbrook | } |
2617 | acf930aa | pbrook | } |
2618 | acf930aa | pbrook | } |
2619 | acf930aa | pbrook | |
2620 | acf930aa | pbrook | DISAS_INSN(from_mac) |
2621 | acf930aa | pbrook | { |
2622 | e1f3808e | pbrook | TCGv rx; |
2623 | e1f3808e | pbrook | TCGv acc; |
2624 | e1f3808e | pbrook | int accnum;
|
2625 | acf930aa | pbrook | |
2626 | acf930aa | pbrook | rx = (insn & 8) ? AREG(insn, 0) : DREG(insn, 0); |
2627 | e1f3808e | pbrook | accnum = (insn >> 9) & 3; |
2628 | e1f3808e | pbrook | acc = MACREG(accnum); |
2629 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI) {
|
2630 | e1f3808e | pbrook | gen_helper_get_macf(cpu_env, rx, acc); |
2631 | acf930aa | pbrook | } else if ((s->env->macsr & MACSR_OMC) == 0) { |
2632 | e1f3808e | pbrook | tcg_gen_trunc_i64_i32(rx, acc); |
2633 | acf930aa | pbrook | } else if (s->env->macsr & MACSR_SU) { |
2634 | e1f3808e | pbrook | gen_helper_get_macs(rx, acc); |
2635 | acf930aa | pbrook | } else {
|
2636 | e1f3808e | pbrook | gen_helper_get_macu(rx, acc); |
2637 | e1f3808e | pbrook | } |
2638 | e1f3808e | pbrook | if (insn & 0x40) { |
2639 | e1f3808e | pbrook | tcg_gen_movi_i64(acc, 0);
|
2640 | e1f3808e | pbrook | tcg_gen_andi_i32(QREG_MACSR, QREG_MACSR, ~(MACSR_PAV0 << accnum)); |
2641 | acf930aa | pbrook | } |
2642 | acf930aa | pbrook | } |
2643 | acf930aa | pbrook | |
2644 | acf930aa | pbrook | DISAS_INSN(move_mac) |
2645 | acf930aa | pbrook | { |
2646 | e1f3808e | pbrook | /* FIXME: This can be done without a helper. */
|
2647 | acf930aa | pbrook | int src;
|
2648 | e1f3808e | pbrook | TCGv dest; |
2649 | acf930aa | pbrook | src = insn & 3;
|
2650 | e1f3808e | pbrook | dest = tcg_const_i32((insn >> 9) & 3); |
2651 | e1f3808e | pbrook | gen_helper_mac_move(cpu_env, dest, tcg_const_i32(src)); |
2652 | e1f3808e | pbrook | gen_mac_clear_flags(); |
2653 | e1f3808e | pbrook | gen_helper_mac_set_flags(cpu_env, dest); |
2654 | acf930aa | pbrook | } |
2655 | acf930aa | pbrook | |
2656 | acf930aa | pbrook | DISAS_INSN(from_macsr) |
2657 | acf930aa | pbrook | { |
2658 | e1f3808e | pbrook | TCGv reg; |
2659 | acf930aa | pbrook | |
2660 | acf930aa | pbrook | reg = (insn & 8) ? AREG(insn, 0) : DREG(insn, 0); |
2661 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, QREG_MACSR); |
2662 | acf930aa | pbrook | } |
2663 | acf930aa | pbrook | |
2664 | acf930aa | pbrook | DISAS_INSN(from_mask) |
2665 | acf930aa | pbrook | { |
2666 | e1f3808e | pbrook | TCGv reg; |
2667 | acf930aa | pbrook | reg = (insn & 8) ? AREG(insn, 0) : DREG(insn, 0); |
2668 | e1f3808e | pbrook | tcg_gen_mov_i32(reg, QREG_MAC_MASK); |
2669 | acf930aa | pbrook | } |
2670 | acf930aa | pbrook | |
2671 | acf930aa | pbrook | DISAS_INSN(from_mext) |
2672 | acf930aa | pbrook | { |
2673 | e1f3808e | pbrook | TCGv reg; |
2674 | e1f3808e | pbrook | TCGv acc; |
2675 | acf930aa | pbrook | reg = (insn & 8) ? AREG(insn, 0) : DREG(insn, 0); |
2676 | e1f3808e | pbrook | acc = tcg_const_i32((insn & 0x400) ? 2 : 0); |
2677 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI)
|
2678 | e1f3808e | pbrook | gen_helper_get_mac_extf(reg, cpu_env, acc); |
2679 | acf930aa | pbrook | else
|
2680 | e1f3808e | pbrook | gen_helper_get_mac_exti(reg, cpu_env, acc); |
2681 | acf930aa | pbrook | } |
2682 | acf930aa | pbrook | |
2683 | acf930aa | pbrook | DISAS_INSN(macsr_to_ccr) |
2684 | acf930aa | pbrook | { |
2685 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_CC_X, 0);
|
2686 | e1f3808e | pbrook | tcg_gen_andi_i32(QREG_CC_DEST, QREG_MACSR, 0xf);
|
2687 | acf930aa | pbrook | s->cc_op = CC_OP_FLAGS; |
2688 | acf930aa | pbrook | } |
2689 | acf930aa | pbrook | |
2690 | acf930aa | pbrook | DISAS_INSN(to_mac) |
2691 | acf930aa | pbrook | { |
2692 | e1f3808e | pbrook | TCGv acc; |
2693 | e1f3808e | pbrook | TCGv val; |
2694 | e1f3808e | pbrook | int accnum;
|
2695 | e1f3808e | pbrook | accnum = (insn >> 9) & 3; |
2696 | e1f3808e | pbrook | acc = MACREG(accnum); |
2697 | acf930aa | pbrook | SRC_EA(val, OS_LONG, 0, NULL); |
2698 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI) {
|
2699 | e1f3808e | pbrook | tcg_gen_ext_i32_i64(acc, val); |
2700 | e1f3808e | pbrook | tcg_gen_shli_i64(acc, acc, 8);
|
2701 | acf930aa | pbrook | } else if (s->env->macsr & MACSR_SU) { |
2702 | e1f3808e | pbrook | tcg_gen_ext_i32_i64(acc, val); |
2703 | acf930aa | pbrook | } else {
|
2704 | e1f3808e | pbrook | tcg_gen_extu_i32_i64(acc, val); |
2705 | acf930aa | pbrook | } |
2706 | e1f3808e | pbrook | tcg_gen_andi_i32(QREG_MACSR, QREG_MACSR, ~(MACSR_PAV0 << accnum)); |
2707 | e1f3808e | pbrook | gen_mac_clear_flags(); |
2708 | e1f3808e | pbrook | gen_helper_mac_set_flags(cpu_env, tcg_const_i32(accnum)); |
2709 | acf930aa | pbrook | } |
2710 | acf930aa | pbrook | |
2711 | acf930aa | pbrook | DISAS_INSN(to_macsr) |
2712 | acf930aa | pbrook | { |
2713 | e1f3808e | pbrook | TCGv val; |
2714 | acf930aa | pbrook | SRC_EA(val, OS_LONG, 0, NULL); |
2715 | e1f3808e | pbrook | gen_helper_set_macsr(cpu_env, val); |
2716 | acf930aa | pbrook | gen_lookup_tb(s); |
2717 | acf930aa | pbrook | } |
2718 | acf930aa | pbrook | |
2719 | acf930aa | pbrook | DISAS_INSN(to_mask) |
2720 | acf930aa | pbrook | { |
2721 | e1f3808e | pbrook | TCGv val; |
2722 | acf930aa | pbrook | SRC_EA(val, OS_LONG, 0, NULL); |
2723 | e1f3808e | pbrook | tcg_gen_ori_i32(QREG_MAC_MASK, val, 0xffff0000);
|
2724 | acf930aa | pbrook | } |
2725 | acf930aa | pbrook | |
2726 | acf930aa | pbrook | DISAS_INSN(to_mext) |
2727 | acf930aa | pbrook | { |
2728 | e1f3808e | pbrook | TCGv val; |
2729 | e1f3808e | pbrook | TCGv acc; |
2730 | acf930aa | pbrook | SRC_EA(val, OS_LONG, 0, NULL); |
2731 | e1f3808e | pbrook | acc = tcg_const_i32((insn & 0x400) ? 2 : 0); |
2732 | acf930aa | pbrook | if (s->env->macsr & MACSR_FI)
|
2733 | e1f3808e | pbrook | gen_helper_set_mac_extf(cpu_env, val, acc); |
2734 | acf930aa | pbrook | else if (s->env->macsr & MACSR_SU) |
2735 | e1f3808e | pbrook | gen_helper_set_mac_exts(cpu_env, val, acc); |
2736 | acf930aa | pbrook | else
|
2737 | e1f3808e | pbrook | gen_helper_set_mac_extu(cpu_env, val, acc); |
2738 | acf930aa | pbrook | } |
2739 | acf930aa | pbrook | |
2740 | e6e5906b | pbrook | static disas_proc opcode_table[65536]; |
2741 | e6e5906b | pbrook | |
2742 | e6e5906b | pbrook | static void |
2743 | e6e5906b | pbrook | register_opcode (disas_proc proc, uint16_t opcode, uint16_t mask) |
2744 | e6e5906b | pbrook | { |
2745 | e6e5906b | pbrook | int i;
|
2746 | e6e5906b | pbrook | int from;
|
2747 | e6e5906b | pbrook | int to;
|
2748 | e6e5906b | pbrook | |
2749 | e6e5906b | pbrook | /* Sanity check. All set bits must be included in the mask. */
|
2750 | 5fc4adf6 | pbrook | if (opcode & ~mask) {
|
2751 | 5fc4adf6 | pbrook | fprintf(stderr, |
2752 | 5fc4adf6 | pbrook | "qemu internal error: bogus opcode definition %04x/%04x\n",
|
2753 | 5fc4adf6 | pbrook | opcode, mask); |
2754 | e6e5906b | pbrook | abort(); |
2755 | 5fc4adf6 | pbrook | } |
2756 | e6e5906b | pbrook | /* This could probably be cleverer. For now just optimize the case where
|
2757 | e6e5906b | pbrook | the top bits are known. */
|
2758 | e6e5906b | pbrook | /* Find the first zero bit in the mask. */
|
2759 | e6e5906b | pbrook | i = 0x8000;
|
2760 | e6e5906b | pbrook | while ((i & mask) != 0) |
2761 | e6e5906b | pbrook | i >>= 1;
|
2762 | e6e5906b | pbrook | /* Iterate over all combinations of this and lower bits. */
|
2763 | e6e5906b | pbrook | if (i == 0) |
2764 | e6e5906b | pbrook | i = 1;
|
2765 | e6e5906b | pbrook | else
|
2766 | e6e5906b | pbrook | i <<= 1;
|
2767 | e6e5906b | pbrook | from = opcode & ~(i - 1);
|
2768 | e6e5906b | pbrook | to = from + i; |
2769 | 0633879f | pbrook | for (i = from; i < to; i++) {
|
2770 | e6e5906b | pbrook | if ((i & mask) == opcode)
|
2771 | e6e5906b | pbrook | opcode_table[i] = proc; |
2772 | 0633879f | pbrook | } |
2773 | e6e5906b | pbrook | } |
2774 | e6e5906b | pbrook | |
2775 | e6e5906b | pbrook | /* Register m68k opcode handlers. Order is important.
|
2776 | e6e5906b | pbrook | Later insn override earlier ones. */
|
2777 | 0402f767 | pbrook | void register_m68k_insns (CPUM68KState *env)
|
2778 | e6e5906b | pbrook | { |
2779 | d315c888 | pbrook | #define INSN(name, opcode, mask, feature) do { \ |
2780 | 0402f767 | pbrook | if (m68k_feature(env, M68K_FEATURE_##feature)) \ |
2781 | d315c888 | pbrook | register_opcode(disas_##name, 0x##opcode, 0x##mask); \ |
2782 | d315c888 | pbrook | } while(0) |
2783 | 0402f767 | pbrook | INSN(undef, 0000, 0000, CF_ISA_A); |
2784 | 0402f767 | pbrook | INSN(arith_im, 0080, fff8, CF_ISA_A);
|
2785 | d315c888 | pbrook | INSN(bitrev, 00c0, fff8, CF_ISA_APLUSC);
|
2786 | 0402f767 | pbrook | INSN(bitop_reg, 0100, f1c0, CF_ISA_A);
|
2787 | 0402f767 | pbrook | INSN(bitop_reg, 0140, f1c0, CF_ISA_A);
|
2788 | 0402f767 | pbrook | INSN(bitop_reg, 0180, f1c0, CF_ISA_A);
|
2789 | 0402f767 | pbrook | INSN(bitop_reg, 01c0, f1c0, CF_ISA_A);
|
2790 | 0402f767 | pbrook | INSN(arith_im, 0280, fff8, CF_ISA_A);
|
2791 | d315c888 | pbrook | INSN(byterev, 02c0, fff8, CF_ISA_APLUSC);
|
2792 | 0402f767 | pbrook | INSN(arith_im, 0480, fff8, CF_ISA_A);
|
2793 | d315c888 | pbrook | INSN(ff1, 04c0, fff8, CF_ISA_APLUSC);
|
2794 | 0402f767 | pbrook | INSN(arith_im, 0680, fff8, CF_ISA_A);
|
2795 | 0402f767 | pbrook | INSN(bitop_im, 0800, ffc0, CF_ISA_A);
|
2796 | 0402f767 | pbrook | INSN(bitop_im, 0840, ffc0, CF_ISA_A);
|
2797 | 0402f767 | pbrook | INSN(bitop_im, 0880, ffc0, CF_ISA_A);
|
2798 | 0402f767 | pbrook | INSN(bitop_im, 08c0, ffc0, CF_ISA_A);
|
2799 | 0402f767 | pbrook | INSN(arith_im, 0a80, fff8, CF_ISA_A);
|
2800 | 0402f767 | pbrook | INSN(arith_im, 0c00, ff38, CF_ISA_A);
|
2801 | 0402f767 | pbrook | INSN(move, 1000, f000, CF_ISA_A);
|
2802 | 0402f767 | pbrook | INSN(move, 2000, f000, CF_ISA_A);
|
2803 | 0402f767 | pbrook | INSN(move, 3000, f000, CF_ISA_A);
|
2804 | d315c888 | pbrook | INSN(strldsr, 40e7, ffff, CF_ISA_APLUSC); |
2805 | 0402f767 | pbrook | INSN(negx, 4080, fff8, CF_ISA_A);
|
2806 | 0402f767 | pbrook | INSN(move_from_sr, 40c0, fff8, CF_ISA_A);
|
2807 | 0402f767 | pbrook | INSN(lea, 41c0, f1c0, CF_ISA_A);
|
2808 | 0402f767 | pbrook | INSN(clr, 4200, ff00, CF_ISA_A);
|
2809 | 0402f767 | pbrook | INSN(undef, 42c0, ffc0, CF_ISA_A);
|
2810 | 0402f767 | pbrook | INSN(move_from_ccr, 42c0, fff8, CF_ISA_A);
|
2811 | 0402f767 | pbrook | INSN(neg, 4480, fff8, CF_ISA_A);
|
2812 | 0402f767 | pbrook | INSN(move_to_ccr, 44c0, ffc0, CF_ISA_A);
|
2813 | 0402f767 | pbrook | INSN(not, 4680, fff8, CF_ISA_A);
|
2814 | 0402f767 | pbrook | INSN(move_to_sr, 46c0, ffc0, CF_ISA_A);
|
2815 | 0402f767 | pbrook | INSN(pea, 4840, ffc0, CF_ISA_A);
|
2816 | 0402f767 | pbrook | INSN(swap, 4840, fff8, CF_ISA_A);
|
2817 | 0402f767 | pbrook | INSN(movem, 48c0, fbc0, CF_ISA_A);
|
2818 | 0402f767 | pbrook | INSN(ext, 4880, fff8, CF_ISA_A);
|
2819 | 0402f767 | pbrook | INSN(ext, 48c0, fff8, CF_ISA_A);
|
2820 | 0402f767 | pbrook | INSN(ext, 49c0, fff8, CF_ISA_A);
|
2821 | 0402f767 | pbrook | INSN(tst, 4a00, ff00, CF_ISA_A);
|
2822 | 0402f767 | pbrook | INSN(tas, 4ac0, ffc0, CF_ISA_B);
|
2823 | 0402f767 | pbrook | INSN(halt, 4ac8, ffff, CF_ISA_A);
|
2824 | 0402f767 | pbrook | INSN(pulse, 4acc, ffff, CF_ISA_A);
|
2825 | 0402f767 | pbrook | INSN(illegal, 4afc, ffff, CF_ISA_A);
|
2826 | 0402f767 | pbrook | INSN(mull, 4c00, ffc0, CF_ISA_A);
|
2827 | 0402f767 | pbrook | INSN(divl, 4c40, ffc0, CF_ISA_A);
|
2828 | 0402f767 | pbrook | INSN(sats, 4c80, fff8, CF_ISA_B);
|
2829 | 0402f767 | pbrook | INSN(trap, 4e40, fff0, CF_ISA_A);
|
2830 | 0402f767 | pbrook | INSN(link, 4e50, fff8, CF_ISA_A);
|
2831 | 0402f767 | pbrook | INSN(unlk, 4e58, fff8, CF_ISA_A);
|
2832 | 20dcee94 | pbrook | INSN(move_to_usp, 4e60, fff8, USP);
|
2833 | 20dcee94 | pbrook | INSN(move_from_usp, 4e68, fff8, USP);
|
2834 | 0402f767 | pbrook | INSN(nop, 4e71, ffff, CF_ISA_A);
|
2835 | 0402f767 | pbrook | INSN(stop, 4e72, ffff, CF_ISA_A);
|
2836 | 0402f767 | pbrook | INSN(rte, 4e73, ffff, CF_ISA_A);
|
2837 | 0402f767 | pbrook | INSN(rts, 4e75, ffff, CF_ISA_A);
|
2838 | 0402f767 | pbrook | INSN(movec, 4e7b, ffff, CF_ISA_A);
|
2839 | 0402f767 | pbrook | INSN(jump, 4e80, ffc0, CF_ISA_A);
|
2840 | 0402f767 | pbrook | INSN(jump, 4ec0, ffc0, CF_ISA_A);
|
2841 | 0402f767 | pbrook | INSN(addsubq, 5180, f1c0, CF_ISA_A);
|
2842 | 0402f767 | pbrook | INSN(scc, 50c0, f0f8, CF_ISA_A);
|
2843 | 0402f767 | pbrook | INSN(addsubq, 5080, f1c0, CF_ISA_A);
|
2844 | 0402f767 | pbrook | INSN(tpf, 51f8, fff8, CF_ISA_A); |
2845 | d315c888 | pbrook | |
2846 | d315c888 | pbrook | /* Branch instructions. */
|
2847 | 0402f767 | pbrook | INSN(branch, 6000, f000, CF_ISA_A);
|
2848 | d315c888 | pbrook | /* Disable long branch instructions, then add back the ones we want. */
|
2849 | d315c888 | pbrook | INSN(undef, 60ff, f0ff, CF_ISA_A); /* All long branches. */ |
2850 | d315c888 | pbrook | INSN(branch, 60ff, f0ff, CF_ISA_B); |
2851 | d315c888 | pbrook | INSN(undef, 60ff, ffff, CF_ISA_B); /* bra.l */ |
2852 | d315c888 | pbrook | INSN(branch, 60ff, ffff, BRAL); |
2853 | d315c888 | pbrook | |
2854 | 0402f767 | pbrook | INSN(moveq, 7000, f100, CF_ISA_A);
|
2855 | 0402f767 | pbrook | INSN(mvzs, 7100, f100, CF_ISA_B);
|
2856 | 0402f767 | pbrook | INSN(or, 8000, f000, CF_ISA_A);
|
2857 | 0402f767 | pbrook | INSN(divw, 80c0, f0c0, CF_ISA_A);
|
2858 | 0402f767 | pbrook | INSN(addsub, 9000, f000, CF_ISA_A);
|
2859 | 0402f767 | pbrook | INSN(subx, 9180, f1f8, CF_ISA_A);
|
2860 | 0402f767 | pbrook | INSN(suba, 91c0, f1c0, CF_ISA_A);
|
2861 | acf930aa | pbrook | |
2862 | 0402f767 | pbrook | INSN(undef_mac, a000, f000, CF_ISA_A); |
2863 | acf930aa | pbrook | INSN(mac, a000, f100, CF_EMAC); |
2864 | acf930aa | pbrook | INSN(from_mac, a180, f9b0, CF_EMAC); |
2865 | acf930aa | pbrook | INSN(move_mac, a110, f9fc, CF_EMAC); |
2866 | acf930aa | pbrook | INSN(from_macsr,a980, f9f0, CF_EMAC); |
2867 | acf930aa | pbrook | INSN(from_mask, ad80, fff0, CF_EMAC); |
2868 | acf930aa | pbrook | INSN(from_mext, ab80, fbf0, CF_EMAC); |
2869 | acf930aa | pbrook | INSN(macsr_to_ccr, a9c0, ffff, CF_EMAC); |
2870 | acf930aa | pbrook | INSN(to_mac, a100, f9c0, CF_EMAC); |
2871 | acf930aa | pbrook | INSN(to_macsr, a900, ffc0, CF_EMAC); |
2872 | acf930aa | pbrook | INSN(to_mext, ab00, fbc0, CF_EMAC); |
2873 | acf930aa | pbrook | INSN(to_mask, ad00, ffc0, CF_EMAC); |
2874 | acf930aa | pbrook | |
2875 | 0402f767 | pbrook | INSN(mov3q, a140, f1c0, CF_ISA_B); |
2876 | 0402f767 | pbrook | INSN(cmp, b000, f1c0, CF_ISA_B); /* cmp.b */
|
2877 | 0402f767 | pbrook | INSN(cmp, b040, f1c0, CF_ISA_B); /* cmp.w */
|
2878 | 0402f767 | pbrook | INSN(cmpa, b0c0, f1c0, CF_ISA_B); /* cmpa.w */
|
2879 | 0402f767 | pbrook | INSN(cmp, b080, f1c0, CF_ISA_A); |
2880 | 0402f767 | pbrook | INSN(cmpa, b1c0, f1c0, CF_ISA_A); |
2881 | 0402f767 | pbrook | INSN(eor, b180, f1c0, CF_ISA_A); |
2882 | 0402f767 | pbrook | INSN(and, c000, f000, CF_ISA_A); |
2883 | 0402f767 | pbrook | INSN(mulw, c0c0, f0c0, CF_ISA_A); |
2884 | 0402f767 | pbrook | INSN(addsub, d000, f000, CF_ISA_A); |
2885 | 0402f767 | pbrook | INSN(addx, d180, f1f8, CF_ISA_A); |
2886 | 0402f767 | pbrook | INSN(adda, d1c0, f1c0, CF_ISA_A); |
2887 | 0402f767 | pbrook | INSN(shift_im, e080, f0f0, CF_ISA_A); |
2888 | 0402f767 | pbrook | INSN(shift_reg, e0a0, f0f0, CF_ISA_A); |
2889 | 0402f767 | pbrook | INSN(undef_fpu, f000, f000, CF_ISA_A); |
2890 | e6e5906b | pbrook | INSN(fpu, f200, ffc0, CF_FPU); |
2891 | e6e5906b | pbrook | INSN(fbcc, f280, ffc0, CF_FPU); |
2892 | 0633879f | pbrook | INSN(frestore, f340, ffc0, CF_FPU); |
2893 | 0633879f | pbrook | INSN(fsave, f340, ffc0, CF_FPU); |
2894 | 0402f767 | pbrook | INSN(intouch, f340, ffc0, CF_ISA_A); |
2895 | 0402f767 | pbrook | INSN(cpushl, f428, ff38, CF_ISA_A); |
2896 | 0402f767 | pbrook | INSN(wddata, fb00, ff00, CF_ISA_A); |
2897 | 0402f767 | pbrook | INSN(wdebug, fbc0, ffc0, CF_ISA_A); |
2898 | e6e5906b | pbrook | #undef INSN
|
2899 | e6e5906b | pbrook | } |
2900 | e6e5906b | pbrook | |
2901 | e6e5906b | pbrook | /* ??? Some of this implementation is not exception safe. We should always
|
2902 | e6e5906b | pbrook | write back the result to memory before setting the condition codes. */
|
2903 | e6e5906b | pbrook | static void disas_m68k_insn(CPUState * env, DisasContext *s) |
2904 | e6e5906b | pbrook | { |
2905 | e6e5906b | pbrook | uint16_t insn; |
2906 | e6e5906b | pbrook | |
2907 | 0633879f | pbrook | insn = lduw_code(s->pc); |
2908 | e6e5906b | pbrook | s->pc += 2;
|
2909 | e6e5906b | pbrook | |
2910 | e6e5906b | pbrook | opcode_table[insn](s, insn); |
2911 | e6e5906b | pbrook | } |
2912 | e6e5906b | pbrook | |
2913 | e6e5906b | pbrook | /* generate intermediate code for basic block 'tb'. */
|
2914 | 820e00f2 | ths | static inline int |
2915 | 820e00f2 | ths | gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, |
2916 | 820e00f2 | ths | int search_pc)
|
2917 | e6e5906b | pbrook | { |
2918 | e6e5906b | pbrook | DisasContext dc1, *dc = &dc1; |
2919 | e6e5906b | pbrook | uint16_t *gen_opc_end; |
2920 | e6e5906b | pbrook | int j, lj;
|
2921 | e6e5906b | pbrook | target_ulong pc_start; |
2922 | e6e5906b | pbrook | int pc_offset;
|
2923 | e6e5906b | pbrook | int last_cc_op;
|
2924 | 2e70f6ef | pbrook | int num_insns;
|
2925 | 2e70f6ef | pbrook | int max_insns;
|
2926 | e6e5906b | pbrook | |
2927 | e6e5906b | pbrook | /* generate intermediate code */
|
2928 | e6e5906b | pbrook | pc_start = tb->pc; |
2929 | 3b46e624 | ths | |
2930 | e6e5906b | pbrook | dc->tb = tb; |
2931 | e6e5906b | pbrook | |
2932 | e6e5906b | pbrook | gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; |
2933 | e6e5906b | pbrook | |
2934 | e6dbd3b3 | pbrook | dc->env = env; |
2935 | e6e5906b | pbrook | dc->is_jmp = DISAS_NEXT; |
2936 | e6e5906b | pbrook | dc->pc = pc_start; |
2937 | e6e5906b | pbrook | dc->cc_op = CC_OP_DYNAMIC; |
2938 | e6e5906b | pbrook | dc->singlestep_enabled = env->singlestep_enabled; |
2939 | e6e5906b | pbrook | dc->fpcr = env->fpcr; |
2940 | 0633879f | pbrook | dc->user = (env->sr & SR_S) == 0;
|
2941 | c9bac22c | pbrook | dc->is_mem = 0;
|
2942 | e1f3808e | pbrook | dc->mactmp = NULL_QREG; |
2943 | e6e5906b | pbrook | lj = -1;
|
2944 | 2e70f6ef | pbrook | num_insns = 0;
|
2945 | 2e70f6ef | pbrook | max_insns = tb->cflags & CF_COUNT_MASK; |
2946 | 2e70f6ef | pbrook | if (max_insns == 0) |
2947 | 2e70f6ef | pbrook | max_insns = CF_COUNT_MASK; |
2948 | 2e70f6ef | pbrook | |
2949 | 2e70f6ef | pbrook | gen_icount_start(); |
2950 | e6e5906b | pbrook | do {
|
2951 | e6e5906b | pbrook | pc_offset = dc->pc - pc_start; |
2952 | e6e5906b | pbrook | gen_throws_exception = NULL;
|
2953 | e6e5906b | pbrook | if (env->nb_breakpoints > 0) { |
2954 | e6e5906b | pbrook | for(j = 0; j < env->nb_breakpoints; j++) { |
2955 | e6e5906b | pbrook | if (env->breakpoints[j] == dc->pc) {
|
2956 | e6e5906b | pbrook | gen_exception(dc, dc->pc, EXCP_DEBUG); |
2957 | e6e5906b | pbrook | dc->is_jmp = DISAS_JUMP; |
2958 | e6e5906b | pbrook | break;
|
2959 | e6e5906b | pbrook | } |
2960 | e6e5906b | pbrook | } |
2961 | e6e5906b | pbrook | if (dc->is_jmp)
|
2962 | e6e5906b | pbrook | break;
|
2963 | e6e5906b | pbrook | } |
2964 | e6e5906b | pbrook | if (search_pc) {
|
2965 | e6e5906b | pbrook | j = gen_opc_ptr - gen_opc_buf; |
2966 | e6e5906b | pbrook | if (lj < j) {
|
2967 | e6e5906b | pbrook | lj++; |
2968 | e6e5906b | pbrook | while (lj < j)
|
2969 | e6e5906b | pbrook | gen_opc_instr_start[lj++] = 0;
|
2970 | e6e5906b | pbrook | } |
2971 | e6e5906b | pbrook | gen_opc_pc[lj] = dc->pc; |
2972 | e6e5906b | pbrook | gen_opc_instr_start[lj] = 1;
|
2973 | 2e70f6ef | pbrook | gen_opc_icount[lj] = num_insns; |
2974 | e6e5906b | pbrook | } |
2975 | 2e70f6ef | pbrook | if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) |
2976 | 2e70f6ef | pbrook | gen_io_start(); |
2977 | e6e5906b | pbrook | last_cc_op = dc->cc_op; |
2978 | 510ff0b7 | pbrook | dc->insn_pc = dc->pc; |
2979 | e6e5906b | pbrook | disas_m68k_insn(env, dc); |
2980 | 2e70f6ef | pbrook | num_insns++; |
2981 | c9bac22c | pbrook | |
2982 | c9bac22c | pbrook | /* Terminate the TB on memory ops if watchpoints are present. */
|
2983 | bf20dc07 | ths | /* FIXME: This should be replaced by the deterministic execution
|
2984 | c9bac22c | pbrook | * IRQ raising bits. */
|
2985 | c9bac22c | pbrook | if (dc->is_mem && env->nb_watchpoints)
|
2986 | c9bac22c | pbrook | break;
|
2987 | e6e5906b | pbrook | } while (!dc->is_jmp && gen_opc_ptr < gen_opc_end &&
|
2988 | e6e5906b | pbrook | !env->singlestep_enabled && |
2989 | 2e70f6ef | pbrook | (pc_offset) < (TARGET_PAGE_SIZE - 32) &&
|
2990 | 2e70f6ef | pbrook | num_insns < max_insns); |
2991 | e6e5906b | pbrook | |
2992 | 2e70f6ef | pbrook | if (tb->cflags & CF_LAST_IO)
|
2993 | 2e70f6ef | pbrook | gen_io_end(); |
2994 | 551bd27f | ths | if (unlikely(env->singlestep_enabled)) {
|
2995 | e6e5906b | pbrook | /* Make sure the pc is updated, and raise a debug exception. */
|
2996 | e6e5906b | pbrook | if (!dc->is_jmp) {
|
2997 | e6e5906b | pbrook | gen_flush_cc_op(dc); |
2998 | e1f3808e | pbrook | tcg_gen_movi_i32(QREG_PC, dc->pc); |
2999 | e6e5906b | pbrook | } |
3000 | e1f3808e | pbrook | gen_helper_raise_exception(tcg_const_i32(EXCP_DEBUG)); |
3001 | e6e5906b | pbrook | } else {
|
3002 | e6e5906b | pbrook | switch(dc->is_jmp) {
|
3003 | e6e5906b | pbrook | case DISAS_NEXT:
|
3004 | e6e5906b | pbrook | gen_flush_cc_op(dc); |
3005 | e6e5906b | pbrook | gen_jmp_tb(dc, 0, dc->pc);
|
3006 | e6e5906b | pbrook | break;
|
3007 | e6e5906b | pbrook | default:
|
3008 | e6e5906b | pbrook | case DISAS_JUMP:
|
3009 | e6e5906b | pbrook | case DISAS_UPDATE:
|
3010 | e6e5906b | pbrook | gen_flush_cc_op(dc); |
3011 | e6e5906b | pbrook | /* indicate that the hash table must be used to find the next TB */
|
3012 | 57fec1fe | bellard | tcg_gen_exit_tb(0);
|
3013 | e6e5906b | pbrook | break;
|
3014 | e6e5906b | pbrook | case DISAS_TB_JUMP:
|
3015 | e6e5906b | pbrook | /* nothing more to generate */
|
3016 | e6e5906b | pbrook | break;
|
3017 | e6e5906b | pbrook | } |
3018 | e6e5906b | pbrook | } |
3019 | 2e70f6ef | pbrook | gen_icount_end(tb, num_insns); |
3020 | e6e5906b | pbrook | *gen_opc_ptr = INDEX_op_end; |
3021 | e6e5906b | pbrook | |
3022 | e6e5906b | pbrook | #ifdef DEBUG_DISAS
|
3023 | e6e5906b | pbrook | if (loglevel & CPU_LOG_TB_IN_ASM) {
|
3024 | e6e5906b | pbrook | fprintf(logfile, "----------------\n");
|
3025 | e6e5906b | pbrook | fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
|
3026 | e6e5906b | pbrook | target_disas(logfile, pc_start, dc->pc - pc_start, 0);
|
3027 | e6e5906b | pbrook | fprintf(logfile, "\n");
|
3028 | e6e5906b | pbrook | } |
3029 | e6e5906b | pbrook | #endif
|
3030 | e6e5906b | pbrook | if (search_pc) {
|
3031 | e6e5906b | pbrook | j = gen_opc_ptr - gen_opc_buf; |
3032 | e6e5906b | pbrook | lj++; |
3033 | e6e5906b | pbrook | while (lj <= j)
|
3034 | e6e5906b | pbrook | gen_opc_instr_start[lj++] = 0;
|
3035 | e6e5906b | pbrook | } else {
|
3036 | e6e5906b | pbrook | tb->size = dc->pc - pc_start; |
3037 | 2e70f6ef | pbrook | tb->icount = num_insns; |
3038 | e6e5906b | pbrook | } |
3039 | e6e5906b | pbrook | |
3040 | e6e5906b | pbrook | //optimize_flags();
|
3041 | e6e5906b | pbrook | //expand_target_qops();
|
3042 | e6e5906b | pbrook | return 0; |
3043 | e6e5906b | pbrook | } |
3044 | e6e5906b | pbrook | |
3045 | e6e5906b | pbrook | int gen_intermediate_code(CPUState *env, TranslationBlock *tb)
|
3046 | e6e5906b | pbrook | { |
3047 | e6e5906b | pbrook | return gen_intermediate_code_internal(env, tb, 0); |
3048 | e6e5906b | pbrook | } |
3049 | e6e5906b | pbrook | |
3050 | e6e5906b | pbrook | int gen_intermediate_code_pc(CPUState *env, TranslationBlock *tb)
|
3051 | e6e5906b | pbrook | { |
3052 | e6e5906b | pbrook | return gen_intermediate_code_internal(env, tb, 1); |
3053 | e6e5906b | pbrook | } |
3054 | e6e5906b | pbrook | |
3055 | 5fafdf24 | ths | void cpu_dump_state(CPUState *env, FILE *f,
|
3056 | e6e5906b | pbrook | int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
3057 | e6e5906b | pbrook | int flags)
|
3058 | e6e5906b | pbrook | { |
3059 | e6e5906b | pbrook | int i;
|
3060 | e6e5906b | pbrook | uint16_t sr; |
3061 | e6e5906b | pbrook | CPU_DoubleU u; |
3062 | e6e5906b | pbrook | for (i = 0; i < 8; i++) |
3063 | e6e5906b | pbrook | { |
3064 | e6e5906b | pbrook | u.d = env->fregs[i]; |
3065 | e6e5906b | pbrook | cpu_fprintf (f, "D%d = %08x A%d = %08x F%d = %08x%08x (%12g)\n",
|
3066 | e6e5906b | pbrook | i, env->dregs[i], i, env->aregs[i], |
3067 | 8fc7cc58 | pbrook | i, u.l.upper, u.l.lower, *(double *)&u.d);
|
3068 | e6e5906b | pbrook | } |
3069 | e6e5906b | pbrook | cpu_fprintf (f, "PC = %08x ", env->pc);
|
3070 | e6e5906b | pbrook | sr = env->sr; |
3071 | e6e5906b | pbrook | cpu_fprintf (f, "SR = %04x %c%c%c%c%c ", sr, (sr & 0x10) ? 'X' : '-', |
3072 | e6e5906b | pbrook | (sr & CCF_N) ? 'N' : '-', (sr & CCF_Z) ? 'Z' : '-', |
3073 | e6e5906b | pbrook | (sr & CCF_V) ? 'V' : '-', (sr & CCF_C) ? 'C' : '-'); |
3074 | 8fc7cc58 | pbrook | cpu_fprintf (f, "FPRESULT = %12g\n", *(double *)&env->fp_result); |
3075 | e6e5906b | pbrook | } |
3076 | e6e5906b | pbrook | |
3077 | d2856f1a | aurel32 | void gen_pc_load(CPUState *env, TranslationBlock *tb,
|
3078 | d2856f1a | aurel32 | unsigned long searched_pc, int pc_pos, void *puc) |
3079 | d2856f1a | aurel32 | { |
3080 | d2856f1a | aurel32 | env->pc = gen_opc_pc[pc_pos]; |
3081 | d2856f1a | aurel32 | } |