root / target-arm / op_helper.c @ 551bd27f
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/*
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* ARM helper routines
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*
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* Copyright (c) 2005-2007 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#include "helpers.h" |
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#define SIGNBIT (uint32_t)0x80000000 |
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#define SIGNBIT64 ((uint64_t)1 << 63) |
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void raise_exception(int tt) |
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{ |
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env->exception_index = tt; |
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cpu_loop_exit(); |
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} |
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/* thread support */
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spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED; |
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void cpu_lock(void) |
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{ |
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spin_lock(&global_cpu_lock); |
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} |
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void cpu_unlock(void) |
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{ |
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spin_unlock(&global_cpu_lock); |
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} |
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uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, |
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uint32_t rn, uint32_t maxindex) |
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{ |
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uint32_t val; |
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uint32_t tmp; |
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int index;
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int shift;
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uint64_t *table; |
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table = (uint64_t *)&env->vfp.regs[rn]; |
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val = 0;
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for (shift = 0; shift < 32; shift += 8) { |
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index = (ireg >> shift) & 0xff;
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if (index < maxindex) {
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tmp = (table[index >> 3] >> (index & 7)) & 0xff; |
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val |= tmp << shift; |
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} else {
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val |= def & (0xff << shift);
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} |
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} |
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return val;
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} |
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#if !defined(CONFIG_USER_ONLY)
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#define MMUSUFFIX _mmu
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#define SHIFT 0 |
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#include "softmmu_template.h" |
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#define SHIFT 1 |
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#include "softmmu_template.h" |
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#define SHIFT 2 |
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#include "softmmu_template.h" |
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#define SHIFT 3 |
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#include "softmmu_template.h" |
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
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{ |
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TranslationBlock *tb; |
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CPUState *saved_env; |
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unsigned long pc; |
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int ret;
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/* XXX: hack to restore env in all cases, even if not called from
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generated code */
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saved_env = env; |
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env = cpu_single_env; |
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ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (unsigned long)retaddr; |
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tb = tb_find_pc(pc); |
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if (tb) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, pc, NULL);
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} |
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} |
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raise_exception(env->exception_index); |
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} |
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env = saved_env; |
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} |
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#endif
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/* FIXME: Pass an axplicit pointer to QF to CPUState, and move saturating
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instructions into helper.c */
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uint32_t HELPER(add_setq)(uint32_t a, uint32_t b) |
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{ |
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uint32_t res = a + b; |
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if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
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env->QF = 1;
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return res;
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} |
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uint32_t HELPER(add_saturate)(uint32_t a, uint32_t b) |
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{ |
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uint32_t res = a + b; |
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if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
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env->QF = 1;
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res = ~(((int32_t)a >> 31) ^ SIGNBIT);
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} |
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return res;
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} |
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uint32_t HELPER(sub_saturate)(uint32_t a, uint32_t b) |
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{ |
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uint32_t res = a - b; |
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if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
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env->QF = 1;
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res = ~(((int32_t)a >> 31) ^ SIGNBIT);
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} |
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return res;
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} |
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uint32_t HELPER(double_saturate)(int32_t val) |
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{ |
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uint32_t res; |
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if (val >= 0x40000000) { |
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res = ~SIGNBIT; |
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env->QF = 1;
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} else if (val <= (int32_t)0xc0000000) { |
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res = SIGNBIT; |
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env->QF = 1;
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} else {
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res = val << 1;
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} |
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return res;
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} |
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uint32_t HELPER(add_usaturate)(uint32_t a, uint32_t b) |
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{ |
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uint32_t res = a + b; |
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if (res < a) {
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env->QF = 1;
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res = ~0;
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} |
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return res;
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} |
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uint32_t HELPER(sub_usaturate)(uint32_t a, uint32_t b) |
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{ |
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uint32_t res = a - b; |
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if (res > a) {
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env->QF = 1;
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res = 0;
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} |
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return res;
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} |
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/* Signed saturation. */
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static inline uint32_t do_ssat(int32_t val, int shift) |
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{ |
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int32_t top; |
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uint32_t mask; |
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shift = PARAM1; |
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top = val >> shift; |
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mask = (1u << shift) - 1; |
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if (top > 0) { |
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env->QF = 1;
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return mask;
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} else if (top < -1) { |
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env->QF = 1;
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return ~mask;
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} |
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return val;
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} |
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/* Unsigned saturation. */
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static inline uint32_t do_usat(int32_t val, int shift) |
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{ |
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uint32_t max; |
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shift = PARAM1; |
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max = (1u << shift) - 1; |
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if (val < 0) { |
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env->QF = 1;
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return 0; |
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} else if (val > max) { |
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env->QF = 1;
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return max;
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} |
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return val;
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} |
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/* Signed saturate. */
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uint32_t HELPER(ssat)(uint32_t x, uint32_t shift) |
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{ |
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return do_ssat(x, shift);
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} |
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/* Dual halfword signed saturate. */
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uint32_t HELPER(ssat16)(uint32_t x, uint32_t shift) |
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{ |
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uint32_t res; |
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res = (uint16_t)do_ssat((int16_t)x, shift); |
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res |= do_ssat(((int32_t)x) >> 16, shift) << 16; |
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return res;
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} |
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/* Unsigned saturate. */
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uint32_t HELPER(usat)(uint32_t x, uint32_t shift) |
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{ |
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return do_usat(x, shift);
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} |
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/* Dual halfword unsigned saturate. */
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uint32_t HELPER(usat16)(uint32_t x, uint32_t shift) |
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{ |
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uint32_t res; |
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res = (uint16_t)do_usat((int16_t)x, shift); |
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res |= do_usat(((int32_t)x) >> 16, shift) << 16; |
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return res;
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} |
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void HELPER(wfi)(void) |
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{ |
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env->exception_index = EXCP_HLT; |
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env->halted = 1;
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cpu_loop_exit(); |
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} |
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void HELPER(exception)(uint32_t excp)
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{ |
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env->exception_index = excp; |
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cpu_loop_exit(); |
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} |
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uint32_t HELPER(cpsr_read)(void)
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{ |
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return cpsr_read(env) & ~CPSR_EXEC;
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} |
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void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
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{ |
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cpsr_write(env, val, mask); |
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} |
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/* Access to user mode registers from privileged modes. */
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uint32_t HELPER(get_user_reg)(uint32_t regno) |
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{ |
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uint32_t val; |
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if (regno == 13) { |
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val = env->banked_r13[0];
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} else if (regno == 14) { |
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val = env->banked_r14[0];
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} else if (regno >= 8 |
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&& (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
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val = env->usr_regs[regno - 8];
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} else {
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val = env->regs[regno]; |
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} |
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return val;
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} |
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void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
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{ |
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if (regno == 13) { |
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env->banked_r13[0] = val;
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} else if (regno == 14) { |
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env->banked_r14[0] = val;
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} else if (regno >= 8 |
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&& (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
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env->usr_regs[regno - 8] = val;
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} else {
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env->regs[regno] = val; |
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} |
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} |
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/* ??? Flag setting arithmetic is awkward because we need to do comparisons.
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The only way to do that in TCG is a conditional branch, which clobbers
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all our temporaries. For now implement these as helper functions. */
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uint32_t HELPER (add_cc)(uint32_t a, uint32_t b) |
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{ |
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uint32_t result; |
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result = T0 + T1; |
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env->NF = env->ZF = result; |
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env->CF = result < a; |
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env->VF = (a ^ b ^ -1) & (a ^ result);
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return result;
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} |
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uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b) |
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{ |
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uint32_t result; |
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if (!env->CF) {
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result = a + b; |
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env->CF = result < a; |
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} else {
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result = a + b + 1;
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env->CF = result <= a; |
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} |
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env->VF = (a ^ b ^ -1) & (a ^ result);
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env->NF = env->ZF = result; |
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return result;
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} |
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uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b) |
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{ |
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uint32_t result; |
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result = a - b; |
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env->NF = env->ZF = result; |
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env->CF = a >= b; |
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env->VF = (a ^ b) & (a ^ result); |
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return result;
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} |
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uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b) |
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{ |
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uint32_t result; |
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if (!env->CF) {
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result = a - b - 1;
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env->CF = a > b; |
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} else {
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result = a - b; |
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env->CF = a >= b; |
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} |
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env->VF = (a ^ b) & (a ^ result); |
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env->NF = env->ZF = result; |
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return result;
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} |
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/* Similarly for variable shift instructions. */
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uint32_t HELPER(shl)(uint32_t x, uint32_t i) |
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{ |
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int shift = i & 0xff; |
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if (shift >= 32) |
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return 0; |
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return x << shift;
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} |
368 |
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uint32_t HELPER(shr)(uint32_t x, uint32_t i) |
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{ |
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int shift = i & 0xff; |
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if (shift >= 32) |
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return 0; |
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return (uint32_t)x >> shift;
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} |
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uint32_t HELPER(sar)(uint32_t x, uint32_t i) |
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{ |
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int shift = i & 0xff; |
380 |
if (shift >= 32) |
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shift = 31;
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return (int32_t)x >> shift;
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} |
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|
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uint32_t HELPER(ror)(uint32_t x, uint32_t i) |
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{ |
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int shift = i & 0xff; |
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if (shift == 0) |
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return x;
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return (x >> shift) | (x << (32 - shift)); |
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} |
392 |
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uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i) |
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{ |
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int shift = i & 0xff; |
396 |
if (shift >= 32) { |
397 |
if (shift == 32) |
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env->CF = x & 1;
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else
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env->CF = 0;
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return 0; |
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} else if (shift != 0) { |
403 |
env->CF = (x >> (32 - shift)) & 1; |
404 |
return x << shift;
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} |
406 |
return x;
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} |
408 |
|
409 |
uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i) |
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{ |
411 |
int shift = i & 0xff; |
412 |
if (shift >= 32) { |
413 |
if (shift == 32) |
414 |
env->CF = (x >> 31) & 1; |
415 |
else
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env->CF = 0;
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return 0; |
418 |
} else if (shift != 0) { |
419 |
env->CF = (x >> (shift - 1)) & 1; |
420 |
return x >> shift;
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421 |
} |
422 |
return x;
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423 |
} |
424 |
|
425 |
uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i) |
426 |
{ |
427 |
int shift = i & 0xff; |
428 |
if (shift >= 32) { |
429 |
env->CF = (x >> 31) & 1; |
430 |
return (int32_t)x >> 31; |
431 |
} else if (shift != 0) { |
432 |
env->CF = (x >> (shift - 1)) & 1; |
433 |
return (int32_t)x >> shift;
|
434 |
} |
435 |
return x;
|
436 |
} |
437 |
|
438 |
uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i) |
439 |
{ |
440 |
int shift1, shift;
|
441 |
shift1 = i & 0xff;
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442 |
shift = shift1 & 0x1f;
|
443 |
if (shift == 0) { |
444 |
if (shift1 != 0) |
445 |
env->CF = (x >> 31) & 1; |
446 |
return x;
|
447 |
} else {
|
448 |
env->CF = (x >> (shift - 1)) & 1; |
449 |
return ((uint32_t)x >> shift) | (x << (32 - shift)); |
450 |
} |
451 |
} |
452 |
|
453 |
uint64_t HELPER(neon_add_saturate_s64)(uint64_t src1, uint64_t src2) |
454 |
{ |
455 |
uint64_t res; |
456 |
|
457 |
res = src1 + src2; |
458 |
if (((res ^ src1) & SIGNBIT64) && !((src1 ^ src2) & SIGNBIT64)) {
|
459 |
env->QF = 1;
|
460 |
res = ((int64_t)src1 >> 63) ^ ~SIGNBIT64;
|
461 |
} |
462 |
return res;
|
463 |
} |
464 |
|
465 |
uint64_t HELPER(neon_add_saturate_u64)(uint64_t src1, uint64_t src2) |
466 |
{ |
467 |
uint64_t res; |
468 |
|
469 |
res = src1 + src2; |
470 |
if (res < src1) {
|
471 |
env->QF = 1;
|
472 |
res = ~(uint64_t)0;
|
473 |
} |
474 |
return res;
|
475 |
} |
476 |
|
477 |
uint64_t HELPER(neon_sub_saturate_s64)(uint64_t src1, uint64_t src2) |
478 |
{ |
479 |
uint64_t res; |
480 |
|
481 |
res = src1 - src2; |
482 |
if (((res ^ src1) & SIGNBIT64) && ((src1 ^ src2) & SIGNBIT64)) {
|
483 |
env->QF = 1;
|
484 |
res = ((int64_t)src1 >> 63) ^ ~SIGNBIT64;
|
485 |
} |
486 |
return res;
|
487 |
} |
488 |
|
489 |
uint64_t HELPER(neon_sub_saturate_u64)(uint64_t src1, uint64_t src2) |
490 |
{ |
491 |
uint64_t res; |
492 |
|
493 |
if (src1 < src2) {
|
494 |
env->QF = 1;
|
495 |
res = 0;
|
496 |
} else {
|
497 |
res = src1 - src2; |
498 |
} |
499 |
return res;
|
500 |
} |
501 |
|
502 |
/* These need to return a pair of value, so still use T0/T1. */
|
503 |
/* Transpose. Argument order is rather strange to avoid special casing
|
504 |
the tranlation code.
|
505 |
On input T0 = rm, T1 = rd. On output T0 = rd, T1 = rm */
|
506 |
void HELPER(neon_trn_u8)(void) |
507 |
{ |
508 |
uint32_t rd; |
509 |
uint32_t rm; |
510 |
rd = ((T0 & 0x00ff00ff) << 8) | (T1 & 0x00ff00ff); |
511 |
rm = ((T1 & 0xff00ff00) >> 8) | (T0 & 0xff00ff00); |
512 |
T0 = rd; |
513 |
T1 = rm; |
514 |
FORCE_RET(); |
515 |
} |
516 |
|
517 |
void HELPER(neon_trn_u16)(void) |
518 |
{ |
519 |
uint32_t rd; |
520 |
uint32_t rm; |
521 |
rd = (T0 << 16) | (T1 & 0xffff); |
522 |
rm = (T1 >> 16) | (T0 & 0xffff0000); |
523 |
T0 = rd; |
524 |
T1 = rm; |
525 |
FORCE_RET(); |
526 |
} |
527 |
|
528 |
/* Worker routines for zip and unzip. */
|
529 |
void HELPER(neon_unzip_u8)(void) |
530 |
{ |
531 |
uint32_t rd; |
532 |
uint32_t rm; |
533 |
rd = (T0 & 0xff) | ((T0 >> 8) & 0xff00) |
534 |
| ((T1 << 16) & 0xff0000) | ((T1 << 8) & 0xff000000); |
535 |
rm = ((T0 >> 8) & 0xff) | ((T0 >> 16) & 0xff00) |
536 |
| ((T1 << 8) & 0xff0000) | (T1 & 0xff000000); |
537 |
T0 = rd; |
538 |
T1 = rm; |
539 |
FORCE_RET(); |
540 |
} |
541 |
|
542 |
void HELPER(neon_zip_u8)(void) |
543 |
{ |
544 |
uint32_t rd; |
545 |
uint32_t rm; |
546 |
rd = (T0 & 0xff) | ((T1 << 8) & 0xff00) |
547 |
| ((T0 << 16) & 0xff0000) | ((T1 << 24) & 0xff000000); |
548 |
rm = ((T0 >> 16) & 0xff) | ((T1 >> 8) & 0xff00) |
549 |
| ((T0 >> 8) & 0xff0000) | (T1 & 0xff000000); |
550 |
T0 = rd; |
551 |
T1 = rm; |
552 |
FORCE_RET(); |
553 |
} |
554 |
|
555 |
void HELPER(neon_zip_u16)(void) |
556 |
{ |
557 |
uint32_t tmp; |
558 |
|
559 |
tmp = (T0 & 0xffff) | (T1 << 16); |
560 |
T1 = (T1 & 0xffff0000) | (T0 >> 16); |
561 |
T0 = tmp; |
562 |
FORCE_RET(); |
563 |
} |