Revision 57c6db2e

b/hw/msix.c
158 158
{
159 159
    unsigned enable_pos = dev->msix_cap + MSIX_CONTROL_OFFSET;
160 160
    int vector;
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    int i;
161 162

  
162 163
    if (!range_covers_byte(addr, len, enable_pos)) {
163 164
        return;
......
167 168
        return;
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    }
169 170

  
170
    qemu_set_irq(dev->irq[0], 0);
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    for (i = 0; i < PCI_NUM_PINS; ++i) {
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        qemu_set_irq(dev->irq[i], 0);
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    }
171 174

  
172 175
    if (msix_function_masked(dev)) {
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        return;

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