Revision 583d1215 tcg/sparc/tcg-target.c

b/tcg/sparc/tcg-target.c
243 243
#define SHIFT_SRAX (INSN_OP(2) | INSN_OP3(0x27) | (1 << 12))
244 244

  
245 245
#define RDY        (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(0))
246
#define WRY        (INSN_OP(2) | INSN_OP3(0x30))
246
#define WRY        (INSN_OP(2) | INSN_OP3(0x30) | INSN_RD(0))
247 247
#define JMPL       (INSN_OP(2) | INSN_OP3(0x38))
248 248
#define SAVE       (INSN_OP(2) | INSN_OP3(0x3c))
249 249
#define RESTORE    (INSN_OP(2) | INSN_OP3(0x3d))
......
407 407
        tcg_out_ldst(s, arg, arg1, arg2, STX);
408 408
}
409 409

  
410
static inline void tcg_out_sety(TCGContext *s, tcg_target_long val)
410
static inline void tcg_out_sety(TCGContext *s, int rs)
411 411
{
412
    if (val == 0 || val == -1)
413
        tcg_out32(s, WRY | INSN_IMM13(val));
414
    else
415
        fprintf(stderr, "unimplemented sety %ld\n", (long)val);
412
    tcg_out32(s, WRY | INSN_RS1(TCG_REG_G0) | INSN_RS2(rs));
416 413
}
417 414

  
418 415
static inline void tcg_out_rdy(TCGContext *s, int rd)
......
444 441
    }
445 442
}
446 443

  
444
static void tcg_out_div32(TCGContext *s, int rd, int rs1,
445
                          int val2, int val2const, int uns)
446
{
447
    /* Load Y with the sign/zero extension of RS1 to 64-bits.  */
448
    if (uns) {
449
        tcg_out_sety(s, TCG_REG_G0);
450
    } else {
451
        tcg_out_arithi(s, TCG_REG_I5, rs1, 31, SHIFT_SRA);
452
        tcg_out_sety(s, TCG_REG_I5);
453
    }
454

  
455
    tcg_out_arithc(s, rd, rs1, val2, val2const,
456
                   uns ? ARITH_UDIV : ARITH_SDIV);
457
}
458

  
447 459
static inline void tcg_out_nop(TCGContext *s)
448 460
{
449 461
    tcg_out_sethi(s, TCG_REG_G0, 0);
......
1113 1125
    case INDEX_op_mul_i32:
1114 1126
        c = ARITH_UMUL;
1115 1127
        goto gen_arith;
1116
    case INDEX_op_div2_i32:
1117
#if defined(__sparc_v9__) || defined(__sparc_v8plus__)
1118
        c = ARITH_SDIVX;
1119
        goto gen_arith;
1120
#else
1121
        tcg_out_sety(s, 0);
1122
        c = ARITH_SDIV;
1123
        goto gen_arith;
1124
#endif
1125
    case INDEX_op_divu2_i32:
1126
#if defined(__sparc_v9__) || defined(__sparc_v8plus__)
1127
        c = ARITH_UDIVX;
1128
        goto gen_arith;
1129
#else
1130
        tcg_out_sety(s, 0);
1131
        c = ARITH_UDIV;
1132
        goto gen_arith;
1133
#endif
1128

  
1129
    case INDEX_op_div_i32:
1130
        tcg_out_div32(s, args[0], args[1], args[2], const_args[2], 0);
1131
        break;
1132
    case INDEX_op_divu_i32:
1133
        tcg_out_div32(s, args[0], args[1], args[2], const_args[2], 1);
1134
        break;
1135

  
1136
    case INDEX_op_rem_i32:
1137
    case INDEX_op_remu_i32:
1138
        tcg_out_div32(s, TCG_REG_I5, args[1], args[2], const_args[2],
1139
                      opc == INDEX_op_remu_i32);
1140
        tcg_out_arithc(s, TCG_REG_I5, TCG_REG_I5, args[2], const_args[2],
1141
                       ARITH_UMUL);
1142
        tcg_out_arith(s, args[0], args[1], TCG_REG_I5, ARITH_SUB);
1143
        break;
1134 1144

  
1135 1145
    case INDEX_op_brcond_i32:
1136 1146
        tcg_out_brcond_i32(s, args[2], args[0], args[1], const_args[1],
......
1214 1224
    case INDEX_op_mul_i64:
1215 1225
        c = ARITH_MULX;
1216 1226
        goto gen_arith;
1217
    case INDEX_op_div2_i64:
1227
    case INDEX_op_div_i64:
1218 1228
        c = ARITH_SDIVX;
1219 1229
        goto gen_arith;
1220
    case INDEX_op_divu2_i64:
1230
    case INDEX_op_divu_i64:
1221 1231
        c = ARITH_UDIVX;
1222 1232
        goto gen_arith;
1233
    case INDEX_op_rem_i64:
1234
    case INDEX_op_remu_i64:
1235
        tcg_out_arithc(s, TCG_REG_I5, args[1], args[2], const_args[2],
1236
                       opc == INDEX_op_rem_i64 ? ARITH_SDIVX : ARITH_UDIVX);
1237
        tcg_out_arithc(s, TCG_REG_I5, TCG_REG_I5, args[2], const_args[2],
1238
                       ARITH_MULX);
1239
        tcg_out_arith(s, args[0], args[1], TCG_REG_I5, ARITH_SUB);
1240
        break;
1223 1241

  
1224 1242
    case INDEX_op_brcond_i64:
1225 1243
        tcg_out_brcond_i64(s, args[2], args[0], args[1], const_args[1],
......
1263 1281

  
1264 1282
    { INDEX_op_add_i32, { "r", "r", "rJ" } },
1265 1283
    { INDEX_op_mul_i32, { "r", "r", "rJ" } },
1266
    { INDEX_op_div2_i32, { "r", "r", "0", "1", "r" } },
1267
    { INDEX_op_divu2_i32, { "r", "r", "0", "1", "r" } },
1284
    { INDEX_op_div_i32, { "r", "r", "rJ" } },
1285
    { INDEX_op_divu_i32, { "r", "r", "rJ" } },
1286
    { INDEX_op_rem_i32, { "r", "r", "rJ" } },
1287
    { INDEX_op_remu_i32, { "r", "r", "rJ" } },
1268 1288
    { INDEX_op_sub_i32, { "r", "r", "rJ" } },
1269 1289
    { INDEX_op_and_i32, { "r", "r", "rJ" } },
1270 1290
    { INDEX_op_or_i32, { "r", "r", "rJ" } },
......
1312 1332

  
1313 1333
    { INDEX_op_add_i64, { "r", "r", "rJ" } },
1314 1334
    { INDEX_op_mul_i64, { "r", "r", "rJ" } },
1315
    { INDEX_op_div2_i64, { "r", "r", "0", "1", "r" } },
1316
    { INDEX_op_divu2_i64, { "r", "r", "0", "1", "r" } },
1335
    { INDEX_op_div_i64, { "r", "r", "rJ" } },
1336
    { INDEX_op_divu_i64, { "r", "r", "rJ" } },
1337
    { INDEX_op_rem_i64, { "r", "r", "rJ" } },
1338
    { INDEX_op_remu_i64, { "r", "r", "rJ" } },
1317 1339
    { INDEX_op_sub_i64, { "r", "r", "rJ" } },
1318 1340
    { INDEX_op_and_i64, { "r", "r", "rJ" } },
1319 1341
    { INDEX_op_or_i64, { "r", "r", "rJ" } },

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