Revision 5a4348d1 hw/arm/virt.c
| b/hw/arm/virt.c | ||
|---|---|---|
| 156 | 156 |
vbi->fdt = fdt; |
| 157 | 157 |
|
| 158 | 158 |
/* Header */ |
| 159 |
qemu_devtree_setprop_string(fdt, "/", "compatible", "linux,dummy-virt");
|
|
| 160 |
qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 0x2);
|
|
| 161 |
qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 0x2);
|
|
| 159 |
qemu_fdt_setprop_string(fdt, "/", "compatible", "linux,dummy-virt");
|
|
| 160 |
qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2);
|
|
| 161 |
qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2);
|
|
| 162 | 162 |
|
| 163 | 163 |
/* |
| 164 | 164 |
* /chosen and /memory nodes must exist for load_dtb |
| 165 | 165 |
* to fill in necessary properties later |
| 166 | 166 |
*/ |
| 167 |
qemu_devtree_add_subnode(fdt, "/chosen");
|
|
| 168 |
qemu_devtree_add_subnode(fdt, "/memory");
|
|
| 169 |
qemu_devtree_setprop_string(fdt, "/memory", "device_type", "memory");
|
|
| 167 |
qemu_fdt_add_subnode(fdt, "/chosen");
|
|
| 168 |
qemu_fdt_add_subnode(fdt, "/memory");
|
|
| 169 |
qemu_fdt_setprop_string(fdt, "/memory", "device_type", "memory");
|
|
| 170 | 170 |
|
| 171 | 171 |
/* Clock node, for the benefit of the UART. The kernel device tree |
| 172 | 172 |
* binding documentation claims the PL011 node clock properties are |
| 173 | 173 |
* optional but in practice if you omit them the kernel refuses to |
| 174 | 174 |
* probe for the device. |
| 175 | 175 |
*/ |
| 176 |
vbi->clock_phandle = qemu_devtree_alloc_phandle(fdt);
|
|
| 177 |
qemu_devtree_add_subnode(fdt, "/apb-pclk");
|
|
| 178 |
qemu_devtree_setprop_string(fdt, "/apb-pclk", "compatible", "fixed-clock");
|
|
| 179 |
qemu_devtree_setprop_cell(fdt, "/apb-pclk", "#clock-cells", 0x0);
|
|
| 180 |
qemu_devtree_setprop_cell(fdt, "/apb-pclk", "clock-frequency", 24000000);
|
|
| 181 |
qemu_devtree_setprop_string(fdt, "/apb-pclk", "clock-output-names",
|
|
| 176 |
vbi->clock_phandle = qemu_fdt_alloc_phandle(fdt);
|
|
| 177 |
qemu_fdt_add_subnode(fdt, "/apb-pclk");
|
|
| 178 |
qemu_fdt_setprop_string(fdt, "/apb-pclk", "compatible", "fixed-clock");
|
|
| 179 |
qemu_fdt_setprop_cell(fdt, "/apb-pclk", "#clock-cells", 0x0);
|
|
| 180 |
qemu_fdt_setprop_cell(fdt, "/apb-pclk", "clock-frequency", 24000000);
|
|
| 181 |
qemu_fdt_setprop_string(fdt, "/apb-pclk", "clock-output-names",
|
|
| 182 | 182 |
"clk24mhz"); |
| 183 |
qemu_devtree_setprop_cell(fdt, "/apb-pclk", "phandle", vbi->clock_phandle);
|
|
| 183 |
qemu_fdt_setprop_cell(fdt, "/apb-pclk", "phandle", vbi->clock_phandle);
|
|
| 184 | 184 |
|
| 185 | 185 |
/* No PSCI for TCG yet */ |
| 186 | 186 |
if (kvm_enabled()) {
|
| 187 |
qemu_devtree_add_subnode(fdt, "/psci");
|
|
| 188 |
qemu_devtree_setprop_string(fdt, "/psci", "compatible", "arm,psci");
|
|
| 189 |
qemu_devtree_setprop_string(fdt, "/psci", "method", "hvc");
|
|
| 190 |
qemu_devtree_setprop_cell(fdt, "/psci", "cpu_suspend",
|
|
| 187 |
qemu_fdt_add_subnode(fdt, "/psci");
|
|
| 188 |
qemu_fdt_setprop_string(fdt, "/psci", "compatible", "arm,psci");
|
|
| 189 |
qemu_fdt_setprop_string(fdt, "/psci", "method", "hvc");
|
|
| 190 |
qemu_fdt_setprop_cell(fdt, "/psci", "cpu_suspend",
|
|
| 191 | 191 |
PSCI_FN_CPU_SUSPEND); |
| 192 |
qemu_devtree_setprop_cell(fdt, "/psci", "cpu_off", PSCI_FN_CPU_OFF);
|
|
| 193 |
qemu_devtree_setprop_cell(fdt, "/psci", "cpu_on", PSCI_FN_CPU_ON);
|
|
| 194 |
qemu_devtree_setprop_cell(fdt, "/psci", "migrate", PSCI_FN_MIGRATE);
|
|
| 192 |
qemu_fdt_setprop_cell(fdt, "/psci", "cpu_off", PSCI_FN_CPU_OFF);
|
|
| 193 |
qemu_fdt_setprop_cell(fdt, "/psci", "cpu_on", PSCI_FN_CPU_ON);
|
|
| 194 |
qemu_fdt_setprop_cell(fdt, "/psci", "migrate", PSCI_FN_MIGRATE);
|
|
| 195 | 195 |
} |
| 196 | 196 |
} |
| 197 | 197 |
|
| ... | ... | |
| 206 | 206 |
irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, |
| 207 | 207 |
GIC_FDT_IRQ_PPI_CPU_WIDTH, (1 << vbi->smp_cpus) - 1); |
| 208 | 208 |
|
| 209 |
qemu_devtree_add_subnode(vbi->fdt, "/timer");
|
|
| 210 |
qemu_devtree_setprop_string(vbi->fdt, "/timer",
|
|
| 209 |
qemu_fdt_add_subnode(vbi->fdt, "/timer");
|
|
| 210 |
qemu_fdt_setprop_string(vbi->fdt, "/timer",
|
|
| 211 | 211 |
"compatible", "arm,armv7-timer"); |
| 212 |
qemu_devtree_setprop_cells(vbi->fdt, "/timer", "interrupts",
|
|
| 212 |
qemu_fdt_setprop_cells(vbi->fdt, "/timer", "interrupts",
|
|
| 213 | 213 |
GIC_FDT_IRQ_TYPE_PPI, 13, irqflags, |
| 214 | 214 |
GIC_FDT_IRQ_TYPE_PPI, 14, irqflags, |
| 215 | 215 |
GIC_FDT_IRQ_TYPE_PPI, 11, irqflags, |
| ... | ... | |
| 220 | 220 |
{
|
| 221 | 221 |
int cpu; |
| 222 | 222 |
|
| 223 |
qemu_devtree_add_subnode(vbi->fdt, "/cpus");
|
|
| 224 |
qemu_devtree_setprop_cell(vbi->fdt, "/cpus", "#address-cells", 0x1);
|
|
| 225 |
qemu_devtree_setprop_cell(vbi->fdt, "/cpus", "#size-cells", 0x0);
|
|
| 223 |
qemu_fdt_add_subnode(vbi->fdt, "/cpus");
|
|
| 224 |
qemu_fdt_setprop_cell(vbi->fdt, "/cpus", "#address-cells", 0x1);
|
|
| 225 |
qemu_fdt_setprop_cell(vbi->fdt, "/cpus", "#size-cells", 0x0);
|
|
| 226 | 226 |
|
| 227 | 227 |
for (cpu = vbi->smp_cpus - 1; cpu >= 0; cpu--) {
|
| 228 | 228 |
char *nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
|
| 229 | 229 |
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); |
| 230 | 230 |
|
| 231 |
qemu_devtree_add_subnode(vbi->fdt, nodename);
|
|
| 232 |
qemu_devtree_setprop_string(vbi->fdt, nodename, "device_type", "cpu");
|
|
| 233 |
qemu_devtree_setprop_string(vbi->fdt, nodename, "compatible",
|
|
| 231 |
qemu_fdt_add_subnode(vbi->fdt, nodename);
|
|
| 232 |
qemu_fdt_setprop_string(vbi->fdt, nodename, "device_type", "cpu");
|
|
| 233 |
qemu_fdt_setprop_string(vbi->fdt, nodename, "compatible",
|
|
| 234 | 234 |
armcpu->dtb_compatible); |
| 235 | 235 |
|
| 236 | 236 |
if (vbi->smp_cpus > 1) {
|
| 237 |
qemu_devtree_setprop_string(vbi->fdt, nodename,
|
|
| 237 |
qemu_fdt_setprop_string(vbi->fdt, nodename,
|
|
| 238 | 238 |
"enable-method", "psci"); |
| 239 | 239 |
} |
| 240 | 240 |
|
| 241 |
qemu_devtree_setprop_cell(vbi->fdt, nodename, "reg", cpu);
|
|
| 241 |
qemu_fdt_setprop_cell(vbi->fdt, nodename, "reg", cpu);
|
|
| 242 | 242 |
g_free(nodename); |
| 243 | 243 |
} |
| 244 | 244 |
} |
| ... | ... | |
| 247 | 247 |
{
|
| 248 | 248 |
uint32_t gic_phandle; |
| 249 | 249 |
|
| 250 |
gic_phandle = qemu_devtree_alloc_phandle(vbi->fdt);
|
|
| 251 |
qemu_devtree_setprop_cell(vbi->fdt, "/", "interrupt-parent", gic_phandle);
|
|
| 250 |
gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt);
|
|
| 251 |
qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", gic_phandle);
|
|
| 252 | 252 |
|
| 253 |
qemu_devtree_add_subnode(vbi->fdt, "/intc");
|
|
| 254 |
qemu_devtree_setprop_string(vbi->fdt, "/intc", "compatible",
|
|
| 253 |
qemu_fdt_add_subnode(vbi->fdt, "/intc");
|
|
| 254 |
qemu_fdt_setprop_string(vbi->fdt, "/intc", "compatible",
|
|
| 255 | 255 |
vbi->gic_compatible); |
| 256 |
qemu_devtree_setprop_cell(vbi->fdt, "/intc", "#interrupt-cells", 3);
|
|
| 257 |
qemu_devtree_setprop(vbi->fdt, "/intc", "interrupt-controller", NULL, 0);
|
|
| 258 |
qemu_devtree_setprop_sized_cells(vbi->fdt, "/intc", "reg",
|
|
| 256 |
qemu_fdt_setprop_cell(vbi->fdt, "/intc", "#interrupt-cells", 3);
|
|
| 257 |
qemu_fdt_setprop(vbi->fdt, "/intc", "interrupt-controller", NULL, 0);
|
|
| 258 |
qemu_fdt_setprop_sized_cells(vbi->fdt, "/intc", "reg",
|
|
| 259 | 259 |
2, vbi->memmap[VIRT_GIC_DIST].base, |
| 260 | 260 |
2, vbi->memmap[VIRT_GIC_DIST].size, |
| 261 | 261 |
2, vbi->memmap[VIRT_GIC_CPU].base, |
| 262 | 262 |
2, vbi->memmap[VIRT_GIC_CPU].size); |
| 263 |
qemu_devtree_setprop_cell(vbi->fdt, "/intc", "phandle", gic_phandle);
|
|
| 263 |
qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", gic_phandle);
|
|
| 264 | 264 |
} |
| 265 | 265 |
|
| 266 | 266 |
static void create_uart(const VirtBoardInfo *vbi, qemu_irq *pic) |
| ... | ... | |
| 275 | 275 |
sysbus_create_simple("pl011", base, pic[irq]);
|
| 276 | 276 |
|
| 277 | 277 |
nodename = g_strdup_printf("/pl011@%" PRIx64, base);
|
| 278 |
qemu_devtree_add_subnode(vbi->fdt, nodename);
|
|
| 278 |
qemu_fdt_add_subnode(vbi->fdt, nodename);
|
|
| 279 | 279 |
/* Note that we can't use setprop_string because of the embedded NUL */ |
| 280 |
qemu_devtree_setprop(vbi->fdt, nodename, "compatible",
|
|
| 280 |
qemu_fdt_setprop(vbi->fdt, nodename, "compatible",
|
|
| 281 | 281 |
compat, sizeof(compat)); |
| 282 |
qemu_devtree_setprop_sized_cells(vbi->fdt, nodename, "reg",
|
|
| 282 |
qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
|
|
| 283 | 283 |
2, base, 2, size); |
| 284 |
qemu_devtree_setprop_cells(vbi->fdt, nodename, "interrupts",
|
|
| 284 |
qemu_fdt_setprop_cells(vbi->fdt, nodename, "interrupts",
|
|
| 285 | 285 |
GIC_FDT_IRQ_TYPE_SPI, irq, |
| 286 | 286 |
GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); |
| 287 |
qemu_devtree_setprop_cells(vbi->fdt, nodename, "clocks",
|
|
| 287 |
qemu_fdt_setprop_cells(vbi->fdt, nodename, "clocks",
|
|
| 288 | 288 |
vbi->clock_phandle, vbi->clock_phandle); |
| 289 |
qemu_devtree_setprop(vbi->fdt, nodename, "clock-names",
|
|
| 289 |
qemu_fdt_setprop(vbi->fdt, nodename, "clock-names",
|
|
| 290 | 290 |
clocknames, sizeof(clocknames)); |
| 291 | 291 |
g_free(nodename); |
| 292 | 292 |
} |
| ... | ... | |
| 314 | 314 |
hwaddr base = vbi->memmap[VIRT_MMIO].base + i * size; |
| 315 | 315 |
|
| 316 | 316 |
nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
|
| 317 |
qemu_devtree_add_subnode(vbi->fdt, nodename);
|
|
| 318 |
qemu_devtree_setprop_string(vbi->fdt, nodename,
|
|
| 319 |
"compatible", "virtio,mmio");
|
|
| 320 |
qemu_devtree_setprop_sized_cells(vbi->fdt, nodename, "reg",
|
|
| 321 |
2, base, 2, size);
|
|
| 322 |
qemu_devtree_setprop_cells(vbi->fdt, nodename, "interrupts",
|
|
| 323 |
GIC_FDT_IRQ_TYPE_SPI, irq,
|
|
| 324 |
GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);
|
|
| 317 |
qemu_fdt_add_subnode(vbi->fdt, nodename);
|
|
| 318 |
qemu_fdt_setprop_string(vbi->fdt, nodename,
|
|
| 319 |
"compatible", "virtio,mmio"); |
|
| 320 |
qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
|
|
| 321 |
2, base, 2, size); |
|
| 322 |
qemu_fdt_setprop_cells(vbi->fdt, nodename, "interrupts",
|
|
| 323 |
GIC_FDT_IRQ_TYPE_SPI, irq, |
|
| 324 |
GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); |
|
| 325 | 325 |
g_free(nodename); |
| 326 | 326 |
} |
| 327 | 327 |
} |
Also available in: Unified diff