Revision 5a4348d1 hw/ppc/e500.c
| b/hw/ppc/e500.c | ||
|---|---|---|
| 108 | 108 |
char ser[128]; |
| 109 | 109 |
|
| 110 | 110 |
snprintf(ser, sizeof(ser), "%s/serial@%llx", soc, offset); |
| 111 |
qemu_devtree_add_subnode(fdt, ser);
|
|
| 112 |
qemu_devtree_setprop_string(fdt, ser, "device_type", "serial");
|
|
| 113 |
qemu_devtree_setprop_string(fdt, ser, "compatible", "ns16550");
|
|
| 114 |
qemu_devtree_setprop_cells(fdt, ser, "reg", offset, 0x100);
|
|
| 115 |
qemu_devtree_setprop_cell(fdt, ser, "cell-index", idx);
|
|
| 116 |
qemu_devtree_setprop_cell(fdt, ser, "clock-frequency", 0);
|
|
| 117 |
qemu_devtree_setprop_cells(fdt, ser, "interrupts", 42, 2);
|
|
| 118 |
qemu_devtree_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
|
|
| 119 |
qemu_devtree_setprop_string(fdt, "/aliases", alias, ser);
|
|
| 111 |
qemu_fdt_add_subnode(fdt, ser);
|
|
| 112 |
qemu_fdt_setprop_string(fdt, ser, "device_type", "serial");
|
|
| 113 |
qemu_fdt_setprop_string(fdt, ser, "compatible", "ns16550");
|
|
| 114 |
qemu_fdt_setprop_cells(fdt, ser, "reg", offset, 0x100);
|
|
| 115 |
qemu_fdt_setprop_cell(fdt, ser, "cell-index", idx);
|
|
| 116 |
qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", 0);
|
|
| 117 |
qemu_fdt_setprop_cells(fdt, ser, "interrupts", 42, 2);
|
|
| 118 |
qemu_fdt_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
|
|
| 119 |
qemu_fdt_setprop_string(fdt, "/aliases", alias, ser);
|
|
| 120 | 120 |
|
| 121 | 121 |
if (defcon) {
|
| 122 |
qemu_devtree_setprop_string(fdt, "/chosen", "linux,stdout-path", ser);
|
|
| 122 |
qemu_fdt_setprop_string(fdt, "/chosen", "linux,stdout-path", ser);
|
|
| 123 | 123 |
} |
| 124 | 124 |
} |
| 125 | 125 |
|
| ... | ... | |
| 183 | 183 |
} |
| 184 | 184 |
|
| 185 | 185 |
/* Manipulate device tree in memory. */ |
| 186 |
qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 2);
|
|
| 187 |
qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 2);
|
|
| 186 |
qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 2);
|
|
| 187 |
qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 2);
|
|
| 188 | 188 |
|
| 189 |
qemu_devtree_add_subnode(fdt, "/memory");
|
|
| 190 |
qemu_devtree_setprop_string(fdt, "/memory", "device_type", "memory");
|
|
| 191 |
qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
|
|
| 192 |
sizeof(mem_reg_property));
|
|
| 189 |
qemu_fdt_add_subnode(fdt, "/memory");
|
|
| 190 |
qemu_fdt_setprop_string(fdt, "/memory", "device_type", "memory");
|
|
| 191 |
qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property,
|
|
| 192 |
sizeof(mem_reg_property)); |
|
| 193 | 193 |
|
| 194 |
qemu_devtree_add_subnode(fdt, "/chosen");
|
|
| 194 |
qemu_fdt_add_subnode(fdt, "/chosen");
|
|
| 195 | 195 |
if (initrd_size) {
|
| 196 |
ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
|
|
| 197 |
initrd_base);
|
|
| 196 |
ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
|
|
| 197 |
initrd_base); |
|
| 198 | 198 |
if (ret < 0) {
|
| 199 | 199 |
fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n"); |
| 200 | 200 |
} |
| 201 | 201 |
|
| 202 |
ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
|
|
| 203 |
(initrd_base + initrd_size));
|
|
| 202 |
ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
|
|
| 203 |
(initrd_base + initrd_size)); |
|
| 204 | 204 |
if (ret < 0) {
|
| 205 | 205 |
fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n"); |
| 206 | 206 |
} |
| 207 | 207 |
} |
| 208 | 208 |
|
| 209 |
ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
|
|
| 209 |
ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
|
|
| 210 | 210 |
args->kernel_cmdline); |
| 211 | 211 |
if (ret < 0) |
| 212 | 212 |
fprintf(stderr, "couldn't set /chosen/bootargs\n"); |
| ... | ... | |
| 217 | 217 |
tb_freq = kvmppc_get_tbfreq(); |
| 218 | 218 |
|
| 219 | 219 |
/* indicate KVM hypercall interface */ |
| 220 |
qemu_devtree_add_subnode(fdt, "/hypervisor");
|
|
| 221 |
qemu_devtree_setprop_string(fdt, "/hypervisor", "compatible",
|
|
| 222 |
"linux,kvm");
|
|
| 220 |
qemu_fdt_add_subnode(fdt, "/hypervisor");
|
|
| 221 |
qemu_fdt_setprop_string(fdt, "/hypervisor", "compatible",
|
|
| 222 |
"linux,kvm"); |
|
| 223 | 223 |
kvmppc_get_hypercall(env, hypercall, sizeof(hypercall)); |
| 224 |
qemu_devtree_setprop(fdt, "/hypervisor", "hcall-instructions",
|
|
| 225 |
hypercall, sizeof(hypercall));
|
|
| 224 |
qemu_fdt_setprop(fdt, "/hypervisor", "hcall-instructions",
|
|
| 225 |
hypercall, sizeof(hypercall)); |
|
| 226 | 226 |
/* if KVM supports the idle hcall, set property indicating this */ |
| 227 | 227 |
if (kvmppc_get_hasidle(env)) {
|
| 228 |
qemu_devtree_setprop(fdt, "/hypervisor", "has-idle", NULL, 0);
|
|
| 228 |
qemu_fdt_setprop(fdt, "/hypervisor", "has-idle", NULL, 0);
|
|
| 229 | 229 |
} |
| 230 | 230 |
} |
| 231 | 231 |
|
| 232 | 232 |
/* Create CPU nodes */ |
| 233 |
qemu_devtree_add_subnode(fdt, "/cpus");
|
|
| 234 |
qemu_devtree_setprop_cell(fdt, "/cpus", "#address-cells", 1);
|
|
| 235 |
qemu_devtree_setprop_cell(fdt, "/cpus", "#size-cells", 0);
|
|
| 233 |
qemu_fdt_add_subnode(fdt, "/cpus");
|
|
| 234 |
qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 1);
|
|
| 235 |
qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0);
|
|
| 236 | 236 |
|
| 237 | 237 |
/* We need to generate the cpu nodes in reverse order, so Linux can pick |
| 238 | 238 |
the first node as boot node and be happy */ |
| ... | ... | |
| 249 | 249 |
|
| 250 | 250 |
snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", |
| 251 | 251 |
cpu->cpu_index); |
| 252 |
qemu_devtree_add_subnode(fdt, cpu_name);
|
|
| 253 |
qemu_devtree_setprop_cell(fdt, cpu_name, "clock-frequency", clock_freq);
|
|
| 254 |
qemu_devtree_setprop_cell(fdt, cpu_name, "timebase-frequency", tb_freq);
|
|
| 255 |
qemu_devtree_setprop_string(fdt, cpu_name, "device_type", "cpu");
|
|
| 256 |
qemu_devtree_setprop_cell(fdt, cpu_name, "reg", cpu->cpu_index);
|
|
| 257 |
qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-line-size",
|
|
| 258 |
env->dcache_line_size);
|
|
| 259 |
qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-line-size",
|
|
| 260 |
env->icache_line_size);
|
|
| 261 |
qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
|
|
| 262 |
qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
|
|
| 263 |
qemu_devtree_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
|
|
| 252 |
qemu_fdt_add_subnode(fdt, cpu_name);
|
|
| 253 |
qemu_fdt_setprop_cell(fdt, cpu_name, "clock-frequency", clock_freq);
|
|
| 254 |
qemu_fdt_setprop_cell(fdt, cpu_name, "timebase-frequency", tb_freq);
|
|
| 255 |
qemu_fdt_setprop_string(fdt, cpu_name, "device_type", "cpu");
|
|
| 256 |
qemu_fdt_setprop_cell(fdt, cpu_name, "reg", cpu->cpu_index);
|
|
| 257 |
qemu_fdt_setprop_cell(fdt, cpu_name, "d-cache-line-size",
|
|
| 258 |
env->dcache_line_size); |
|
| 259 |
qemu_fdt_setprop_cell(fdt, cpu_name, "i-cache-line-size",
|
|
| 260 |
env->icache_line_size); |
|
| 261 |
qemu_fdt_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
|
|
| 262 |
qemu_fdt_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
|
|
| 263 |
qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
|
|
| 264 | 264 |
if (cpu->cpu_index) {
|
| 265 |
qemu_devtree_setprop_string(fdt, cpu_name, "status", "disabled"); |
|
| 266 |
qemu_devtree_setprop_string(fdt, cpu_name, "enable-method", "spin-table"); |
|
| 267 |
qemu_devtree_setprop_u64(fdt, cpu_name, "cpu-release-addr", |
|
| 268 |
cpu_release_addr); |
|
| 265 |
qemu_fdt_setprop_string(fdt, cpu_name, "status", "disabled"); |
|
| 266 |
qemu_fdt_setprop_string(fdt, cpu_name, "enable-method", |
|
| 267 |
"spin-table"); |
|
| 268 |
qemu_fdt_setprop_u64(fdt, cpu_name, "cpu-release-addr", |
|
| 269 |
cpu_release_addr); |
|
| 269 | 270 |
} else {
|
| 270 |
qemu_devtree_setprop_string(fdt, cpu_name, "status", "okay");
|
|
| 271 |
qemu_fdt_setprop_string(fdt, cpu_name, "status", "okay");
|
|
| 271 | 272 |
} |
| 272 | 273 |
} |
| 273 | 274 |
|
| 274 |
qemu_devtree_add_subnode(fdt, "/aliases");
|
|
| 275 |
qemu_fdt_add_subnode(fdt, "/aliases");
|
|
| 275 | 276 |
/* XXX These should go into their respective devices' code */ |
| 276 | 277 |
snprintf(soc, sizeof(soc), "/soc@%llx", MPC8544_CCSRBAR_BASE); |
| 277 |
qemu_devtree_add_subnode(fdt, soc);
|
|
| 278 |
qemu_devtree_setprop_string(fdt, soc, "device_type", "soc");
|
|
| 279 |
qemu_devtree_setprop(fdt, soc, "compatible", compatible_sb,
|
|
| 280 |
sizeof(compatible_sb));
|
|
| 281 |
qemu_devtree_setprop_cell(fdt, soc, "#address-cells", 1);
|
|
| 282 |
qemu_devtree_setprop_cell(fdt, soc, "#size-cells", 1);
|
|
| 283 |
qemu_devtree_setprop_cells(fdt, soc, "ranges", 0x0,
|
|
| 284 |
MPC8544_CCSRBAR_BASE >> 32, MPC8544_CCSRBAR_BASE,
|
|
| 285 |
MPC8544_CCSRBAR_SIZE);
|
|
| 278 |
qemu_fdt_add_subnode(fdt, soc);
|
|
| 279 |
qemu_fdt_setprop_string(fdt, soc, "device_type", "soc");
|
|
| 280 |
qemu_fdt_setprop(fdt, soc, "compatible", compatible_sb,
|
|
| 281 |
sizeof(compatible_sb)); |
|
| 282 |
qemu_fdt_setprop_cell(fdt, soc, "#address-cells", 1);
|
|
| 283 |
qemu_fdt_setprop_cell(fdt, soc, "#size-cells", 1);
|
|
| 284 |
qemu_fdt_setprop_cells(fdt, soc, "ranges", 0x0,
|
|
| 285 |
MPC8544_CCSRBAR_BASE >> 32, MPC8544_CCSRBAR_BASE, |
|
| 286 |
MPC8544_CCSRBAR_SIZE); |
|
| 286 | 287 |
/* XXX should contain a reasonable value */ |
| 287 |
qemu_devtree_setprop_cell(fdt, soc, "bus-frequency", 0);
|
|
| 288 |
qemu_fdt_setprop_cell(fdt, soc, "bus-frequency", 0);
|
|
| 288 | 289 |
|
| 289 | 290 |
snprintf(mpic, sizeof(mpic), "%s/pic@%llx", soc, MPC8544_MPIC_REGS_OFFSET); |
| 290 |
qemu_devtree_add_subnode(fdt, mpic);
|
|
| 291 |
qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic");
|
|
| 292 |
qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic");
|
|
| 293 |
qemu_devtree_setprop_cells(fdt, mpic, "reg", MPC8544_MPIC_REGS_OFFSET,
|
|
| 294 |
0x40000);
|
|
| 295 |
qemu_devtree_setprop_cell(fdt, mpic, "#address-cells", 0);
|
|
| 296 |
qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 2);
|
|
| 297 |
mpic_ph = qemu_devtree_alloc_phandle(fdt);
|
|
| 298 |
qemu_devtree_setprop_cell(fdt, mpic, "phandle", mpic_ph);
|
|
| 299 |
qemu_devtree_setprop_cell(fdt, mpic, "linux,phandle", mpic_ph);
|
|
| 300 |
qemu_devtree_setprop(fdt, mpic, "interrupt-controller", NULL, 0);
|
|
| 291 |
qemu_fdt_add_subnode(fdt, mpic);
|
|
| 292 |
qemu_fdt_setprop_string(fdt, mpic, "device_type", "open-pic");
|
|
| 293 |
qemu_fdt_setprop_string(fdt, mpic, "compatible", "fsl,mpic");
|
|
| 294 |
qemu_fdt_setprop_cells(fdt, mpic, "reg", MPC8544_MPIC_REGS_OFFSET,
|
|
| 295 |
0x40000); |
|
| 296 |
qemu_fdt_setprop_cell(fdt, mpic, "#address-cells", 0);
|
|
| 297 |
qemu_fdt_setprop_cell(fdt, mpic, "#interrupt-cells", 2);
|
|
| 298 |
mpic_ph = qemu_fdt_alloc_phandle(fdt);
|
|
| 299 |
qemu_fdt_setprop_cell(fdt, mpic, "phandle", mpic_ph);
|
|
| 300 |
qemu_fdt_setprop_cell(fdt, mpic, "linux,phandle", mpic_ph);
|
|
| 301 |
qemu_fdt_setprop(fdt, mpic, "interrupt-controller", NULL, 0);
|
|
| 301 | 302 |
|
| 302 | 303 |
/* |
| 303 | 304 |
* We have to generate ser1 first, because Linux takes the first |
| ... | ... | |
| 311 | 312 |
|
| 312 | 313 |
snprintf(gutil, sizeof(gutil), "%s/global-utilities@%llx", soc, |
| 313 | 314 |
MPC8544_UTIL_OFFSET); |
| 314 |
qemu_devtree_add_subnode(fdt, gutil);
|
|
| 315 |
qemu_devtree_setprop_string(fdt, gutil, "compatible", "fsl,mpc8544-guts");
|
|
| 316 |
qemu_devtree_setprop_cells(fdt, gutil, "reg", MPC8544_UTIL_OFFSET, 0x1000);
|
|
| 317 |
qemu_devtree_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0);
|
|
| 315 |
qemu_fdt_add_subnode(fdt, gutil);
|
|
| 316 |
qemu_fdt_setprop_string(fdt, gutil, "compatible", "fsl,mpc8544-guts");
|
|
| 317 |
qemu_fdt_setprop_cells(fdt, gutil, "reg", MPC8544_UTIL_OFFSET, 0x1000);
|
|
| 318 |
qemu_fdt_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0);
|
|
| 318 | 319 |
|
| 319 | 320 |
snprintf(msi, sizeof(msi), "/%s/msi@%llx", soc, MPC8544_MSI_REGS_OFFSET); |
| 320 |
qemu_devtree_add_subnode(fdt, msi);
|
|
| 321 |
qemu_devtree_setprop_string(fdt, msi, "compatible", "fsl,mpic-msi");
|
|
| 322 |
qemu_devtree_setprop_cells(fdt, msi, "reg", MPC8544_MSI_REGS_OFFSET, 0x200);
|
|
| 323 |
msi_ph = qemu_devtree_alloc_phandle(fdt);
|
|
| 324 |
qemu_devtree_setprop_cells(fdt, msi, "msi-available-ranges", 0x0, 0x100);
|
|
| 325 |
qemu_devtree_setprop_phandle(fdt, msi, "interrupt-parent", mpic);
|
|
| 326 |
qemu_devtree_setprop_cells(fdt, msi, "interrupts",
|
|
| 321 |
qemu_fdt_add_subnode(fdt, msi);
|
|
| 322 |
qemu_fdt_setprop_string(fdt, msi, "compatible", "fsl,mpic-msi");
|
|
| 323 |
qemu_fdt_setprop_cells(fdt, msi, "reg", MPC8544_MSI_REGS_OFFSET, 0x200);
|
|
| 324 |
msi_ph = qemu_fdt_alloc_phandle(fdt);
|
|
| 325 |
qemu_fdt_setprop_cells(fdt, msi, "msi-available-ranges", 0x0, 0x100);
|
|
| 326 |
qemu_fdt_setprop_phandle(fdt, msi, "interrupt-parent", mpic);
|
|
| 327 |
qemu_fdt_setprop_cells(fdt, msi, "interrupts",
|
|
| 327 | 328 |
0xe0, 0x0, |
| 328 | 329 |
0xe1, 0x0, |
| 329 | 330 |
0xe2, 0x0, |
| ... | ... | |
| 332 | 333 |
0xe5, 0x0, |
| 333 | 334 |
0xe6, 0x0, |
| 334 | 335 |
0xe7, 0x0); |
| 335 |
qemu_devtree_setprop_cell(fdt, msi, "phandle", msi_ph);
|
|
| 336 |
qemu_devtree_setprop_cell(fdt, msi, "linux,phandle", msi_ph);
|
|
| 336 |
qemu_fdt_setprop_cell(fdt, msi, "phandle", msi_ph);
|
|
| 337 |
qemu_fdt_setprop_cell(fdt, msi, "linux,phandle", msi_ph);
|
|
| 337 | 338 |
|
| 338 | 339 |
snprintf(pci, sizeof(pci), "/pci@%llx", MPC8544_PCI_REGS_BASE); |
| 339 |
qemu_devtree_add_subnode(fdt, pci);
|
|
| 340 |
qemu_devtree_setprop_cell(fdt, pci, "cell-index", 0);
|
|
| 341 |
qemu_devtree_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci");
|
|
| 342 |
qemu_devtree_setprop_string(fdt, pci, "device_type", "pci");
|
|
| 343 |
qemu_devtree_setprop_cells(fdt, pci, "interrupt-map-mask", 0xf800, 0x0,
|
|
| 344 |
0x0, 0x7);
|
|
| 345 |
pci_map = pci_map_create(fdt, qemu_devtree_get_phandle(fdt, mpic),
|
|
| 340 |
qemu_fdt_add_subnode(fdt, pci);
|
|
| 341 |
qemu_fdt_setprop_cell(fdt, pci, "cell-index", 0);
|
|
| 342 |
qemu_fdt_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci");
|
|
| 343 |
qemu_fdt_setprop_string(fdt, pci, "device_type", "pci");
|
|
| 344 |
qemu_fdt_setprop_cells(fdt, pci, "interrupt-map-mask", 0xf800, 0x0,
|
|
| 345 |
0x0, 0x7); |
|
| 346 |
pci_map = pci_map_create(fdt, qemu_fdt_get_phandle(fdt, mpic),
|
|
| 346 | 347 |
params->pci_first_slot, params->pci_nr_slots, |
| 347 | 348 |
&len); |
| 348 |
qemu_devtree_setprop(fdt, pci, "interrupt-map", pci_map, len);
|
|
| 349 |
qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic);
|
|
| 350 |
qemu_devtree_setprop_cells(fdt, pci, "interrupts", 24, 2);
|
|
| 351 |
qemu_devtree_setprop_cells(fdt, pci, "bus-range", 0, 255);
|
|
| 349 |
qemu_fdt_setprop(fdt, pci, "interrupt-map", pci_map, len);
|
|
| 350 |
qemu_fdt_setprop_phandle(fdt, pci, "interrupt-parent", mpic);
|
|
| 351 |
qemu_fdt_setprop_cells(fdt, pci, "interrupts", 24, 2);
|
|
| 352 |
qemu_fdt_setprop_cells(fdt, pci, "bus-range", 0, 255);
|
|
| 352 | 353 |
for (i = 0; i < 14; i++) {
|
| 353 | 354 |
pci_ranges[i] = cpu_to_be32(pci_ranges[i]); |
| 354 | 355 |
} |
| 355 |
qemu_devtree_setprop_cell(fdt, pci, "fsl,msi", msi_ph);
|
|
| 356 |
qemu_devtree_setprop(fdt, pci, "ranges", pci_ranges, sizeof(pci_ranges));
|
|
| 357 |
qemu_devtree_setprop_cells(fdt, pci, "reg", MPC8544_PCI_REGS_BASE >> 32,
|
|
| 358 |
MPC8544_PCI_REGS_BASE, 0, 0x1000);
|
|
| 359 |
qemu_devtree_setprop_cell(fdt, pci, "clock-frequency", 66666666);
|
|
| 360 |
qemu_devtree_setprop_cell(fdt, pci, "#interrupt-cells", 1);
|
|
| 361 |
qemu_devtree_setprop_cell(fdt, pci, "#size-cells", 2);
|
|
| 362 |
qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3);
|
|
| 363 |
qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci);
|
|
| 356 |
qemu_fdt_setprop_cell(fdt, pci, "fsl,msi", msi_ph);
|
|
| 357 |
qemu_fdt_setprop(fdt, pci, "ranges", pci_ranges, sizeof(pci_ranges));
|
|
| 358 |
qemu_fdt_setprop_cells(fdt, pci, "reg", MPC8544_PCI_REGS_BASE >> 32,
|
|
| 359 |
MPC8544_PCI_REGS_BASE, 0, 0x1000); |
|
| 360 |
qemu_fdt_setprop_cell(fdt, pci, "clock-frequency", 66666666);
|
|
| 361 |
qemu_fdt_setprop_cell(fdt, pci, "#interrupt-cells", 1);
|
|
| 362 |
qemu_fdt_setprop_cell(fdt, pci, "#size-cells", 2);
|
|
| 363 |
qemu_fdt_setprop_cell(fdt, pci, "#address-cells", 3);
|
|
| 364 |
qemu_fdt_setprop_string(fdt, "/aliases", "pci0", pci);
|
|
| 364 | 365 |
|
| 365 | 366 |
params->fixup_devtree(params, fdt); |
| 366 | 367 |
|
| 367 | 368 |
if (toplevel_compat) {
|
| 368 |
qemu_devtree_setprop(fdt, "/", "compatible", toplevel_compat,
|
|
| 369 |
strlen(toplevel_compat) + 1);
|
|
| 369 |
qemu_fdt_setprop(fdt, "/", "compatible", toplevel_compat,
|
|
| 370 |
strlen(toplevel_compat) + 1); |
|
| 370 | 371 |
} |
| 371 | 372 |
|
| 372 | 373 |
done: |
| 373 | 374 |
if (!dry_run) {
|
| 374 |
qemu_devtree_dumpdtb(fdt, fdt_size);
|
|
| 375 |
qemu_fdt_dumpdtb(fdt, fdt_size);
|
|
| 375 | 376 |
cpu_physical_memory_write(addr, fdt, fdt_size); |
| 376 | 377 |
} |
| 377 | 378 |
ret = fdt_size; |
Also available in: Unified diff