Revision 5a5012ec target-mips/fop_template.c
b/target-mips/fop_template.c | ||
---|---|---|
19 | 19 |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
20 | 20 |
*/ |
21 | 21 |
|
22 |
#if defined(SFREG)
|
|
22 |
#if defined(FREG) |
|
23 | 23 |
|
24 |
#define OP_WLOAD_FREG(treg, tregname, SFREG) \
|
|
25 |
void glue(glue(op_load_fpr_,tregname), SFREG) (void) \
|
|
26 |
{ \ |
|
27 |
treg = FPR_W(env, SFREG); \
|
|
28 |
RETURN(); \ |
|
24 |
#define OP_WLOAD_FREG(treg, tregname, FREG) \
|
|
25 |
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
|
|
26 |
{ \
|
|
27 |
treg = env->fpr[FREG].fs[FP_ENDIAN_IDX]; \
|
|
28 |
RETURN(); \
|
|
29 | 29 |
} |
30 | 30 |
|
31 |
#define OP_WSTORE_FREG(treg, tregname, SFREG) \
|
|
32 |
void glue(glue(op_store_fpr_,tregname), SFREG) (void)\
|
|
33 |
{ \ |
|
34 |
FPR_W(env, SFREG) = treg; \
|
|
35 |
RETURN(); \ |
|
31 |
#define OP_WSTORE_FREG(treg, tregname, FREG) \
|
|
32 |
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
|
|
33 |
{ \
|
|
34 |
env->fpr[FREG].fs[FP_ENDIAN_IDX] = treg; \
|
|
35 |
RETURN(); \
|
|
36 | 36 |
} |
37 | 37 |
|
38 |
/* WT0 = SFREG.w: op_load_fpr_WT0_fprSFREG */ |
|
39 |
OP_WLOAD_FREG(WT0, WT0_fpr, SFREG) |
|
40 |
/* SFREG.w = WT0: op_store_fpr_WT0_fprSFREG */ |
|
41 |
OP_WSTORE_FREG(WT0, WT0_fpr, SFREG) |
|
38 |
/* WT0 = FREG.w: op_load_fpr_WT0_fprFREG */ |
|
39 |
OP_WLOAD_FREG(WT0, WT0_fpr, FREG) |
|
40 |
/* FREG.w = WT0: op_store_fpr_WT0_fprFREG */ |
|
41 |
OP_WSTORE_FREG(WT0, WT0_fpr, FREG) |
|
42 |
|
|
43 |
OP_WLOAD_FREG(WT1, WT1_fpr, FREG) |
|
44 |
OP_WSTORE_FREG(WT1, WT1_fpr, FREG) |
|
45 |
|
|
46 |
OP_WLOAD_FREG(WT2, WT2_fpr, FREG) |
|
47 |
OP_WSTORE_FREG(WT2, WT2_fpr, FREG) |
|
48 |
|
|
49 |
#define OP_DLOAD_FREG(treg, tregname, FREG) \ |
|
50 |
void glue(glue(op_load_fpr_,tregname), FREG) (void) \ |
|
51 |
{ \ |
|
52 |
if (env->CP0_Status & (1 << CP0St_FR)) \ |
|
53 |
treg = env->fpr[FREG].fd; \ |
|
54 |
else \ |
|
55 |
treg = (uint64_t)(env->fpr[FREG | 1].fs[FP_ENDIAN_IDX]) << 32 | \ |
|
56 |
env->fpr[FREG & ~1].fs[FP_ENDIAN_IDX]; \ |
|
57 |
RETURN(); \ |
|
58 |
} |
|
42 | 59 |
|
43 |
OP_WLOAD_FREG(WT1, WT1_fpr, SFREG) |
|
44 |
OP_WSTORE_FREG(WT1, WT1_fpr, SFREG) |
|
60 |
#define OP_DSTORE_FREG(treg, tregname, FREG) \ |
|
61 |
void glue(glue(op_store_fpr_,tregname), FREG) (void) \ |
|
62 |
{ \ |
|
63 |
if (env->CP0_Status & (1 << CP0St_FR)) \ |
|
64 |
env->fpr[FREG].fd = treg; \ |
|
65 |
else { \ |
|
66 |
env->fpr[FREG | 1].fs[FP_ENDIAN_IDX] = treg >> 32; \ |
|
67 |
env->fpr[FREG & ~1].fs[FP_ENDIAN_IDX] = treg; \ |
|
68 |
} \ |
|
69 |
RETURN(); \ |
|
70 |
} |
|
45 | 71 |
|
46 |
OP_WLOAD_FREG(WT2, WT2_fpr, SFREG)
|
|
47 |
OP_WSTORE_FREG(WT2, WT2_fpr, SFREG)
|
|
72 |
OP_DLOAD_FREG(DT0, DT0_fpr, FREG)
|
|
73 |
OP_DSTORE_FREG(DT0, DT0_fpr, FREG)
|
|
48 | 74 |
|
49 |
#endif |
|
75 |
OP_DLOAD_FREG(DT1, DT1_fpr, FREG) |
|
76 |
OP_DSTORE_FREG(DT1, DT1_fpr, FREG) |
|
50 | 77 |
|
51 |
#if defined(DFREG) |
|
78 |
OP_DLOAD_FREG(DT2, DT2_fpr, FREG) |
|
79 |
OP_DSTORE_FREG(DT2, DT2_fpr, FREG) |
|
52 | 80 |
|
53 |
#define OP_DLOAD_FREG(treg, tregname, DFREG) \
|
|
54 |
void glue(glue(op_load_fpr_,tregname), DFREG) (void) \
|
|
55 |
{ \ |
|
56 |
treg = FPR_D(env, DFREG); \
|
|
57 |
RETURN(); \ |
|
81 |
#define OP_PSLOAD_FREG(treg, tregname, FREG) \
|
|
82 |
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
|
|
83 |
{ \
|
|
84 |
treg = env->fpr[FREG].fs[!FP_ENDIAN_IDX]; \
|
|
85 |
RETURN(); \
|
|
58 | 86 |
} |
59 | 87 |
|
60 |
#define OP_DSTORE_FREG(treg, tregname, DFREG) \
|
|
61 |
void glue(glue(op_store_fpr_,tregname), DFREG) (void)\
|
|
62 |
{ \ |
|
63 |
FPR_D(env, DFREG) = treg; \
|
|
64 |
RETURN(); \ |
|
88 |
#define OP_PSSTORE_FREG(treg, tregname, FREG) \
|
|
89 |
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
|
|
90 |
{ \
|
|
91 |
env->fpr[FREG].fs[!FP_ENDIAN_IDX] = treg; \
|
|
92 |
RETURN(); \
|
|
65 | 93 |
} |
66 | 94 |
|
67 |
OP_DLOAD_FREG(DT0, DT0_fpr, DFREG)
|
|
68 |
OP_DSTORE_FREG(DT0, DT0_fpr, DFREG)
|
|
95 |
OP_PSLOAD_FREG(WTH0, WTH0_fpr, FREG)
|
|
96 |
OP_PSSTORE_FREG(WTH0, WTH0_fpr, FREG)
|
|
69 | 97 |
|
70 |
OP_DLOAD_FREG(DT1, DT1_fpr, DFREG)
|
|
71 |
OP_DSTORE_FREG(DT1, DT1_fpr, DFREG)
|
|
98 |
OP_PSLOAD_FREG(WTH1, WTH1_fpr, FREG)
|
|
99 |
OP_PSSTORE_FREG(WTH1, WTH1_fpr, FREG)
|
|
72 | 100 |
|
73 |
OP_DLOAD_FREG(DT2, DT2_fpr, DFREG)
|
|
74 |
OP_DSTORE_FREG(DT2, DT2_fpr, DFREG)
|
|
101 |
OP_PSLOAD_FREG(WTH2, WTH2_fpr, FREG)
|
|
102 |
OP_PSSTORE_FREG(WTH2, WTH2_fpr, FREG)
|
|
75 | 103 |
|
76 | 104 |
#endif |
77 | 105 |
|
78 | 106 |
#if defined (FTN) |
79 | 107 |
|
80 |
#define SET_RESET(treg, tregname) \ |
|
108 |
#define SET_RESET(treg, tregname) \
|
|
81 | 109 |
void glue(op_set, tregname)(void) \ |
82 |
{ \ |
|
83 |
treg = PARAM1; \ |
|
84 |
RETURN(); \ |
|
85 |
} \ |
|
110 |
{ \
|
|
111 |
treg = PARAM1; \
|
|
112 |
RETURN(); \
|
|
113 |
} \
|
|
86 | 114 |
void glue(op_reset, tregname)(void) \ |
87 |
{ \ |
|
88 |
treg = 0; \ |
|
89 |
RETURN(); \ |
|
90 |
} \
|
|
115 |
{ \
|
|
116 |
treg = 0; \
|
|
117 |
RETURN(); \
|
|
118 |
} |
|
91 | 119 |
|
92 | 120 |
SET_RESET(WT0, _WT0) |
93 | 121 |
SET_RESET(WT1, _WT1) |
... | ... | |
95 | 123 |
SET_RESET(DT0, _DT0) |
96 | 124 |
SET_RESET(DT1, _DT1) |
97 | 125 |
SET_RESET(DT2, _DT2) |
126 |
SET_RESET(WTH0, _WTH0) |
|
127 |
SET_RESET(WTH1, _WTH1) |
|
128 |
SET_RESET(WTH2, _WTH2) |
|
98 | 129 |
|
99 | 130 |
#undef SET_RESET |
100 | 131 |
#endif |
Also available in: Unified diff