Revision 5b207c00

b/target-i386/translate.c
1597 1597
       fix TCG definition) */
1598 1598
    if (is_right) {
1599 1599
        tcg_gen_shr_tl(cpu_tmp4, t0, cpu_tmp0);
1600
        tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(data_bits), cpu_tmp0);
1600
        tcg_gen_subfi_tl(cpu_tmp0, data_bits, cpu_tmp0);
1601 1601
        tcg_gen_shl_tl(t0, t0, cpu_tmp0);
1602 1602
    } else {
1603 1603
        tcg_gen_shl_tl(cpu_tmp4, t0, cpu_tmp0);
1604
        tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(data_bits), cpu_tmp0);
1604
        tcg_gen_subfi_tl(cpu_tmp0, data_bits, cpu_tmp0);
1605 1605
        tcg_gen_shr_tl(t0, t0, cpu_tmp0);
1606 1606
    }
1607 1607
    tcg_gen_or_tl(t0, t0, cpu_tmp4);
......
1822 1822
            tcg_gen_shr_tl(cpu_tmp4, t0, cpu_tmp5);
1823 1823
            
1824 1824
            /* only needed if count > 16, but a test would complicate */
1825
            tcg_gen_sub_tl(cpu_tmp5, tcg_const_tl(32), t2);
1825
            tcg_gen_subfi_tl(cpu_tmp5, 32, t2);
1826 1826
            tcg_gen_shl_tl(cpu_tmp0, t0, cpu_tmp5);
1827 1827

  
1828 1828
            tcg_gen_shr_tl(t0, t0, t2);
......
1836 1836
            tcg_gen_ext32u_tl(t1, t1);
1837 1837
            
1838 1838
            tcg_gen_shl_tl(cpu_tmp4, t0, cpu_tmp5);
1839
            tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(32), cpu_tmp5);
1839
            tcg_gen_subfi_tl(cpu_tmp0, 32, cpu_tmp5);
1840 1840
            tcg_gen_shr_tl(cpu_tmp6, t1, cpu_tmp0);
1841 1841
            tcg_gen_or_tl(cpu_tmp4, cpu_tmp4, cpu_tmp6);
1842 1842

  
1843 1843
            tcg_gen_shl_tl(t0, t0, t2);
1844
            tcg_gen_sub_tl(cpu_tmp5, tcg_const_tl(32), t2);
1844
            tcg_gen_subfi_tl(cpu_tmp5, 32, t2);
1845 1845
            tcg_gen_shr_tl(t1, t1, cpu_tmp5);
1846 1846
            tcg_gen_or_tl(t0, t0, t1);
1847 1847
        }
......
1854 1854
            tcg_gen_shr_tl(cpu_tmp4, t0, cpu_tmp5);
1855 1855

  
1856 1856
            tcg_gen_shr_tl(t0, t0, t2);
1857
            tcg_gen_sub_tl(cpu_tmp5, tcg_const_tl(data_bits), t2);
1857
            tcg_gen_subfi_tl(cpu_tmp5, data_bits, t2);
1858 1858
            tcg_gen_shl_tl(t1, t1, cpu_tmp5);
1859 1859
            tcg_gen_or_tl(t0, t0, t1);
1860 1860
            
......
1865 1865
            tcg_gen_shl_tl(cpu_tmp4, t0, cpu_tmp5);
1866 1866
            
1867 1867
            tcg_gen_shl_tl(t0, t0, t2);
1868
            tcg_gen_sub_tl(cpu_tmp5, tcg_const_tl(data_bits), t2);
1868
            tcg_gen_subfi_tl(cpu_tmp5, data_bits, t2);
1869 1869
            tcg_gen_shr_tl(t1, t1, cpu_tmp5);
1870 1870
            tcg_gen_or_tl(t0, t0, t1);
1871 1871
        }

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