Revision 5b450407
b/exec-all.h | ||
---|---|---|
325 | 325 |
} |
326 | 326 |
pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK; |
327 | 327 |
if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) { |
328 |
#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
|
|
328 |
#if defined(TARGET_ALPHA) || defined(TARGET_MIPS) || defined(TARGET_SPARC)
|
|
329 | 329 |
do_unassigned_access(addr, 0, 1, 0, 4); |
330 | 330 |
#else |
331 | 331 |
cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr); |
b/exec.c | ||
---|---|---|
3181 | 3181 |
#ifdef DEBUG_UNASSIGNED |
3182 | 3182 |
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); |
3183 | 3183 |
#endif |
3184 |
#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) |
|
3184 |
#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
|
|
3185 | 3185 |
do_unassigned_access(addr, 0, 0, 0, 1); |
3186 | 3186 |
#endif |
3187 | 3187 |
return 0; |
... | ... | |
3192 | 3192 |
#ifdef DEBUG_UNASSIGNED |
3193 | 3193 |
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); |
3194 | 3194 |
#endif |
3195 |
#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) |
|
3195 |
#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
|
|
3196 | 3196 |
do_unassigned_access(addr, 0, 0, 0, 2); |
3197 | 3197 |
#endif |
3198 | 3198 |
return 0; |
... | ... | |
3203 | 3203 |
#ifdef DEBUG_UNASSIGNED |
3204 | 3204 |
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); |
3205 | 3205 |
#endif |
3206 |
#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) |
|
3206 |
#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
|
|
3207 | 3207 |
do_unassigned_access(addr, 0, 0, 0, 4); |
3208 | 3208 |
#endif |
3209 | 3209 |
return 0; |
... | ... | |
3214 | 3214 |
#ifdef DEBUG_UNASSIGNED |
3215 | 3215 |
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); |
3216 | 3216 |
#endif |
3217 |
#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) |
|
3217 |
#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
|
|
3218 | 3218 |
do_unassigned_access(addr, 1, 0, 0, 1); |
3219 | 3219 |
#endif |
3220 | 3220 |
} |
... | ... | |
3224 | 3224 |
#ifdef DEBUG_UNASSIGNED |
3225 | 3225 |
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); |
3226 | 3226 |
#endif |
3227 |
#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) |
|
3227 |
#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
|
|
3228 | 3228 |
do_unassigned_access(addr, 1, 0, 0, 2); |
3229 | 3229 |
#endif |
3230 | 3230 |
} |
... | ... | |
3234 | 3234 |
#ifdef DEBUG_UNASSIGNED |
3235 | 3235 |
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); |
3236 | 3236 |
#endif |
3237 |
#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) |
|
3237 |
#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
|
|
3238 | 3238 |
do_unassigned_access(addr, 1, 0, 0, 4); |
3239 | 3239 |
#endif |
3240 | 3240 |
} |
b/target-alpha/cpu.h | ||
---|---|---|
434 | 434 |
|
435 | 435 |
uint64_t cpu_alpha_load_fpcr (CPUState *env); |
436 | 436 |
void cpu_alpha_store_fpcr (CPUState *env, uint64_t val); |
437 |
extern void swap_shadow_regs(CPUState *env); |
|
437 |
#ifndef CONFIG_USER_ONLY |
|
438 |
void swap_shadow_regs(CPUState *env); |
|
439 |
extern QEMU_NORETURN void do_unassigned_access(target_phys_addr_t addr, |
|
440 |
int, int, int, int); |
|
441 |
#endif |
|
438 | 442 |
|
439 | 443 |
/* Bits in TB->FLAGS that control how translation is processed. */ |
440 | 444 |
enum { |
b/target-alpha/op_helper.c | ||
---|---|---|
1265 | 1265 |
return ret; |
1266 | 1266 |
} |
1267 | 1267 |
|
1268 |
static void QEMU_NORETURN do_unaligned_access(target_ulong addr, int is_write, |
|
1269 |
int is_user, void *retaddr) |
|
1270 |
{ |
|
1271 |
uint64_t pc; |
|
1272 |
uint32_t insn; |
|
1273 |
|
|
1274 |
do_restore_state(retaddr); |
|
1275 |
|
|
1276 |
pc = env->pc; |
|
1277 |
insn = ldl_code(pc); |
|
1278 |
|
|
1279 |
env->trap_arg0 = addr; |
|
1280 |
env->trap_arg1 = insn >> 26; /* opcode */ |
|
1281 |
env->trap_arg2 = (insn >> 21) & 31; /* dest regno */ |
|
1282 |
helper_excp(EXCP_UNALIGN, 0); |
|
1283 |
} |
|
1284 |
|
|
1285 |
void QEMU_NORETURN do_unassigned_access(target_phys_addr_t addr, int is_write, |
|
1286 |
int is_exec, int unused, int size) |
|
1287 |
{ |
|
1288 |
env->trap_arg0 = addr; |
|
1289 |
env->trap_arg1 = is_write; |
|
1290 |
dynamic_excp(EXCP_MCHK, 0); |
|
1291 |
} |
|
1292 |
|
|
1268 | 1293 |
#define MMUSUFFIX _mmu |
1294 |
#define ALIGNED_ONLY |
|
1269 | 1295 |
|
1270 | 1296 |
#define SHIFT 0 |
1271 | 1297 |
#include "softmmu_template.h" |
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