target-lm32: Move cpu_gdb_{read,write}_register()
Acked-by: Michael Walle <michael@walle.cc>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-xtensa: Move cpu_gdb_{read,write}_register()
Acked-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions
This avoids polluting the global namespace with a non-prefixed macro andmakes it obvious in the call sites that we return.
Semi-automatic conversion using, e.g., sed i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target*/gdbstub.c...
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)Signed-off-by: Andreas Färber <afaerber@suse.de>
target-sh4: Move cpu_gdb_{read,write}_register()
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-microblaze: Move cpu_gdb_{read,write}_register()
target-cris: Move cpu_gdb_{read,write}_register()
target-alpha: Move cpu_gdb_{read,write}_register()
target-s390x: Move cpu_gdb_{read,write}_register()
target-openrisc: Move cpu_gdb_{read,write}_register()
Reviewed-by: Jia Liu <proljc@gmail.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-ppc: Move cpu_gdb_{read,write}_register()
target-sparc: Move cpu_gdb_{read,write}_register()
target-arm: Move cpu_gdb_{read,write}_register()
target-m68k: Move cpu_gdb_{read,write}_register()
target-mips: Move cpu_gdb_{read,write}_register()
target-i386: Move cpu_gdb_{read,write}_register()
gdbstub: Fix cpu_gdb_{read,write}_register() Coding Style
Add braces, replace tabs, remove trailing whitespace, drop space beforeparenthesis and place break etc. below case statements.
gdbstub: Drop dead code in cpu_gdb_{read,write}_register()
GET_REG*() macros include a return statement, thus no need for break.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
CPUState::gdb_num_regs replaces num_g_regs.CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.
Allows building gdb_register_coprocessor() for xtensa, too.
As a side effect this should fix coprocessor register numbering for SMP....
target-xtensa: Introduce XtensaCPU subclasses
Register a CPU type per core registered. Save the XtensaConfig inXtensaCPUClass and copy it from there to CPUXtensaState, to avoidtouching every env->config access for now.
Prepares for storing per-class GDB register count....
linux-user: Avoid redundant ENV_GET_CPU()
This fixes a mismerge in 874ec3c5b3821bb964f9f37b2f930f2a9ce51652.
Acked-by: Riku Voipio <riku.voipio@iki.fi>Signed-off-by: Andreas Färber <afaerber@suse.de>
kvm: Change prototype of kvm_update_guest_debug()
Passing a CPUState pointer instead of a CPUArchState pointer eliminatesthe last target dependent data type in sysemu/kvm.h.
It also simplifies the code.
Signed-off-by: Stefan Weil <sw@weilnetz.de>Acked-by: Paolo Bonzini <pbonzini@redhat.com>...
target-s390x: Fix CPUState rework fallout
Commit f17ec444c3d39f76bcd8b71c2c05d5754bfe333eexec: Change cpu_memory_rw_debug() argument to CPUState
missed to update s390x KVM code, breaking the build.
Let's fix it up.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>...
Merge remote-tracking branch 'rth/tcg-next' into staging
Merge remote-tracking branch 'jliu/or32' into staging
Message-id: 1374576458-22808-1-git-send-email-proljc@gmail.com...
Merge remote-tracking branch 'mdroth/qga-pull-2013-7-25' into staging
Merge remote-tracking branch 'kraxel/seabios-1.7.3' into staging
Message-id: 1374673573-25074-1-git-send-email-kraxel@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging
qga/service-win32.c: diagnostic output should go to stderr
Acked-by: Michael Roth <mdroth@linux.vnet.ibm.com>Reviewed-by: Eric Blake <eblake@redhat.com>Signed-off-by: Laszlo Ersek <lersek@redhat.com>Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
ga_install_service(): nest error paths more idiomatically
qga: escape cmdline args when registering win32 service (CVE-2013-2231)
Reported-by: Lev Veyde <lveyde@redhat.com>Reviewed-by: Eric Blake <eblake@redhat.com>Signed-off-by: Laszlo Ersek <lersek@redhat.com>Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
sparc64: unbreak
... by making apb a subclass of TYPE_PCI_HOST_BRIDGE.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-21-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
default-configs: add test device to all machines supporting ISA
This will let these machines run an endianness test for ISAI/O port space.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-22-git-send-email-pbonzini@redhat.com...
default-configs: add SuperIO to SH4
The device provides an ISA bus to run the endianness test on.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-23-git-send-email-pbonzini@redhat.com...
default-configs/ppc64: add all components of i82378 SuperIO chip used by prep
The device provides an ISA bus so that pseries can also run theendianness test.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>...
qtest: add test for ISA I/O space endianness
This writes a register and reads its 1/2/4 byte parts. Maskingis done in the device model.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-25-git-send-email-pbonzini@redhat.com...
memory: move functions around
Prepare for next patch, no semantic change.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-26-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
memory: pass MemoryRegion to access_with_adjusted_size
The accessors all use a MemoryRegion opaque value. Avoid goinguselessly through void*.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-27-git-send-email-pbonzini@redhat.com...
memory: check memory region endianness, not target's
When combining multiple accesses into a single value, we need to do soin the device's desired endianness. The target endianness does not haveany influence.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
pc-testdev: add I/O port to test memory.c auto split/combine
The ports at 0xe8..0xeb have impl.min/max_access_size == 1, sothat memory accesses are split and combined by the memory core.
mips_r4k: do not use isa_mmio
This fixes endianness bugs in I/O port access.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-8-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
mips_malta: do not use isa_mmio
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-9-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
ppc440_bamboo: do not use isa_mmio
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-10-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
mipssim: do not use isa_mmio
Untested, this board does not support PCI so it cannot run endianness-test.It should fix endianness bugs in I/O port access.
mips_fulong2e: do not use isa_mmio
This board is little-endian, but still isa_mmio should die. :)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-12-git-send-email-pbonzini@redhat.com...
sparc64: remove indirection for I/O port access
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-13-git-send-email-pbonzini@redhat.com...
ebus: do not use isa_mmio
This is untested, because ebus does not have a libqos module.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-14-git-send-email-pbonzini@redhat.com...
isa_mmio: delete
It is not used anymore.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-15-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
Revert "ioport: remove LITTLE_ENDIAN mark for portio"
This reverts commit c3cb8e77804313e1be99b5f28a34a346736707a5.
The scenario where I/O ports are accessed with DEVICE_LITTLE_ENDIANendianness now works and will soon be unit tested. Since the PortioList...
pc-testdev: support 8 and 16-bit accesses to 0xe0
This will let us use the testdev to test endianness.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-17-git-send-email-pbonzini@redhat.com...
pc-testdev: remove useless cpu_to_le64/le64_to_cpu
So far the device was only used on little-endian machines.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-18-git-send-email-pbonzini@redhat.com...
mips: degrade BIOS error to warning
No free MIPS BIOS is available, so it makes little sense to quit.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-19-git-send-email-pbonzini@redhat.com...
sh4: unbreak r2d
... by making sh_pci a subclass of TYPE_PCI_HOST_BRIDGE.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-20-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
ppc_newworld: do not use isa_mmio
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-4-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
spapr_pci: remove indirection for I/O port access
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-5-git-send-email-pbonzini@redhat.com...
prep: fix I/O port endianness
Do not swap endianness here, it will happen during cpu_{in,out}{b,w,l}.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-6-git-send-email-pbonzini@redhat.com...
mips_jazz: do not use isa_mmio
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-7-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
sh4: do not use isa_mmio
This fixes endianness bugs in I/O port access (for sh4eb).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-2-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
ppc_oldworld: do not use isa_mmio
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1374501278-31549-3-git-send-email-pbonzini@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
seabios: update to 1.7.3
Changes summary (git shortlog rel-1.7.2.2..rel-1.7.3):
Alex Williamson (4): seabios q35: Enable all PIRQn IRQs at startup seabios q35: Add new PCI slot to irq routing function seabios: Add a dummy PCI slot to irq mapping function...
po/Makefile: Use macro quiet-command for nice looking messages
Suppress also the "... done" message from msgmerge.
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
po/Makefile: Fix and improve help message
The help message contains single quotes which got lost in the output.Fix also a typo and use two instead of three lines.
po/Makefile: Fix *.mo generation for out-of-tree builds (regression)
Commit f84756554e32d97db3aa949db1dd58c7eea62375 added a wildcard searchfor *.po files. This search found no files for out of tree builds, sothose builds no longer created and installed *.mo files....
po/Makefile: Fix generation of messages.po
Merge remote-tracking branch 'quintela/migration.next' into staging
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings
Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging
QOM device refactorings
linux-user: Handle compressed ISA encodings when processing MIPS exceptions
Decode trap instructions during the handling of an EXCP_BREAK or EXCP_TRAPaccording to the current ISA mode.
Signed-off-by: Kwok Cheung Yeung <kcy@codesourcery.com>Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
linux-user: Fix target_stat and target_stat64 for OpenRISC
OpenRISC uses the asm-generic versions of target_stat andtarget_stat64, but it was incorrectly using the x86/ARM/etc versiondue to a misplaced defined(TARGET_OPENRISC). The previously unusedOpenRISC section of the ifdef ladder also defined an incorrect...
linux-user: Fix pipe syscall return for SPARC
SPARC is one of the CPUs which has a funny syscall ABI for thepipe syscall; add it to the set of special cases in do_pipe().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
linux-user: fix segmentation fault passing with h2g(x) != x
When forwarding a segmentation fault into the guest process, we were passingthe host's address directly into the guest process's signal descriptor.
That obviously confused the guest process, since it didn't know what to make...
linux-user: Fix epoll on ARM hosts
The epoll emulation uses data structures without packing them, so thecompiler might choose to add padding inside.
This patch makes the most offending one (target_epoll_event) a packedstructure to make sure we don't pad it by accident. ARM would pad it,...
linux-user: Reset copied CPUs in cpu_copy() always
When a new thread gets created, we need to reset non arch specific state toget the new CPU into clean state.
However this reset should happen before the arch specific CPU contents getcopied over. Otherwise we end up having clean reset state in our newly created...
linux-user: Unlock mmap_lock when resuming guest from page_unprotect
The page_unprotect() function is running everything locked. Before everypotential exit path of the function mmap_unlock() gets called to make surewe don't leak the lock.
However, the function calls tb_invalidate_phys_page() which again can...
migration: add autoconvergence documentation
This hunk got lost during merge. It is documentation.
Spotted-by: Peter Lieven <lieven-lists@dlhnet.de>Signed-off-by: Juan Quintela <quintela@redhat.com>
Fix real mode guest migration
Older KVM versions save CS dpl value to an invalid value for real mode guests(0x3). This patch detect this situation when loading CPU state and set all thesegments dpl to zero.This will allow migration from older KVM on host without unrestricted guest...
Fix real mode guest segments dpl value in savevm
Older KVM version put invalid value in the segments registers dpl field forreal mode guests (0x3).This breaks migration from those hosts to hosts with unrestricted guest support.We detect it by checking CS dpl value for real mode guest and fix the dpl values...
rdma: introduce MIG_STATE_NONE and change MIG_STATE_SETUP state transition
As described in the previous patch, until now, the MIG_STATE_SETUPstate was not really a 'formal' state. It has been used as a 'zero' state(what we're calling 'NONE' here) and QEMU has been unconditionally transitioning...
rdma: account for the time spent in MIG_STATE_SETUP through QMP
Using the previous patches, we're now able to timestamp the SETUPstate. Once we have this time, let the user know about it in theschema.
Reviewed-by: Juan Quintela <quintela@redhat.com>Reviewed-by: Eric Blake <eblake@redhat.com>...
rdma: allow state transitions between other states besides ACTIVE
This patch is in preparation for the next ones: Until now the MIG_STATE_SETUPstate was not really a 'formal' state. It has been used as a 'zero' stateand QEMU has been unconditionally transitioning into this state when...
target-openrisc: Free typename in openrisc_cpu_class_by_name
We should free typename here.
Signed-off-by: Jia Liu <proljc@gmail.com>Reviewed-by: Andreas Färber <afaerber@suse.de>
hw/openrisc: Use stderr output instead of qemu_log
We should use stderr output instead of qemu_log in order to output ErrMsgonto the screen.
Signed-off-by: Jia Liu <proljc@gmail.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Andreas Färber <afaerber@suse.de>
hw/openrisc: Indent typo
Indent typo.
rdma: core logic
Code that does need to be visible is keptwell contained inside this file and this is the onlynew additional file to the entire patch.
This file includes the entire protocol and interfacesrequired to perform RDMA migration.
Also, the configure and Makefile modifications to link...
rdma: send pc.ram
This takes advantages of the previous patches:
1. use the new QEMUFileOps hook 'save_page'
2. call out to the right accessor methods to invoke the iteration hooks defined in QEMUFileOps
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>...
rdma: update documentation to reflect new unpin support
As requested, the protocol now includes memory unpinning support.This has been implemented in a non-optimized manner, in such a waythat one could devise an LRU or other workload-specific information...
rdma: bugfix: ram_control_save_page()
We were not checking for a valid 'bytes_sent' pointer before accessing it.
Reviewed-by: Eric Blake <eblake@redhat.com>Signed-off-by: Michael R. Hines <mrhines@us.ibm.com>Signed-off-by: Juan Quintela <quintela@redhat.com>
rdma: introduce ram_handle_compressed()
This gives RDMA shared access to madvise() on the destination sidewhen an entire chunk is found to be zero.
Reviewed-by: Juan Quintela <quintela@redhat.com>Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Chegu Vinod <chegu_vinod@hp.com>...
gdbstub: Change gdb_handlesig() argument to CPUState
Prepares for changing GDBState::c_cpu to CPUState.
gdbstub: Change gdb_{read,write}_register() argument to CPUState
Use CPUState::env_ptr for now.
Prepares for changing GDBState::g_cpu to CPUState.
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helperscpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....
exec: Change cpu_memory_rw_debug() argument to CPUState
Propagate X86CPU in kvmvapic for simplicity.
cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()
Make inline target_memory_rw_debug() always available and change itsargument to CPUState. Let it check if CPUClass::memory_rw_debug providesa specialized callback and fall back to cpu_memory_rw_debug() otherwise....
gdbstub: Change GDBState::{c,g}_cpu and find_cpu() to CPUState
Use CPUState::env_ptr where still needed.
cpu: Move gdb_regs field from CPU_COMMON to CPUState
Prepares for changing gdb_register_coprocessor() argument to CPUState.
gdbstub: Change gdb_register_coprocessor() argument to CPUState
linux-user: Use X86CPU property to retrieve CPUID family
Avoids duplicating the calculation.
Reviewed-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Change cpu_single_step() argument to CPUState
Needed for GdbState::c_cpu.
kvm: Change kvm_{insert,remove}_breakpoint() argument to CPUState
CPUArchState is no longer directly used since converting CPU loops toCPUState.
gdbstub: Change syscall callback argument to CPUState
Callback implementations were specific to arm and m68k, so can easilycast to ARMCPU and M68kCPU respectively.