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cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helperscpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....
exec: Change cpu_memory_rw_debug() argument to CPUState
Propagate X86CPU in kvmvapic for simplicity.
Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Make first_cpu and next_cpu CPUState
Move next_cpu from CPU_COMMON to CPUState.Move first_cpu variable to qom/cpu.h.
gdbstub needs to use CPUState::env_ptr for now.cpu_copy() no longer needs to save and restore cpu_next.
Acked-by: Paolo Bonzini <pbonzini@redhat.com>...
kvm: Change cpu_synchronize_state() argument to CPUState
Change Monitor::mon_cpu to CPUState as well.
Reviewed-by: liguang <lig.fnst@cn.fujitsu.com>Acked-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
Make cpustats monitor command available unconditionally.
Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec()arguments to CPUState.
target-i386: Replace cpuid_*features fields with a feature word array
This replaces the feature-bit fields on both X86CPU and x86_def_tstructs with an array.
With this, we will be able to simplify code that simply does the sameoperation on all feature words (e.g. kvm_check_features_against_host(),...
target-i386: Don't modify env->eflags around cpu_dump_state
We can compute the value in cpu_dump_state anyway, and gratuitousmodifications to eflags creates heisenbugs.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Richard Henderson <rth@twiddle.net>...
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
target-i386: Implement ADX extension
Signed-off-by: Richard Henderson <rth@twiddle.net>
target-i386: Add CC_OP_CLR
Special case xor with self. We need not even store the knownzero into cc_src.
target-i386: Implement BLSR, BLSMSK, BLSI
Do all of group 17 at one time for ease.
target-i386: Move cpu_x86_init()
Consolidate CPU functions in cpu.c.Allows to make cpu_x86_register() static.
No functional changes.
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Update X86CPU to QOM realizefn
Adapt the signature of x86_cpu_realize(), hook up toDeviceClass::realize and set realized = true in cpu_x86_init().
The QOM realizefn cannot depend on errp being non-NULL as incpu_x86_init(), so use a local Error to preserve error handling behavior...
cpu: do not use object_delete
CPUs are never added to the composition tree, so delete is achievedsimply by removing the last references to them.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-i386: Pass X86CPU to cpu_x86_set_a20()
Prepares for cpu_interrupt() changing argument to CPUState.
While touching it, rename to x86_cpu_...() now that it takes an X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
target-i386: Use switch in check_hw_breakpoints()
Replace an if statement using magic numbers for breakpoint type with amore explicit switch statement. This is to aid readability.
Change the return type and force_dr6_update argument type to bool.
While at it, fix Coding Style issues (missing braces)....
target-i386: Avoid goto in hw_breakpoint_insert()
"Go To Statement Considered Harmful" -- E. Dijkstra
To avoid an unnecessary goto within the switch statement, movewatchpoint insertion out of the switch statement. Improves readability.
While at it, fix Coding Style issues (missing braces, indentation)....
target-i386: Introduce hw_{local,global}_breakpoint_enabled()
hw_breakpoint_enabled() returned a bit field indicating whether a localbreakpoint and/or global breakpoint was enabled. Avoid this number magicby using explicit boolean helper functions hw_local_breakpoint_enabled()...
target-i386: Define DR7 bit field constants
Implicit use of dr7 bit field is a little hard to understand,so define constants for them and use them consistently.
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using anegative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset()....
softmmu: move include files to include/sysemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
monitor: move include files to include/monitor/
exec: refactor cpu_restore_state
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-i386: Pass X86CPU to cpu_x86_inject_mce()
Needed for changing run_on_cpu() argument to CPUState.
cpus: Pass CPUState to run_on_cpu()
CPUArchState is no longer needed.
Move the declaration to include/qemu/cpu.h and add documentation.
target-i386: If x86_cpu_realize() failed, report error and do cleanup
Signed-off-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from beingx86-specific flags to being generic ones. This allows us to drop someTARGET_I386 ifdefs in various places, and means that we can (potentially)...
x86: Implement SMEP and SMAP
This patch implements Supervisor Mode Execution Prevention (SMEP) andSupervisor Mode Access Prevention (SMAP) for x86. The purpose of thepatch, obviously, is to help kernel developers debug the support forthose features....
Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu
target-i386: move cpu halted decision into x86_cpu_reset
MP initialization protocol differs between cpu families, and for P6 andonward models it is up to CPU to decide if it will be BSP using thisprotocol, so try to model this. However there is no point in implementing...
x86: avoid AREG0 for exceptions
Add an explicit CPUX86State parameter instead of relying on AREG0.
Merge raise_exception_env() to raise_exception(), likewise withraise_exception_err_env() and raise_exception_err().
Introduce cpu_svm_check_intercept_param() and cpu_vmexit()...
target-i386: move tcg initialization into x86_cpu_initfn()
In order to make cpu object not depended on external ad-hocinitialization routines, move tcg initialization from cpu_x86_initinside cpu object "x86_cpu_initfn()".
Signed-off-by: Igor Mammedov <imammedo@redhat.com>...
target-i386: drop usage of prev_debug_excp_handler
Chains of exception handlers are currently unused feature, drop itfor now so as not to expose prev_debug_excp_handler at globalscope when moving tcg initialization into target-i386/cpu.c
Later we probably could re-invent better interface for this....
Kill off cpu_state_reset()
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()that would operate on QOM objects.
All callers have been updated except for one in target-mips, so drop all...
target-i386: Pass X86CPU to do_cpu_{init,sipi}()
Allows to use cpu_reset() in place of cpu_state_reset().
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
target-i386: Let cpu_x86_init() return X86CPU
Turn cpu_init macro into a static inline function returning CPUX86Statefor backwards compatibility.
target-i386: Defer MCE init
Commit de024815e3b523addf58f1f79846b7fe74643678 (target-i386: QOM'ifyCPU init) moved mce_init() call from helper.c:cpu_x86_init() intoX86CPU's cpu.c:x86_cpu_initfn().mce_init() checks for a family >= 6 though, so we could end up with a...
target-i386: Pass X86CPU to cpu_x86_register()
Avoids an x86_env_get_cpu() call there, to work with QOM properties.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
target-i386: QOM'ify CPU
Embed CPUX86State as first member of X86CPU.Distinguish between "x86_64-cpu" and "i386-cpu".Drop cpu_x86_close() in favor of calling object_delete() directly.
For now let CPUClass::reset() call cpu_state_reset().
target-i386: QOM'ify CPU init
Move code from cpu_x86_init() to new QOM x86_cpu_initfn().Also move mce_init() to cpu.c since it's used nowhere else.
target-i386: QOM'ify CPU reset
Move code from cpu_state_reset() into QOM x86_cpu_reset(),fixing style issues for FPU init.
target-i386: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUX86State/g" target-i386/*.[hc] sed -i "s/#define CPUX86State/#define CPUState/" target-i386/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).
Don't hide the parameter type behind explicit casts, use staticfunctions with strongly typed argument to indirect.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
target-i386: Mask NX bit from cpu_get_phys_page_debug result
This was a long pending bug, now revealed by the assert inphys_page_find that stumbled over the large page index returned bycpu_get_phys_page_debug for NX-marked pages: We need to mask out NX and...
Merge branch 'upstream' of git://qemu.weilnetz.de/qemu
target-i386: Clean includes
Remove some include statements which are not needed.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
target-i386: Add infrastructure for reporting TPR MMIO accesses
This will allow the APIC core to file a TPR access report. Depending onthe accelerator and kernel irqchip mode, it will either be deliveredright away or queued for later reporting.
In TCG mode, we can restart the triggering instruction and can therefore...
Fix X86 CPU topology in KVM mode
apic id returned to guest kernel in ebx for cpuid(function=1) depends onCPUX86State->cpuid_apic_id which gets populated after the cpuid informationis cached in the host kernel. This results in broken CPU topology in guest....
i386: wire up MSR_IA32_MISC_ENABLE
It's needed for its default value - bit 0 specifies that "rep movs" isgood enough for memcpy, and Linux may use a slower memcpu if it is not set,depending on cpu family/model.
Signed-off-by: Avi Kivity <avi@redhat.com>...
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
Avoid allocating TCG resources in non-TCG mode
Do not allocate TCG-only resources like the translation buffer whenrunning over KVM or XEN. Saves a "few" bytes in the qemu address spaceand is also conceptually cleaner.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
Fix compilation warning due to missing header for sigaction (followup)
This patch removes all references to signal.h when qemu-common.h is includedas they become redundant.
Signed-off-by: Alexandre Raymond <cerbere@gmail.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
target-i386: remove old code handling float64
Now that target-i386 uses softfloat, floatx80 is always available andthere is no need anymore to have code handling both float64 and floax80.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: use CPU_LDoubleU instead of a private union
Use CPU_LDoubleU in cpu_dump_state() instead of redefining a union fordoing the conversion.
Based on a patch from Laurent Vivier <laurent@vivier.eu>.
Cc: Laurent Vivier <laurent@vivier.eu>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
x86: Properly reset PAT MSR
Conforming to the Intel spec, set the power-on value of PAT also onreset, but save it across INIT.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
kvm: x86: Consolidate TCG and KVM MCE injection code
This switches KVM's MCE injection path to cpu_x86_inject_mce, both forSIGBUS and monitor initiated events. This means we prepare the MCA MSRsin the VCPUState also for KVM.
We have to drop the MSRs writeback restrictions for this purpose which...
x86: Perform implicit mcg_status reset
Reorder mcg_status in CPUState to achieve automatic clearing on reset.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>...
x86: Small cleanups of MCE helpers
Fix some code style issues, use proper headers, and align to cpu_x86naming scheme. No functional changes.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>...
x86: Refine error reporting of MCE injection services
As this service is used by the human monitor, make sure that errors getreported to the right channel, and also raise the verbosity.
This requires to move Monitor typedef in qemu-common.h to resolve the...
x86: Optionally avoid injecting AO MCEs while others are pending
Allow to tell cpu_x86_inject_mce that it should ignore Action OptionalMCE events when the target VCPU is still processing another one. Thiswill be used by KVM soon.
x86: Run qemu_inject_x86_mce on target VCPU
We will use the current TCG-only MCE injection path for KVM as well, andthen this read-modify-write of the target VCPU state has to be performedsynchronously in the corresponding thread.
x86: Fix MCA broadcast parameters for TCG case
When broadcasting MCEs, we need to set MCIP and RIPV in mcg_status likeit is done for KVM. Use the symbolic constants at this chance.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>...
x86: Optionally dump code bytes on cpu_dump_state
Introduce the cpu_dump_state flag CPU_DUMP_CODE and implement it forx86. This writes out the code bytes around the current instructionpointer. Make use of this feature in KVM to help debugging fatal vmexits....
Clean up cpu_inject_x86_mce()
Clean up cpu_inject_x86_mce() for later patch.
Signed-off-by: Jin Dongming <jin.dongming@np.css.fujitsu.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Add "broadcast" option for mce command
When the following test case is injected with mce command, maybe user could notget the expected result. DATA command cpu bank status mcg_status addr misc (qemu) mce 1 1 0xbd00000000000000 0x05 0x1234 0x8c...
Add function for checking mca broadcast of CPU
Add function for checking whether current CPU support mca broadcast.
x86: Filter out garbage from segment flags dump
Only bits 8..23 of the segment flags contain valid data, so only dumpthose when printing the CPU state.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-xxx: Use fprintf_function (format checking)
fprintf_function uses format checking with GCC_FMT_ATTR.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
kvm: x86: add mce support
Port qemu-kvm's MCE support
commit c68b2374c9048812f488e00ffb95db66c0bc07a7Author: Huang Ying <ying.huang@intel.com>Date: Mon Jul 20 10:00:53 2009 +0800
Add MCE simulation support to qemu/kvm
KVM ioctls are used to initialize MCE simulation and inject MCE. The...
MCE: Relay UCR MCE to guest
Port qemu-kvm's
commit 4b62fff1101a7ad77553147717a8bd3bf79df7efAuthor: Huang Ying <ying.huang@intel.com>Date: Mon Sep 21 10:43:25 2009 +0800
UCR (uncorrected recovery) MCE is supported in recent Intel CPUs,...
x86: Fix INIT processing
This fixes a regression of 0e26b7b892: Reset halted also on INIT.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
apic: avoid passing CPUState from CPU code
Pass only APICState when accessing APIC from CPU code.
target-i386: print EFER in cpu_dump_state
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Avi Kivity <avi@redhat.com>
target-i386: Fix compiler warning
With argument checking for cpu_fprintf, gcc throws this warning:
CC i386-softmmu/helper.occ1: warnings being treated as errors/qemu/ar7/target-i386/helper.c: In function ‘cpu_x86_dump_seg_cache’:/qemu/ar7/target-i386/helper.c:220: error: format not a string literal and no format arguments...
Large page TLB flush
QEMU uses a fixed page size for the CPU TLB. If the guest uses largepages then we effectively split these into multiple smaller pages, andpopulate the corresponding TLB entries on demand.
When the guest invalidates the TLB by virtual address we must invalidate...
x86/cpuid: move CPUID functions into separate file
about half of target-i386/helper.c consist of CPUID related functions.Only one of them is a real TCG helper function. So move the wholeCPUID stuff out of this into a separate file to get bettermaintainable parts....
Remove cpu_get_phys_page_debug from userspace emulation
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.
Signed-off-by: Paul Brook <paul@codesourcery.com>
target-i386: fix crash on x86 32bit linux host with hw breakpoint exceptions
If you make use of hw breakpoints on a 32bit x86 linux host, qemuwill segmentation fault when processing the exception.
The problem is that the value of env is stored in $ebp in the op_helper...
Fix OpenBSD linker warning
helper.o(.text+0x11e0): In function `listflags':/src/qemu/target-i386/helper.c:661: warning: sprintf() is often misused, please use snprintf()
Fix i386-bsd-user build
Add cpu model configuration support..
This is a reimplementation of prior versions which addsthe ability to define cpu models for contemporary processors.The added models are likewise selected via -cpu <name>,and are intended to displace the existing convention...
Add KVM paravirt cpuid leaf
Initialize KVM paravirt cpuid leaf and allow user to control guestvisible PV features through -cpu flag.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
MCE: Fix bug of IA32_MCG_STATUS after system reset
Now, if we inject a fatal MCE into guest OS, for example Linux, Linuxwill go panic and then reboot. But if we inject another MCE now,system will reset directly instead of go panic firstly, becauseMCG_STATUS.MCIP is set to 1 and not cleared after reboot. This is does...
Intel CPUs starting from pentium have apic
Intel CPUs starting from pentium have apic. Lets advertise it.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: Update CPUID feature set for TCG
The CPUID features QEMU presented to the guest were not up-to-datewith QEMU's emulated feature set.Add the missing bits of recent (and not so recent) additions toQEMU's emulation engine.For stability reasons only the user mode usable bits are exposed for...
cpuid: Fix multicore setup on Intel
The multicore CPUID code detects whether the guest is an Intel or anAMD CPU, because the Linux kernel is picky about the CmpLegacy bit.KVM by default passes through the host's vendor, which was notcatched by the code. So fork out the vendor determining bits into a...
user: move CPU reset call to main.c for x86/PPC/Sparc
v3: don't call reset functions on cpu initialization
There is absolutely no need to call reset functions when initializingdevices. Since we are already registering them, calling qemu_system_reset()should suffice. Actually, it is what happens when we reboot the machine,...
x86: mce_banks always have the same size
mce_banks is always MCE_BANKS_DEF * 4 in size, value never change
CC: Huang Ying <ying.huang@intel.com>Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
x86: make a20_mask int32_t
This makes the savevm code correct, and sign extensins gives us exactlywhat we need (namely, sign extend to 64 bits when used with 64bit addresess.
Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax....
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
i386: Drop redundant kvm_enabled test
cpu_synchronize_state already does this.
Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there aresome additions and it's not entirely compatible. Because of that, there havebeen conflicts with system headers on BSD systems. Some hacks have beenintroduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...
kvm_arch_get_registers() shouldn't be called directly
Direct call to kvm_arch_get_registers() bypass logic incpu_synchronize_state()