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cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
Where no extra implementation is needed, fall back to CPUClass::set_pc().
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Signed-off-by: Andreas Färber <afaerber@suse.de>
linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user
The functions cpu_clone_regs() and cpu_set_tls() are not purely CPUrelated -- they are specific to the TLS ABI for a a particular OS.Move them into the linux-user/ tree where they belong....
cpu: Turn cpu_unassigned_access() into a CPUState hook
Use it for all targets, but be careful not to pass invalid CPUState.cpu_single_env can be NULL, e.g. on Xen.
Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one stepcloser to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU...
target-microblaze: Move TCG initialization to MicroBlazeCPU initfn
Split off TCG initialization from cpu_mb_init() into mb_tcg_init() tocall it from the initfn.
Ensures that a QOM-created MicroBlazeCPU is usable.
target-microblaze: Mark as unmigratable
cpu_{save,load} were no-ops, so de facto it is unmigratable and nobackwards compatibility to keep. Therefore mark the MicroBlazeCPU asunmigratable at device level the QOM way and suppress "cpu_common" VMState registration by dropping CPU_SAVE_VERSION....
target-microblaze: Drop unused cpu_mb_close() prototype
Such a function never existed.
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
fpu: move public header file to include/fpu
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
exec: move include files to include/exec/
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>[AF: Updated new target-openrisc function accordingly]...
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
microblaze: Support setting of TLS ptr
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
target-microblaze: Let cpu_mb_init() return MicroBlazeCPU
Since qemu_init_vcpu() is no-op for CONFIG_USER_ONLY drop the envvariable that is now unused there.
Turn cpu_init macro into a static inline function returning CPUMBStatefor backwards compatibility....
target-microblaze: lwx/swx: first implementation
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
target-microblaze: QOM'ify CPU
Embed CPUMBState as first member of QOM MicroBlazeCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber <afaerber@suse.de>Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>...
target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef
Commit 9b9a970a23625de4ae6b7461906a9a0d98d3ca95(target-lm32/microblaze: Typedef struct CPU{MB,LM32}State)introduced necessary typedefs for cpu_mmu_index() and mmu.hrespectively.
On some GCC versions this leads to "error: redefinition of typedef"....
Rename CPUState -> CPUArchState
Scripted conversion: for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done...
target-microblaze: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUMBState/g" target-microblaze/*.[hc] sed -i "s/#define CPUMBState/#define CPUState/" target-microblaze/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
target-lm32/microblaze: Typedef struct CPU{MB,LM32}State
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
target-microblaze: Clean includes
The change in cpu.h is needed when HOST_LONG_BITS is defined in qemu-common.h.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
microblaze: Emulate the hw stackprotector
fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net>Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Alexander Graf <agraf@suse.de>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Blue Swirl <blauwirbel@gmail.com>...
microblaze: Add an MSR_PVR constant and use it.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
Fix unassigned memory access handling
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memoryaccess handling. Fix them by always passing CPUState to the handlers.
Reported-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This isneeded by later patches.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
irq: Privatize CPU_INTERRUPT_NMI.
This interrupt name is used by i386, CRIS, and MicroBlaze.Copy the name into each target.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
microblaze: Add stream-insn related constants
Based on a patch from: Alejandro Cabrera <aldaya@gmail.com>
microblaze: Add constant for exception-code mask
microblaze: Correct MMU_ZONES mask
Signed-off-by: Alejandro Cabrera <aldaya@gmail.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Add PVR for writeback cache, endians
Specify PVR for writeback cache, endians and others.
Signed-off-by: Michal Simek <monstr@monstr.eu>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
microblaze: Add basic FPU emulation
microblaze: Add definitions for FSR reg fields
remove exec-all.h inclusion from cpu.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
move cpu_pc_from_tb to target-*/exec.h
microblaze: Make MSR_UM and MSR_VM part of the tb flags
microblaze: Update elf machine nums.
189 was allocated in upstream binutils.
0xbaab was the old temporary value. Still used by some tools and thelinux kernel.
I've seen 115 in older gdb versions, but lets ignore that one.
Target specific usermode cleanup
Disable various target specific code that is only relevant to system emulation.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.
Removes a set of ifdefs from exec.c.
Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets otherthan Alpha. This will be used for page_find_alloc, which issupposed to be using virtual addresses in the first place....
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
microblaze: Trap on bus accesses to unmapped areas.
microblaze: Add infrastructure for supporting hw exceptions.
cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal
handle_cpu_signal is very nearly copy-paste code for each target, with afew minor variations. This patch sets up appropriate defaults for ageneric handle_cpu_signal and provides overrides for particular targets...
Update to a hopefully more future proof FSF address
microblaze: Add translation routines.