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cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
Prepares for changing cpu_single_step() argument to CPUState.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Signed-off-by: Andreas Färber <afaerber@suse.de>
log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turncpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is nolonger needed.
Add documentation and make the functions available through qemu/log.h...
target-microblaze: Change gen_intermediate_code_internal() argument types
Use MicroBlazeCPU and bool.
Prepares for changing log_cpu_state() argument to CPUState and formoving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>...
target-microblaze: gen_intermediate_code_internal() should be inlined
Cc: qemu-stable@nongnu.orgReported-by: Richard Henderson <rth@twiddle.net>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
Make cpustats monitor command available unconditionally.
Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec()arguments to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
microblaze: Add support for the sleep insn
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
The gen_icount_start/end functions are now somewhat misnamed since theyare useful for generic "start/end of TB" code, used for more than justicount. Rename them to gen_tb_start/end.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
qemu-log: Remove qemu_log_try_set_file() and its users
Remove the function qemu_log_try_set_file() and its users (whichare all in TCG code generation functions for various targets).This function was added to abstract out code which was originallywritten as "if (!logfile) logfile = stderr;" in order that BUG:...
target-microblaze: Move TCG initialization to MicroBlazeCPU initfn
Split off TCG initialization from cpu_mb_init() into mb_tcg_init() tocall it from the initfn.
Ensures that a QOM-created MicroBlazeCPU is usable.
target-microblaze: Introduce QOM realizefn for MicroBlazeCPU
Introduce realizefn and set realized = true from cpu_mb_init().
exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
build: kill libdis, move disassemblers to disas/
TCG: Use gen_opc_instr_start from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG: Use gen_opc_pc from context instead of global variable.
TCG: Use gen_opc_icount from context instead of global variable.
TCG: Use gen_opc_buf from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG: Use gen_opc_ptr from context instead of global variable.
disas: avoid using cpu_single_env
Pass around CPUArchState instead of using global cpu_single_env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Richard Henderson <rth@twiddle.net>Acked-by: Aurelien Jarno <aurelien@aurel32.net>Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
microblaze: translate.c: Fix swaph decoding
The swaph instruction was not decoding correctly. s/1e1/1e2 on the9 LSBs on the instruction decode.
Reported-by: David Holsgrove <david.holsgrove@xilinx.com>Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
For all targets that currently call tcg_gen_debug_insn_start,add CPU_LOG_TB_OP_OPT to the condition that gates it.
This is useful for comparing optimization dumps, when thepre-optimization dump is merely noise....
target-microblaze: switch to AREG0 free mode
Add an explicit CPUState parameter instead of relying on AREG0and switch to AREG0 free mode.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Alexander Graf <agraf@suse.de>
target-microblaze: fix swx build breakage
The lazy initialisation of r_check was throwing an error on --enable-debug.Removed the lazy initialisation of r_check and swx_addr.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Kill off cpu_state_reset()
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()that would operate on QOM objects.
All callers have been updated except for one in target-mips, so drop all...
target-microblaze: Let cpu_mb_init() return MicroBlazeCPU
Since qemu_init_vcpu() is no-op for CONFIG_USER_ONLY drop the envvariable that is now unused there.
Turn cpu_init macro into a static inline function returning CPUMBStatefor backwards compatibility....
target-microblaze: lwx/swx: first implementation
target-microblaze: impelemented swapx instructions
Implemented the swapb and swaph byte/halfword reversal instructions addedto microblaze v8.30
target-microblaze: QOM'ify CPU
Embed CPUMBState as first member of QOM MicroBlazeCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber <afaerber@suse.de>Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>...
target-microblaze: QOM'ify CPU reset
Move code from cpu_state_reset() to QOM mb_cpu_reset().
Signed-off-by: Andreas Färber <afaerber@suse.de>Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
target-microblaze: QOM'ify CPU init
Move code from cpu_mb_init() to a QOM initfn.
Signed-off-by: Andreas Färber <afaerber@suse.de>Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>[AF: Leave cpu_reset() call in cpu_mb_init()]
target-microblaze: added PetaLogix copyright
Microblaze cpu development has been driven and funded by PetaLogix. Added (c)PetaLogix line accordingly.
target-microblaze: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUMBState/g" target-microblaze/*.[hc] sed -i "s/#define CPUMBState/#define CPUState/" target-microblaze/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).
Don't hide the parameter type behind explicit casts, use staticfunctions with strongly typed argument to indirect.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
target-microblaze: Clean includes
The change in cpu.h is needed when HOST_LONG_BITS is defined in qemu-common.h.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
microblaze: Break the tb at memory barriers
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Add support for the clz insn
microblaze: Emulate the hw stackprotector
fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net>Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Alexander Graf <agraf@suse.de>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Blue Swirl <blauwirbel@gmail.com>...
microblaze: Make the MSR PVR bit non writable
Instead of hardcoding it to 1.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
microblaze: Add an MSR_PVR constant and use it.
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
microblaze: Add missing call to qemu_init_vcpu.
Fixes emulation with io-thread.
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commitd2856f1ad4c259e5766847c49acbb4e390731bd4.The only reason for parameter searched_pc wasa debug statement in target-i386/translate.c....
microblaze: Add partial decoding of stream insns
Based on a patch from: Alejandro Cabrera <aldaya@gmail.com>
Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,so the type casts of pointer to long should be replaced bytype casts of pointer to tcg_target_long (suggested by Blue Swirl).
These changes are needed for build environments where...
Fix trivial "endianness bugs"
Replace endianess -> endianness.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
microblaze: Handle singlestepping over direct jmps
microblaze: cleanup helper_addkc
Remove unused addition and rename to helper_carry.
microblaze: Improve subkc
Move code from the helper into the translator. The remaininghelper parts can reuse helper_addkc, making it possible toremove helper_subkc entirely.
microblaze: Fix 3rd addkc arg when rd is r0
microblaze: Improve addkc
microblaze: Remove debug leftovers.
No functional changes.
microblaze: Reorganize for future patches
microblaze: Add support for load/store reversed
Load/store reversed (lwr/swr) are insns that endian translatethe sub-word part of the address and byteswap the data lanes.
microblaze: Tweak comment, fast cases -> common cases
microblaze: Improve unconditional direct branching
Avoid emitting conditional tcg operations for uncoditionaldirect branches.
microblaze: Use more TB chaining
For some workloads with tight loops this ~doubles the emulationspeed.
target-xxx: Use fprintf_function (format checking)
fprintf_function uses format checking with GCC_FMT_ATTR.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
target-microblaze: Use %td for ptrdiff_t arguments in debug message
According to ISO/IEC 9899:1999 7.19.6.1,the correct length modifier for ptrdiff_t is 't', not 'z'.
Cc: Blue Swirl <blauwirbel@gmail.com>Cc: Markus Armbruster <armbru@redhat.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
microblaze: Add basic FPU emulation
microblaze: Remove unused members from the disas context
microblaze: Speed up base + index addressing mode
Speed up reg + reg addressing mode when any of the regs is r0.
microblaze: Use setcond for conditional branches
Use setcond for evaluating the condition for branches.In the future, we could do better for branches withoutdelay slots.
microblaze: Improve branch with small immediates
Slight improvements of conditional branches with smallimmediate offsets.
microblaze: Improve brk emulation.
brk insns while in user mode raise priv insn exceptions.This commit makes gdbserver work on linux guests.
microblaze: Print content of EAR register
I need to see EAR register in output because I need to parse irqsoff problem.
Signed-off-by: Michal Simek <monstr@monstr.eu>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Update debug logs.
microblaze: Handle wdc flush and clear.
microblaze: Correct branch to registers.
microblaze: Unbreak reset.
Initialize synthesis config registers at reset to cope with the newcpu_reset sequences.
gcc wants 1st static and then const
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there aresome additions and it's not entirely compatible. Because of that, there havebeen conflicts with system headers on BSD systems. Some hacks have beenintroduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...
microblaze: Trap if QEMU finds an unknown insns.
If PVR settings enable illegal insn trap, trap when QEMU finds aninsn it knows nothing about.
microblaze: Correct prio between MMU and unaligned exceptions.
The microblaze gives MMU faults priority. For stores we stillhave a flaw that the value leaks to memory in the case of anunaligned exception.
microblaze: HW Exception fixes.
microblaze: Trap on illegal load/store sizes.
microblaze: Compute masks for alignment checks at translation time.
Thanks to Blue Swirl for reporting.Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: MMU shows more respect to synthesis config.
The microblaze MMU can be synthesized in different configurations.Have the MMU model show more respect to the chosen configuration.
microblaze: Trap on unaligned data accesses.
Untested...
microblaze: Trap on divizions by zero.
microblaze: Correct mfs into r0.
microblaze: Catch illegal insns and privilege violations.
Raise illegal instruction exceptions when executing instructions thatrequire units not available on the particulare microblaze configuration.
Also trap priviliege violations made by userspace.
Update to a hopefully more future proof FSF address
microblaze: Add translation routines.