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log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turncpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is nolonger needed.
Add documentation and make the functions available through qemu/log.h...
target-ppc: Change LOG_MMU_STATE() argument to CPUState
Choose CPUState rather than PowerPCCPU since doing a CPU cast on themacro argument would hide type mismatches.
Signed-off-by: Andreas Färber <afaerber@suse.de>
kvm: Change cpu_synchronize_state() argument to CPUState
Change Monitor::mon_cpu to CPUState as well.
Reviewed-by: liguang <lig.fnst@cn.fujitsu.com>Acked-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
mmu-hash*: Correctly mask RPN from hash PTE
BEHAVIOUR CHANGE
At present we take the whole of word 1 of the hash PTE as the real pagenumber used to calculate the translated address. This is incorrect,because it leaves the flags from the low bits of PTE word 1 in place in the...
mmu-hash*: Don't use full ppc_hash{32, 64}_translate() path for get_phys_page_debug()
Currently the hash mmu versionsof get_phys_page_debug() use the sameppc64_hash64_translate() function to do the translation logic as the normalmm fault handler code....
mmu-hash*: Merge translate and fault handling functions
ppc_hash{32,64}_handle_mmu_fault() is now the only caller ofppc_hash{32,64{_translate(), so this patch combines them together. Thismeans that instead of one returning a variety of non-obvious error codes...
mmu-hash64: Implement Virtual Page Class Key Protection
Version 2.06 of the Power architecture describes an additional pageprotection mechanism. Each virtual page has a "class" (0-31) recorded inthe PTE. The AMR register contains bits which can prohibit reads and/or...
mmu-hash*: Don't update PTE flags when permission is denied
Currently if ppc_hash{32,64}_translate() finds a PTE matching the givenvirtual address, it will always update the PTE's R & C (Referenced andChanged) bits. This happens even if the PTE's permissions mean we are...
mmu-hash*: Clean up permission checking
Currently checking of PTE permission bits is split messily amongstppc_hash{32,64}_pp_check(), ppc_hash{32,64}_check_prot() and their callers.This patch cleans this up to have the new functionppc_hash{32,64}_pte_prot() compute the page permissions from the SLBE (for...
mmu-hash64: Factor SLB N bit into permissions bits
Currently, for 64-bit hash mmu, the execute protection bit placed into theqemu tlb is based only on the N (No execute) bit from the PTE. However,No Execute can also be set at the segment level. We do check this on...
mmu-hash*: Clean up PTE flags update
Currently the ppc_hash{32,64}_pte_update_flags() helper functions update aPTE's referenced and changed bits as necessary to reflect the access. Itis somewhat long winded, though. This patch open codes them in their...
mmu-hash*: Clean up real address calculation
More recent 64-bit hash MMUs support multiple page sizes, and PTEs forlarge pages only include the offset of the whole large page. But the qemutlb only handles pages of the base size (4k) so we need to break up the...
mmu-hash*: Fold pte_check*() logic into caller
With previous cleanups made, the 32-bit and 64-bit pte_check*() functionsare pretty trivial and only have one call site. This patch thereforeclarifies the overall code flow by folding those functions into their...
mmu-hash*: Don't keep looking for PTEs after we find a match
The ppc hash mmu hashes each virtual address to a primary and secondarypossible hash bucket (aka PTE group or PTEG) each with 8 PTEs. Then weneed a linear search through the PTEs to find the correct one for the...
mmu-hash*: Separate PTEG searching from permissions checking
find_pte{32,64{() do several things. First they search through a PTEGooking for a PTE matching our virtual address. Then they do permissionschecking and other processing on that PTE.
This patch separates the search by VA out from the rest. The search is...
mmu-hash*: Make find_pte{32, 64} do more of the job of finding ptes
find_pte{32,64}() are not particularly well named. They only "find" a PTEwithin a given PTE group, and they also do permissions checking and otherthings.
This patch makes it somewhat close to matching the name, by folding the...
mmu-hash*: Remove permission checking from find_pte{32, 64}()
find_pte{32,64}() are poorly named, since they both find a PTE and dopermissions checking of it. This patch makes them only locate a matchingPTE, moving the permission checking and other logic to the caller. We...
mmu-hash64: Clean up ppc_hash64_htab_lookup()
This patch makes a general cleanup of the address mangling logic inppc_hash64_htab_lookup(). In particular it now avoids repeatedly switchingon the segment size. The lack of SLB and multiple segment sizes on 32-bit...
mmu-hash*: Reduce use of access_type
In ppc env->access_type is updated by e.g. integer load/stores withACCESS_INT floating point load/stores with ACCESS_FLOAT and so forth. Inhash mmu fault paths it can also b set to ACCESS_CODE for instructionfetch accesses....
mmu-hash64: Remove nx from mmu_ctx_hash64
The nx field in mmu_ctx_hash64 is used in two different functions. But itsused for slightly different things in each place, and the value is neverpropagated between them. In other words, it might as well be two local...
mmu-hash*: Remove eaddr field from mmu_ctx_hash{32, 64}
The eaddr field of mmu_ctx_hash{32,64} is effectively just used to pass theeffective address from get_segment{32,64}() to find_pte{32,64}(). Justpass it as a normal parameter instead.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>...
mmu-hash*: Combine ppc_hash{32, 64}_get_physical_address and get_segment{32, 64}()
After previous work, ppc_hash{32,64}_get_physical_address() are almosttrivial wrappers around get_segment{32,64}() which does nearly all the work oftranslating an address according to the hash mmu model. Therefore combine the...
mmu-hash*: Cleanup segment-level NX check
On the ppc hash mmus, no-execute can be set at the segment level (on morerecent 64-bit hash mmus it can also be set at the page level). This patchseparates out this check to make it clearer what is going on, and avoiding...
target-ppc: Disentangle hash mmu versions of cpu_get_phys_page_debug()
cpu_get_phys_page_debug() is a trivial wrapper aroundget_physical_address(). But even the signature ofget_physical_address() has some things we'd like to clean up on aper-mmu basis, so this patch moves the test on mmu model out to...
target-ppc: Disentangle hash mmu helper functions
The newly separated paths for hash mmus rely on several helper functionswhich are still shared with 32-bit hash mmus: pp_check(), check_prot() andpte_update_flags(). While these don't have ugly ifdefs on the mmu type,...
target-ppc: Don't share get_pteg_offset() between 32 and 64-bit
The get_pteg_offset() helper function is currently shared between 32-bitand 64-bit hash mmus, taking a parameter for the hash pte size. In the64-bit paths, it's only called in one place, and it's a trivial...
target-ppc: mmu_ctx_t should not be a global type
mmu_ctx_t is currently defined in cpu.h. However it is used for temporaryinformation relating to mmu translation, and is only used in mmu_helper.cand (now) mmu-hash{32,64}.c. Furthermore it contains information which...
mmu-hash*: Add header file for definitions
Currently cpu.h contains a number of definitions relating to the 64-bithash MMU. Some are used in the MMU emulation code, but some are only usedin the spapr MMU management hcall implementations.
This patch moves these definitions (except for a few that are needed...
mmu-hash*: Add hash pte load/store helpers
On real hardware the ppc hash page table is stored in memory; accordinglyour mmu emulation code can read a hash page table in guest memory. But,when paravirtualized under PAPR, the real hash page table is in host...
target-ppc: Disentangle pte_check()
Currently support for both 32-bit and 64-bit hash MMUs share animplementation of pte_check. But there are enough differences that thismeans the shared function has several very ugly conditionals on "is_64b".
This patch cleans things up by separating out the 64-bit version...
target-ppc: Disentangle find_pte()
32-bit and 64-bit hash MMU implementations currently share a find_ptefunction. This results in a whole bunch of ugly conditionals in the sharedfunction, and not all that much actually shared code.
This patch separates out the 32-bit and 64-bit versions, putting then...
target-ppc: Disentangle get_segment()
The poorly named get_segment() function handles most of the addresstranslation logic for hash-based MMUs. It has many ugly conditionals onwhether the MMU is 32-bit or 64-bit.
This patch splits the function into 32 and 64-bit versions, using the...
target-ppc: Disentangle get_physical_address() paths
Depending on the MSR state, for 64-bit hash MMUs, get_physical_addresscan either call check_physical (which has further tests for mmu type)or get_segment64. Similarly for 32-bit hash MMUs we can either call...
target-ppc: Disentangle hash mmu paths for cpu_ppc_handle_mmu_fault
cpu_ppc_handle_mmu_fault() calls get_physical_address() (whose behaviourdepends on MMU type) then, if that fails, issues an appropriate exception- which again has a number of dependencies on MMU type....
target-ppc: Move SLB handling into a mmu-hash64.c
As a first step to disentangling the handling for 64-bit hash MMUs fromthe rest, we move the code handling the Segment Lookaside Buffer (SLB)(which only exists on 64-bit hash MMUs) into a new mmu-hash64.c file....