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cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
Signed-off-by: Andreas Färber <afaerber@suse.de>
exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
exec: refactor cpu_restore_state
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sh4: implement addv and subv using TCG
addv and subv helpers implementation is directly copied from the SH4manual and looks quite complex. It is however possible to explain itwithout branches, and is therefore possible to implement it with TCG....
target-sh4: rework exceptions handling
Since commit fd4bab102 PC is restored in case of exception through coderetranslation. While it is clearly the thing to do in case it is notnot known if an helper is going to trigger an exception or not(e.g. for load/store, FPU, etc.), it just make things slower when the...
target-sh4: use float32_muladd() to implement fmac
There is no need to add a SH4 specific pickNaNMulAdd() to softfloat asSH4 is always returning a default NaN.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-sh4: implement addc and subc using TCG
Now that setcond is available, the addc and subc can easily beimplemented using TCG.
target-sh4: switch to AREG0 free mode
Add an explicit CPUState parameter instead of relying on AREG0and switch to AREG0 free mode.
Acked-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long inseveral op related functions, env->mem_io_pc andGETPC macro.
Reviewed-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sh4: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUSH4State/g" target-sh4/*.[hc] sed -i "s/#define CPUSH4State/#define CPUState/" target-sh4/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture localcpu_single_env hacks.
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relyingon global env.
Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.Is is now unused, so remove it.
Cc: Aurelien Jarno <aurelien@aurel32.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Weil <weil@mail.berlios.de>
target-sh4: get rid of CPU_{Float,Double}U
SH4 is always using softfloat, so it's possible to have helpers directlytaking float32 or float64 value. This allow to get rid of conversionsthrough CPU_{Float,Double}U.
target-sh4: move intr_at_halt out of cpu_halted()
All targets except SH4 have the same cpu_halted() routine, and it hasonly one caller. It is therefore a good candidate for inlining.
The difference is the handling of the intr_at_halt, which is necessary...
target-sh4: implement negc using TCG
Using setcond it's now possible to generate a relatively short negcinstruction in TCG.
target-sh4: define FPSCR constants
Define FPSCR constants for all field and use them instead of hardcodedvalues.
target-sh4: implement flush-to-zero
When the FPSCR.DN bit is set, the SH4 FPU treat denormalized numbers aszero. Enable the corresponding softfloat option when this bit is set.
target-sh4: implement FPU exceptions
FPU exception support where not implemented on SH4. Implement them byclearing the softfloat exceptions flags before an FP instruction (theSH4 FPU also clear them before an instruction), and calling a functionto update the FPSCR register after an FP instruction. This function...
target-sh4: add fipr instruction
Add the fipr FVm,FVn instruction, which computes the inner products ofa 4-dimensional single precision floating-point vector.
target-sh4: add ftrv instruction
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-columnmatrix XMTRX by the 4-dimensional vector FVn.
target-sh4: optimize exceptions
As exception is not the normal path, don't bother saving PC, beforeraising one, instead rely on code retranslation to get the CPU state.
Replace assert(0) with abort() or cpu_abort()
When building with -DNDEBUG, assert(0) will not stop executionso it must not be used for abnormal termination.
Use cpu_abort() when in CPU context, abort() otherwise.
Fix Sparse warnings about using plain integer as NULL pointer
Update to a hopefully more future proof FSF address
SH: Improve movca.l/ocbi emulation.
Author: Vladimir Prus <vladimir@codesourcery.com>
Fix movcal.l/ocbi emulation.
sh4: Add FMAC instruction support
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>Signed-off-by: Lionel Landwerlin <lionel.landwerlin@openwide.fr>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6309 c046a42c-6fe2-441c-8c8c-71466251a162
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
SH4: Implement FD bit
SH4 manual say that if a floating point instruction is executed whileFD bit in the status register is 1, an exception should be raised. QEMUpresently does not do that, so the kernel does not initialize FP statefor any thread, nor does it save/restore FP state. The most apparent...
target-sh4: use CPU_Float/CPU_Double instead of ugly casts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5757 c046a42c-6fe2-441c-8c8c-71466251a162
TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: sleep instruction bug fix
fix a bug on 'sleep' instruction, which have caused halt of idle task.As i386 'hlt' instruction does, it should save PC before sleep.
(Shin-ichiro KAWASAKI)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5220 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: final conversion to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5125 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: convert floating-point ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5124 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: Convert remaining non-fp ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5120 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: convert control/status register load/store to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5118 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: convert some more arithmetics ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5116 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: convert a few helpers to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5112 c046a42c-6fe2-441c-8c8c-71466251a162
Fix off-by-one unwinding error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
SH4 MMU improvements
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4396 c046a42c-6fe2-441c-8c8c-71466251a162
Adjust s390 addresses (the MSB is defined as "to be ignored").
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
Replace is_user variable with mmu_idx in softmmu core, allowing support of more than 2 mmu access modes.Add backward compatibility is_user variable in targets code when needed.Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions....
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Clean up of some target specifics in exec.c/cpu-exec.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
Remove debug output.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1990 c046a42c-6fe2-441c-8c8c-71466251a162
sh4 target (Samuel Tardieu)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1861 c046a42c-6fe2-441c-8c8c-71466251a162