root / include / qom / cpu.h @ 5b50e790
History | View | Annotate | Download (14.9 kB)
1 |
/*
|
---|---|
2 |
* QEMU CPU model
|
3 |
*
|
4 |
* Copyright (c) 2012 SUSE LINUX Products GmbH
|
5 |
*
|
6 |
* This program is free software; you can redistribute it and/or
|
7 |
* modify it under the terms of the GNU General Public License
|
8 |
* as published by the Free Software Foundation; either version 2
|
9 |
* of the License, or (at your option) any later version.
|
10 |
*
|
11 |
* This program is distributed in the hope that it will be useful,
|
12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
14 |
* GNU General Public License for more details.
|
15 |
*
|
16 |
* You should have received a copy of the GNU General Public License
|
17 |
* along with this program; if not, see
|
18 |
* <http://www.gnu.org/licenses/gpl-2.0.html>
|
19 |
*/
|
20 |
#ifndef QEMU_CPU_H
|
21 |
#define QEMU_CPU_H
|
22 |
|
23 |
#include <signal.h> |
24 |
#include "hw/qdev-core.h" |
25 |
#include "exec/hwaddr.h" |
26 |
#include "qemu/thread.h" |
27 |
#include "qemu/tls.h" |
28 |
#include "qemu/typedefs.h" |
29 |
|
30 |
typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque); |
31 |
|
32 |
/**
|
33 |
* vaddr:
|
34 |
* Type wide enough to contain any #target_ulong virtual address.
|
35 |
*/
|
36 |
typedef uint64_t vaddr;
|
37 |
#define VADDR_PRId PRId64
|
38 |
#define VADDR_PRIu PRIu64
|
39 |
#define VADDR_PRIo PRIo64
|
40 |
#define VADDR_PRIx PRIx64
|
41 |
#define VADDR_PRIX PRIX64
|
42 |
#define VADDR_MAX UINT64_MAX
|
43 |
|
44 |
/**
|
45 |
* SECTION:cpu
|
46 |
* @section_id: QEMU-cpu
|
47 |
* @title: CPU Class
|
48 |
* @short_description: Base class for all CPUs
|
49 |
*/
|
50 |
|
51 |
#define TYPE_CPU "cpu" |
52 |
|
53 |
#define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
|
54 |
#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
|
55 |
#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
|
56 |
|
57 |
typedef struct CPUState CPUState; |
58 |
|
59 |
typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr, |
60 |
bool is_write, bool is_exec, int opaque, |
61 |
unsigned size);
|
62 |
|
63 |
struct TranslationBlock;
|
64 |
|
65 |
/**
|
66 |
* CPUClass:
|
67 |
* @class_by_name: Callback to map -cpu command line model name to an
|
68 |
* instantiatable CPU type.
|
69 |
* @reset: Callback to reset the #CPUState to its initial state.
|
70 |
* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
|
71 |
* @do_interrupt: Callback for interrupt handling.
|
72 |
* @do_unassigned_access: Callback for unassigned access handling.
|
73 |
* @memory_rw_debug: Callback for GDB memory access.
|
74 |
* @dump_state: Callback for dumping state.
|
75 |
* @dump_statistics: Callback for dumping statistics.
|
76 |
* @get_arch_id: Callback for getting architecture-dependent CPU ID.
|
77 |
* @get_paging_enabled: Callback for inquiring whether paging is enabled.
|
78 |
* @get_memory_mapping: Callback for obtaining the memory mappings.
|
79 |
* @set_pc: Callback for setting the Program Counter register.
|
80 |
* @synchronize_from_tb: Callback for synchronizing state from a TCG
|
81 |
* #TranslationBlock.
|
82 |
* @get_phys_page_debug: Callback for obtaining a physical address.
|
83 |
* @gdb_read_register: Callback for letting GDB read a register.
|
84 |
* @gdb_write_register: Callback for letting GDB write a register.
|
85 |
* @vmsd: State description for migration.
|
86 |
* @gdb_num_core_regs: Number of core registers accessible to GDB.
|
87 |
*
|
88 |
* Represents a CPU family or model.
|
89 |
*/
|
90 |
typedef struct CPUClass { |
91 |
/*< private >*/
|
92 |
DeviceClass parent_class; |
93 |
/*< public >*/
|
94 |
|
95 |
ObjectClass *(*class_by_name)(const char *cpu_model); |
96 |
|
97 |
void (*reset)(CPUState *cpu);
|
98 |
int reset_dump_flags;
|
99 |
void (*do_interrupt)(CPUState *cpu);
|
100 |
CPUUnassignedAccess do_unassigned_access; |
101 |
int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
|
102 |
uint8_t *buf, int len, bool is_write); |
103 |
void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
|
104 |
int flags);
|
105 |
void (*dump_statistics)(CPUState *cpu, FILE *f,
|
106 |
fprintf_function cpu_fprintf, int flags);
|
107 |
int64_t (*get_arch_id)(CPUState *cpu); |
108 |
bool (*get_paging_enabled)(const CPUState *cpu); |
109 |
void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
|
110 |
Error **errp); |
111 |
void (*set_pc)(CPUState *cpu, vaddr value);
|
112 |
void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); |
113 |
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); |
114 |
int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg); |
115 |
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); |
116 |
|
117 |
int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
|
118 |
int cpuid, void *opaque); |
119 |
int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
|
120 |
void *opaque);
|
121 |
int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
|
122 |
int cpuid, void *opaque); |
123 |
int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
|
124 |
void *opaque);
|
125 |
|
126 |
const struct VMStateDescription *vmsd; |
127 |
int gdb_num_core_regs;
|
128 |
} CPUClass; |
129 |
|
130 |
struct KVMState;
|
131 |
struct kvm_run;
|
132 |
|
133 |
/**
|
134 |
* CPUState:
|
135 |
* @cpu_index: CPU index (informative).
|
136 |
* @nr_cores: Number of cores within this CPU package.
|
137 |
* @nr_threads: Number of threads within this CPU.
|
138 |
* @numa_node: NUMA node this CPU is belonging to.
|
139 |
* @host_tid: Host thread ID.
|
140 |
* @running: #true if CPU is currently running (usermode).
|
141 |
* @created: Indicates whether the CPU thread has been successfully created.
|
142 |
* @interrupt_request: Indicates a pending interrupt request.
|
143 |
* @halted: Nonzero if the CPU is in suspended state.
|
144 |
* @stop: Indicates a pending stop request.
|
145 |
* @stopped: Indicates the CPU has been artificially stopped.
|
146 |
* @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
|
147 |
* CPU and return to its top level loop.
|
148 |
* @singlestep_enabled: Flags for single-stepping.
|
149 |
* @env_ptr: Pointer to subclass-specific CPUArchState field.
|
150 |
* @current_tb: Currently executing TB.
|
151 |
* @gdb_regs: Additional GDB registers.
|
152 |
* @gdb_num_regs: Number of total registers accessible to GDB.
|
153 |
* @next_cpu: Next CPU sharing TB cache.
|
154 |
* @kvm_fd: vCPU file descriptor for KVM.
|
155 |
*
|
156 |
* State of one CPU core or thread.
|
157 |
*/
|
158 |
struct CPUState {
|
159 |
/*< private >*/
|
160 |
DeviceState parent_obj; |
161 |
/*< public >*/
|
162 |
|
163 |
int nr_cores;
|
164 |
int nr_threads;
|
165 |
int numa_node;
|
166 |
|
167 |
struct QemuThread *thread;
|
168 |
#ifdef _WIN32
|
169 |
HANDLE hThread; |
170 |
#endif
|
171 |
int thread_id;
|
172 |
uint32_t host_tid; |
173 |
bool running;
|
174 |
struct QemuCond *halt_cond;
|
175 |
struct qemu_work_item *queued_work_first, *queued_work_last;
|
176 |
bool thread_kicked;
|
177 |
bool created;
|
178 |
bool stop;
|
179 |
bool stopped;
|
180 |
volatile sig_atomic_t exit_request;
|
181 |
volatile sig_atomic_t tcg_exit_req;
|
182 |
uint32_t interrupt_request; |
183 |
int singlestep_enabled;
|
184 |
|
185 |
void *env_ptr; /* CPUArchState */ |
186 |
struct TranslationBlock *current_tb;
|
187 |
struct GDBRegisterState *gdb_regs;
|
188 |
int gdb_num_regs;
|
189 |
CPUState *next_cpu; |
190 |
|
191 |
int kvm_fd;
|
192 |
bool kvm_vcpu_dirty;
|
193 |
struct KVMState *kvm_state;
|
194 |
struct kvm_run *kvm_run;
|
195 |
|
196 |
/* TODO Move common fields from CPUArchState here. */
|
197 |
int cpu_index; /* used by alpha TCG */ |
198 |
uint32_t halted; /* used by alpha, cris, ppc TCG */
|
199 |
}; |
200 |
|
201 |
extern CPUState *first_cpu;
|
202 |
|
203 |
DECLARE_TLS(CPUState *, current_cpu); |
204 |
#define current_cpu tls_var(current_cpu)
|
205 |
|
206 |
/**
|
207 |
* cpu_paging_enabled:
|
208 |
* @cpu: The CPU whose state is to be inspected.
|
209 |
*
|
210 |
* Returns: %true if paging is enabled, %false otherwise.
|
211 |
*/
|
212 |
bool cpu_paging_enabled(const CPUState *cpu); |
213 |
|
214 |
/**
|
215 |
* cpu_get_memory_mapping:
|
216 |
* @cpu: The CPU whose memory mappings are to be obtained.
|
217 |
* @list: Where to write the memory mappings to.
|
218 |
* @errp: Pointer for reporting an #Error.
|
219 |
*/
|
220 |
void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
|
221 |
Error **errp); |
222 |
|
223 |
/**
|
224 |
* cpu_write_elf64_note:
|
225 |
* @f: pointer to a function that writes memory to a file
|
226 |
* @cpu: The CPU whose memory is to be dumped
|
227 |
* @cpuid: ID number of the CPU
|
228 |
* @opaque: pointer to the CPUState struct
|
229 |
*/
|
230 |
int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
|
231 |
int cpuid, void *opaque); |
232 |
|
233 |
/**
|
234 |
* cpu_write_elf64_qemunote:
|
235 |
* @f: pointer to a function that writes memory to a file
|
236 |
* @cpu: The CPU whose memory is to be dumped
|
237 |
* @cpuid: ID number of the CPU
|
238 |
* @opaque: pointer to the CPUState struct
|
239 |
*/
|
240 |
int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
|
241 |
void *opaque);
|
242 |
|
243 |
/**
|
244 |
* cpu_write_elf32_note:
|
245 |
* @f: pointer to a function that writes memory to a file
|
246 |
* @cpu: The CPU whose memory is to be dumped
|
247 |
* @cpuid: ID number of the CPU
|
248 |
* @opaque: pointer to the CPUState struct
|
249 |
*/
|
250 |
int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
|
251 |
int cpuid, void *opaque); |
252 |
|
253 |
/**
|
254 |
* cpu_write_elf32_qemunote:
|
255 |
* @f: pointer to a function that writes memory to a file
|
256 |
* @cpu: The CPU whose memory is to be dumped
|
257 |
* @cpuid: ID number of the CPU
|
258 |
* @opaque: pointer to the CPUState struct
|
259 |
*/
|
260 |
int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
|
261 |
void *opaque);
|
262 |
|
263 |
/**
|
264 |
* CPUDumpFlags:
|
265 |
* @CPU_DUMP_CODE:
|
266 |
* @CPU_DUMP_FPU: dump FPU register state, not just integer
|
267 |
* @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
|
268 |
*/
|
269 |
enum CPUDumpFlags {
|
270 |
CPU_DUMP_CODE = 0x00010000,
|
271 |
CPU_DUMP_FPU = 0x00020000,
|
272 |
CPU_DUMP_CCOP = 0x00040000,
|
273 |
}; |
274 |
|
275 |
/**
|
276 |
* cpu_dump_state:
|
277 |
* @cpu: The CPU whose state is to be dumped.
|
278 |
* @f: File to dump to.
|
279 |
* @cpu_fprintf: Function to dump with.
|
280 |
* @flags: Flags what to dump.
|
281 |
*
|
282 |
* Dumps CPU state.
|
283 |
*/
|
284 |
void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
|
285 |
int flags);
|
286 |
|
287 |
/**
|
288 |
* cpu_dump_statistics:
|
289 |
* @cpu: The CPU whose state is to be dumped.
|
290 |
* @f: File to dump to.
|
291 |
* @cpu_fprintf: Function to dump with.
|
292 |
* @flags: Flags what to dump.
|
293 |
*
|
294 |
* Dumps CPU statistics.
|
295 |
*/
|
296 |
void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
|
297 |
int flags);
|
298 |
|
299 |
#ifndef CONFIG_USER_ONLY
|
300 |
/**
|
301 |
* cpu_get_phys_page_debug:
|
302 |
* @cpu: The CPU to obtain the physical page address for.
|
303 |
* @addr: The virtual address.
|
304 |
*
|
305 |
* Obtains the physical page corresponding to a virtual one.
|
306 |
* Use it only for debugging because no protection checks are done.
|
307 |
*
|
308 |
* Returns: Corresponding physical page address or -1 if no page found.
|
309 |
*/
|
310 |
static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) |
311 |
{ |
312 |
CPUClass *cc = CPU_GET_CLASS(cpu); |
313 |
|
314 |
return cc->get_phys_page_debug(cpu, addr);
|
315 |
} |
316 |
#endif
|
317 |
|
318 |
/**
|
319 |
* cpu_reset:
|
320 |
* @cpu: The CPU whose state is to be reset.
|
321 |
*/
|
322 |
void cpu_reset(CPUState *cpu);
|
323 |
|
324 |
/**
|
325 |
* cpu_class_by_name:
|
326 |
* @typename: The CPU base type.
|
327 |
* @cpu_model: The model string without any parameters.
|
328 |
*
|
329 |
* Looks up a CPU #ObjectClass matching name @cpu_model.
|
330 |
*
|
331 |
* Returns: A #CPUClass or %NULL if not matching class is found.
|
332 |
*/
|
333 |
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); |
334 |
|
335 |
/**
|
336 |
* qemu_cpu_has_work:
|
337 |
* @cpu: The vCPU to check.
|
338 |
*
|
339 |
* Checks whether the CPU has work to do.
|
340 |
*
|
341 |
* Returns: %true if the CPU has work, %false otherwise.
|
342 |
*/
|
343 |
bool qemu_cpu_has_work(CPUState *cpu);
|
344 |
|
345 |
/**
|
346 |
* qemu_cpu_is_self:
|
347 |
* @cpu: The vCPU to check against.
|
348 |
*
|
349 |
* Checks whether the caller is executing on the vCPU thread.
|
350 |
*
|
351 |
* Returns: %true if called from @cpu's thread, %false otherwise.
|
352 |
*/
|
353 |
bool qemu_cpu_is_self(CPUState *cpu);
|
354 |
|
355 |
/**
|
356 |
* qemu_cpu_kick:
|
357 |
* @cpu: The vCPU to kick.
|
358 |
*
|
359 |
* Kicks @cpu's thread.
|
360 |
*/
|
361 |
void qemu_cpu_kick(CPUState *cpu);
|
362 |
|
363 |
/**
|
364 |
* cpu_is_stopped:
|
365 |
* @cpu: The CPU to check.
|
366 |
*
|
367 |
* Checks whether the CPU is stopped.
|
368 |
*
|
369 |
* Returns: %true if run state is not running or if artificially stopped;
|
370 |
* %false otherwise.
|
371 |
*/
|
372 |
bool cpu_is_stopped(CPUState *cpu);
|
373 |
|
374 |
/**
|
375 |
* run_on_cpu:
|
376 |
* @cpu: The vCPU to run on.
|
377 |
* @func: The function to be executed.
|
378 |
* @data: Data to pass to the function.
|
379 |
*
|
380 |
* Schedules the function @func for execution on the vCPU @cpu.
|
381 |
*/
|
382 |
void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); |
383 |
|
384 |
/**
|
385 |
* async_run_on_cpu:
|
386 |
* @cpu: The vCPU to run on.
|
387 |
* @func: The function to be executed.
|
388 |
* @data: Data to pass to the function.
|
389 |
*
|
390 |
* Schedules the function @func for execution on the vCPU @cpu asynchronously.
|
391 |
*/
|
392 |
void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); |
393 |
|
394 |
/**
|
395 |
* qemu_for_each_cpu:
|
396 |
* @func: The function to be executed.
|
397 |
* @data: Data to pass to the function.
|
398 |
*
|
399 |
* Executes @func for each CPU.
|
400 |
*/
|
401 |
void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data); |
402 |
|
403 |
/**
|
404 |
* qemu_get_cpu:
|
405 |
* @index: The CPUState@cpu_index value of the CPU to obtain.
|
406 |
*
|
407 |
* Gets a CPU matching @index.
|
408 |
*
|
409 |
* Returns: The CPU or %NULL if there is no matching CPU.
|
410 |
*/
|
411 |
CPUState *qemu_get_cpu(int index);
|
412 |
|
413 |
/**
|
414 |
* cpu_exists:
|
415 |
* @id: Guest-exposed CPU ID to lookup.
|
416 |
*
|
417 |
* Search for CPU with specified ID.
|
418 |
*
|
419 |
* Returns: %true - CPU is found, %false - CPU isn't found.
|
420 |
*/
|
421 |
bool cpu_exists(int64_t id);
|
422 |
|
423 |
#ifndef CONFIG_USER_ONLY
|
424 |
|
425 |
typedef void (*CPUInterruptHandler)(CPUState *, int); |
426 |
|
427 |
extern CPUInterruptHandler cpu_interrupt_handler;
|
428 |
|
429 |
/**
|
430 |
* cpu_interrupt:
|
431 |
* @cpu: The CPU to set an interrupt on.
|
432 |
* @mask: The interupts to set.
|
433 |
*
|
434 |
* Invokes the interrupt handler.
|
435 |
*/
|
436 |
static inline void cpu_interrupt(CPUState *cpu, int mask) |
437 |
{ |
438 |
cpu_interrupt_handler(cpu, mask); |
439 |
} |
440 |
|
441 |
#else /* USER_ONLY */ |
442 |
|
443 |
void cpu_interrupt(CPUState *cpu, int mask); |
444 |
|
445 |
#endif /* USER_ONLY */ |
446 |
|
447 |
#ifndef CONFIG_USER_ONLY
|
448 |
|
449 |
static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr, |
450 |
bool is_write, bool is_exec, |
451 |
int opaque, unsigned size) |
452 |
{ |
453 |
CPUClass *cc = CPU_GET_CLASS(cpu); |
454 |
|
455 |
if (cc->do_unassigned_access) {
|
456 |
cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size); |
457 |
} |
458 |
} |
459 |
|
460 |
#endif
|
461 |
|
462 |
/**
|
463 |
* cpu_reset_interrupt:
|
464 |
* @cpu: The CPU to clear the interrupt on.
|
465 |
* @mask: The interrupt mask to clear.
|
466 |
*
|
467 |
* Resets interrupts on the vCPU @cpu.
|
468 |
*/
|
469 |
void cpu_reset_interrupt(CPUState *cpu, int mask); |
470 |
|
471 |
/**
|
472 |
* cpu_exit:
|
473 |
* @cpu: The CPU to exit.
|
474 |
*
|
475 |
* Requests the CPU @cpu to exit execution.
|
476 |
*/
|
477 |
void cpu_exit(CPUState *cpu);
|
478 |
|
479 |
/**
|
480 |
* cpu_resume:
|
481 |
* @cpu: The CPU to resume.
|
482 |
*
|
483 |
* Resumes CPU, i.e. puts CPU into runnable state.
|
484 |
*/
|
485 |
void cpu_resume(CPUState *cpu);
|
486 |
|
487 |
/**
|
488 |
* qemu_init_vcpu:
|
489 |
* @cpu: The vCPU to initialize.
|
490 |
*
|
491 |
* Initializes a vCPU.
|
492 |
*/
|
493 |
void qemu_init_vcpu(CPUState *cpu);
|
494 |
|
495 |
#define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */ |
496 |
#define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */ |
497 |
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */ |
498 |
|
499 |
/**
|
500 |
* cpu_single_step:
|
501 |
* @cpu: CPU to the flags for.
|
502 |
* @enabled: Flags to enable.
|
503 |
*
|
504 |
* Enables or disables single-stepping for @cpu.
|
505 |
*/
|
506 |
void cpu_single_step(CPUState *cpu, int enabled); |
507 |
|
508 |
#ifdef CONFIG_SOFTMMU
|
509 |
extern const struct VMStateDescription vmstate_cpu_common; |
510 |
#else
|
511 |
#define vmstate_cpu_common vmstate_dummy
|
512 |
#endif
|
513 |
|
514 |
#define VMSTATE_CPU() { \
|
515 |
.name = "parent_obj", \
|
516 |
.size = sizeof(CPUState), \
|
517 |
.vmsd = &vmstate_cpu_common, \ |
518 |
.flags = VMS_STRUCT, \ |
519 |
.offset = 0, \
|
520 |
} |
521 |
|
522 |
#endif
|