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/*
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 * QEMU PowerPC CPU
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 *
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 * Copyright (c) 2012 SUSE LINUX Products GmbH
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see
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 * <http://www.gnu.org/licenses/lgpl-2.1.html>
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 */
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#ifndef QEMU_PPC_CPU_QOM_H
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#define QEMU_PPC_CPU_QOM_H
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#include "qom/cpu.h"
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#include "cpu.h"
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#ifdef TARGET_PPC64
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#define TYPE_POWERPC_CPU "powerpc64-cpu"
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#elif defined(TARGET_PPCEMB)
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#define TYPE_POWERPC_CPU "embedded-powerpc-cpu"
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#else
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#define TYPE_POWERPC_CPU "powerpc-cpu"
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#endif
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#define POWERPC_CPU_CLASS(klass) \
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    OBJECT_CLASS_CHECK(PowerPCCPUClass, (klass), TYPE_POWERPC_CPU)
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#define POWERPC_CPU(obj) \
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    OBJECT_CHECK(PowerPCCPU, (obj), TYPE_POWERPC_CPU)
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#define POWERPC_CPU_GET_CLASS(obj) \
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    OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
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/**
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 * PowerPCCPUClass:
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 * @parent_realize: The parent class' realize handler.
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 * @parent_reset: The parent class' reset handler.
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 *
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 * A PowerPC CPU model.
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 */
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typedef struct PowerPCCPUClass {
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    /*< private >*/
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    CPUClass parent_class;
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    /*< public >*/
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    DeviceRealize parent_realize;
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    void (*parent_reset)(CPUState *cpu);
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    uint32_t pvr;
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    uint32_t svr;
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    uint64_t insns_flags;
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    uint64_t insns_flags2;
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    uint64_t msr_mask;
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    powerpc_mmu_t   mmu_model;
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    powerpc_excp_t  excp_model;
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    powerpc_input_t bus_model;
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    uint32_t flags;
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    int bfd_mach;
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    uint32_t l1_dcache_size, l1_icache_size;
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#if defined(TARGET_PPC64)
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    const struct ppc_segment_page_sizes *sps;
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#endif
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    void (*init_proc)(CPUPPCState *env);
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    int  (*check_pow)(CPUPPCState *env);
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#if defined(CONFIG_SOFTMMU)
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    int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rwx,
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                            int mmu_idx);
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#endif
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} PowerPCCPUClass;
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/**
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 * PowerPCCPU:
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 * @env: #CPUPPCState
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 *
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 * A PowerPC CPU.
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 */
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typedef struct PowerPCCPU {
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    /*< private >*/
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    CPUState parent_obj;
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    /*< public >*/
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    CPUPPCState env;
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} PowerPCCPU;
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static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
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{
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    return container_of(env, PowerPCCPU, env);
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}
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#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
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#define ENV_OFFSET offsetof(PowerPCCPU, env)
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PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
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void ppc_cpu_do_interrupt(CPUState *cpu);
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void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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                        int flags);
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void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
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                             fprintf_function cpu_fprintf, int flags);
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hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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#endif