Revision 5b9053a5

/dev/null
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diff -ruN proll_18.orig/Makefile proll-patch-15/Makefile
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--- proll_18.orig/Makefile	2002-09-13 14:16:59.000000000 +0000
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+++ proll-patch-15/Makefile	2005-11-09 18:14:51.000000000 +0000
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@@ -4,6 +4,7 @@
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 	make -C krups-ser    all
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 	make -C espresso     all
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 	make -C espresso-ser all
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+	make -C qemu all
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 clean:
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 	make -C mrcoffee clean
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@@ -11,3 +12,4 @@
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 	make -C krups-ser    clean
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 	make -C espresso     clean
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 	make -C espresso-ser clean
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+	make -C qemu clean
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diff -ruN proll_18.orig/qemu/Makefile proll-patch-15/qemu/Makefile
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--- proll_18.orig/qemu/Makefile	1970-01-01 00:00:00.000000000 +0000
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+++ proll-patch-15/qemu/Makefile	2005-08-14 10:25:06.000000000 +0000
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@@ -0,0 +1,123 @@
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+#
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+# proll:
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+# qemu/Makefile - make PROLL for QEMU
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+# $Id: proll.patch,v 1.6 2005-11-11 00:24:57 bellard Exp $
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+#
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+# Copyright 1999 Pete Zaitcev
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+# This is Free Software is licensed under terms of GNU General Public License.
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+#
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+
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+CC = gcc
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+
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+#CROSS = /usr/local/sparc/bin/sparc-sun-linux-
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+CROSS = sparc-unknown-linux-gnu-
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+
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+CROSSCC = $(CROSS)gcc
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+CROSSLD = $(CROSS)ld
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+CROSSNM = $(CROSS)nm
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+
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+RM = /bin/rm -f
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+ELFTOAOUT = elftoaout
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+
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+#
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+SRC = ../src
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+
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+# Due to remapping algorithm PROLBASE should be algned on PMD.
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+# We make PROLBASE a define instead of using _start because we
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+# want to shift it to form a PGD entry. A relocatable label will not work.
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+# Linux kernel expects us to be at LINUX_OPPROM_BEGVM <asm-sparc/openprom.h>.
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+PROLBASE =   0xffd00000
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+PROLRODATA = 0xffd08000
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+PROLDATA =   0xffd0b000
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+PROLSIZE = 240*1024
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+
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+# Linux
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+# Fixed %g6 is for arch/sparc/kernel/head.S, it seems ok w/o -ffixed-g6.
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+# Kernel uses -fcall-used-g5 -fcall-used-g7, we probably do not need them.
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+# __ANSI__ is supposed to be on by default but it is not.
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+CFLAGS = -O2 -W -Wall -DPROLBASE=$(PROLBASE) -DPROLDATA=$(PROLDATA) -DPROLRODATA=$(PROLRODATA) -D__ANSI__=1 -I$(SRC) -mcpu=hypersparc -Wa,-xarch=v8 -g -DQEMU -m32 -fno-builtin
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+ASFLAGS = -D__ASSEMBLY__ -I$(SRC) -DPROLRODATA=$(PROLRODATA) -DPROLDATA=$(PROLDATA) -DPROLSIZE=$(PROLSIZE) -g -Wa,-xarch=v8 -Wa,-32
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+# Solaris or Linux/i386 cross compilation
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+#CFLAGS = -Iinclude -O
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+
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+LDFLAGS = -N -Ttext $(PROLBASE) --section-start .rodata=$(PROLRODATA) -Tdata $(PROLDATA) -Tbss $(PROLDATA)
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+
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+ALL = proll.aout
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+PROLLEXE = proll.elf
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+
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+OBJS = head.o wuf.o wof.o main.o $(CONSOLE) \
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+ printf.o le.o system_qemu.o iommu.o \
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+ arp.o netinit.o bootp.o packet.o tftp.o udp.o sched_4m.o openprom.o \
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+ vconsole.o hconsole.o rconsole.o vcons_zs.o esp.o
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+
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+all:           $(ALL)
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+
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+$(PROLLEXE):   $(OBJS)
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+	$(CROSSLD) $(LDFLAGS) -o $(PROLLEXE) $(OBJS)
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+
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+head.o:         head.S $(SRC)/phys_jj.h \
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+  $(SRC)/asi.h $(SRC)/psr.h $(SRC)/crs.h
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+	$(CROSSCC) $(ASFLAGS) -DPROLBASE=$(PROLBASE) -o $*.o -c $*.S
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+
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+main.o:         main.c $(SRC)/asi.h $(SRC)/pgtsrmmu.h $(SRC)/iommu.h \
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+  $(SRC)/phys_jj.h $(SRC)/vconsole.h $(SRC)/version.h $(SRC)/general.h \
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+  $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arpa.h $(SRC)/system.h
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+	$(CROSSCC) $(CFLAGS) -c $*.c
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+openprom.o:	openprom.c $(SRC)/openprom.h $(SRC)/general.h $(SRC)/romlib.h \
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+  $(SRC)/vconsole.h $(SRC)/system.h $(SRC)/phys_jj.h
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+	$(CROSSCC) $(CFLAGS) -c $*.c
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+
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+system_qemu.o:       system_qemu.c $(SRC)/vconsole.h $(SRC)/pgtsrmmu.h \
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+  $(SRC)/timer.h $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/asi.h \
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+  $(SRC)/netpriv.h $(SRC)/arpa.h $(SRC)/system.h $(SRC)/crs.h
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+	$(CROSSCC) $(CFLAGS) -c $*.c
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+iommu.o:        $(SRC)/iommu.c $(SRC)/pgtsrmmu.h $(SRC)/phys_jj.h $(SRC)/iommu.h \
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+ $(SRC)/vconsole.h $(SRC)/general.h $(SRC)/romlib.h $(SRC)/system.h $(SRC)/asi.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+vconsole.o:	$(SRC)/vconsole.c $(SRC)/vconsole.h $(SRC)/hconsole.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+vcons_zs.o:	$(SRC)/vcons_zs.c $(SRC)/vconsole.h $(SRC)/system.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+hconsole.o:	$(SRC)/hconsole.c $(SRC)/hconsole.h $(SRC)/rconsole.h $(SRC)/phys_jj.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+rconsole.o:	$(SRC)/rconsole.c $(SRC)/rconsole.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+printf.o:       $(SRC)/printf.c
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+le.o:		$(SRC)/le.c $(SRC)/dma.h $(SRC)/system.h $(SRC)/netpriv.h $(SRC)/romlib.h $(SRC)/general.h $(SRC)/net.h $(SRC)/phys_jj.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+esp.o:		$(SRC)/esp.c $(SRC)/dma.h $(SRC)/system.h $(SRC)/romlib.h $(SRC)/general.h $(SRC)/phys_jj.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+arp.o:		$(SRC)/arp.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arp.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+netinit.o:	$(SRC)/netinit.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arp.h $(SRC)/ip.h $(SRC)/udp.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+tftp.o:		$(SRC)/tftp.c $(SRC)/general.h $(SRC)/net.h $(SRC)/arpa.h $(SRC)/romlib.h $(SRC)/tftp.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+udp.o:		$(SRC)/udp.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arp.h $(SRC)/ip.h $(SRC)/udp.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+packet.o:	$(SRC)/packet.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+sched_4m.o:	$(SRC)/sched_4m.c $(SRC)/system.h $(SRC)/general.h $(SRC)/romlib.h $(SRC)/phys_jj.h
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+	$(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
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+bootp.o:	$(SRC)/bootp.c $(SRC)/general.h $(SRC)/net.h \
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+  $(SRC)/arpa.h $(SRC)/romlib.h $(SRC)/system.h $(SRC)/bootp.h
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+	$(CROSSCC) $(CFLAGS) -DNOBPEXT=1 -c $(SRC)/$*.c
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+
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+wuf.o:		$(SRC)/wuf.S
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+	$(CROSSCC) $(ASFLAGS) -o $*.o -c $(SRC)/$*.S
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+wof.o:		$(SRC)/wof.S
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+	$(CROSSCC) $(ASFLAGS) -o $*.o -c $(SRC)/$*.S
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+
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+#genlab.o:      genlab.c
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+#	$(CC) -c $*.c
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+#
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+#genlab:        genlab.o
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+#	$(CC) -o genlab genlab.o
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+
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+clean:
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+	$(RM) $(OBJS)
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+	$(RM) $(PROLLEXE) proll.aout
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+
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+proll.aout:	$(PROLLEXE)
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+	$(ELFTOAOUT) -o proll.aout $(PROLLEXE)
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diff -ruN proll_18.orig/qemu/head.S proll-patch-15/qemu/head.S
145 
--- proll_18.orig/qemu/head.S	1970-01-01 00:00:00.000000000 +0000
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+++ proll-patch-15/qemu/head.S	2005-07-12 22:24:17.000000000 +0000
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@@ -0,0 +1,543 @@
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+/**
149 
+ ** Standalone startup code for Linux PROM emulator.
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+ ** Copyright 1999 Pete A. Zaitcev
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+ ** This code is licensed under GNU General Public License.
152 
+ **/
153 
+/*
154 
+ * $Id: proll.patch,v 1.6 2005-11-11 00:24:57 bellard Exp $
155 
+ */
156 
+
157 
+#include <psr.h>
158 
+#include <asi.h>
159 
+#include <crs.h>
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+/* #include <asm/head.h> */	/* Trap entries. Do not use. */
161 
+#include "phys_jj.h"
162 
+
163 
+#define C_LABEL(name)	name
164 
+#define REGWIN_SZ   0x40
165 
+
166 
+#define WRITE_PAUSE    nop; nop; nop; /* Have to do this after %wim/%psr chg */
167 
+
168 
+  /* 22 is 24-2, (va)>>(SRMMU_PGDIR_SHIFT-PTESIZESHFT) */
169 
+#define VATOPGDOFF(va) (((va)>>22)&0x3FC)
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+#define VATOPMDOFF(va) (((va)>>16)&0xFC)
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+
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+#define NOP_INSN       0x01000000     /* Used to patch sparc_save_state */
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+
174 
+/* Here are some trap goodies */
175 
+
176 
+#if 0
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+/* Generic trap entry. */
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+#define TRAP_ENTRY(type, label) \
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+	rd %psr, %l0; b label; rd %wim, %l3; nop;
180 
+#endif
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+
182 
+/* Data/text faults. */
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+#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 1, %l7;
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+#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 0, %l7;
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+
186 
+#if 0
187 
+/* This is for traps we should NEVER get. */
188 
+#define BAD_TRAP(num) \
189 
+        rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
190 
+
191 
+/* This is for traps when we want just skip the instruction which caused it */
192 
+#define SKIP_TRAP(type, name) \
193 
+	jmpl %l2, %g0; rett %l2 + 4; nop; nop;
194 
+
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+/* Notice that for the system calls we pull a trick.  We load up a
196 
+ * different pointer to the system call vector table in %l7, but call
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+ * the same generic system call low-level entry point.  The trap table
198 
+ * entry sequences are also HyperSparc pipeline friendly ;-)
199 
+ */
200 
+
201 
+/* Software trap for Linux system calls. */
202 
+#define LINUX_SYSCALL_TRAP \
203 
+        sethi %hi(C_LABEL(sys_call_table)), %l7; \
204 
+        or %l7, %lo(C_LABEL(sys_call_table)), %l7; \
205 
+        b linux_sparc_syscall; \
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+        rd %psr, %l0;
207 
+
208 
+/* Software trap for SunOS4.1.x system calls. */
209 
+#define SUNOS_SYSCALL_TRAP \
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+        rd %psr, %l0; \
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+        sethi %hi(C_LABEL(sunos_sys_table)), %l7; \
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+        b linux_sparc_syscall; \
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+        or %l7, %lo(C_LABEL(sunos_sys_table)), %l7;
214 
+
215 
+/* Software trap for Slowaris system calls. */
216 
+#define SOLARIS_SYSCALL_TRAP \
217 
+        b solaris_syscall; \
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+        rd %psr, %l0; \
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+        nop; \
220 
+        nop;
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+
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+#define INDIRECT_SOLARIS_SYSCALL(x) \
223 
+	mov x, %g1; \
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+	b solaris_syscall; \
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+	rd %psr, %l0; \
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+	nop;
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+
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+#define BREAKPOINT_TRAP \
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+	b breakpoint_trap; \
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+	rd %psr,%l0; \
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+	nop; \
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+	nop;
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+
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+/* Software trap for Sparc-netbsd system calls. */
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+#define NETBSD_SYSCALL_TRAP \
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+        sethi %hi(C_LABEL(sys_call_table)), %l7; \
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+        or %l7, %lo(C_LABEL(sys_call_table)), %l7; \
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+        b bsd_syscall; \
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+        rd %psr, %l0;
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+
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+/* The Get Condition Codes software trap for userland. */
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+#define GETCC_TRAP \
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+        b getcc_trap_handler; mov %psr, %l0; nop; nop;
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+
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+/* The Set Condition Codes software trap for userland. */
246 
+#define SETCC_TRAP \
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+        b setcc_trap_handler; mov %psr, %l0; nop; nop;
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+
249 
+/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
250 
+ * gets handled with another macro.
251 
+ */
252 
+#define TRAP_ENTRY_INTERRUPT(int_level) \
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+        mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
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+
255 
+/* NMI's (Non Maskable Interrupts) are special, you can't keep them
256 
+ * from coming in, and basically if you get one, the shows over. ;(
257 
+ * On the sun4c they are usually asynchronous memory errors, on the
258 
+ * the sun4m they could be either due to mem errors or a software
259 
+ * initiated interrupt from the prom/kern on an SMP box saying "I
260 
+ * command you to do CPU tricks, read your mailbox for more info."
261 
+ */
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+#define NMI_TRAP \
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+        rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
264 
+
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+#endif
266 
+
267 
+/* Window overflows/underflows are special and we need to try to be as
268 
+ * efficient as possible here....
269 
+ */
270 
+#define WINDOW_SPILL \
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+        rd %psr, %l0; rd %wim, %l3; b spill_window_entry; nop;
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+
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+#define WINDOW_FILL \
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+        rd %psr, %l0; rd %wim, %l3; b fill_window_entry; nop;
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+
276 
+#define STUB_TRAP	ba stub_trap; nop; nop; nop;
277 
+
278 
+#define TRAP_ENTRY(a,b)		STUB_TRAP
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+#define SKIP_TRAP(a,b)		STUB_TRAP
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+#define SUNOS_SYSCALL_TRAP	STUB_TRAP
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+#define SOLARIS_SYSCALL_TRAP	STUB_TRAP
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+#define NETBSD_SYSCALL_TRAP	STUB_TRAP
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+#define LINUX_SYSCALL_TRAP	STUB_TRAP
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+#define BREAKPOINT_TRAP		STUB_TRAP
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+#define NMI_TRAP		STUB_TRAP
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+#define GETCC_TRAP		STUB_TRAP
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+#define SETCC_TRAP		STUB_TRAP
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+#define BAD_TRAP(n)		STUB_TRAP
289 
+#define	TRAP_ENTRY_INTERRUPT(i)		STUB_TRAP
290 
+#define	INDIRECT_SOLARIS_SYSCALL(i)	STUB_TRAP
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+
292 
+	.section ".text"
293 
+	.globl start, _start
294 
+_start:
295 
+start:
296 
+	.globl spill_window_entry, fill_window_entry
297 
+
298 
+#define	EXPORT_TRAP(trap) \
299 
+	.globl trap; \
300 
+	.type trap,function; \
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+	.size trap, 16
302 
+
303 
+EXPORT_TRAP(t_zero)
304 
+EXPORT_TRAP(t_wovf)
305 
+EXPORT_TRAP(t_wunf)
306 
+EXPORT_TRAP(t_irq1)
307 
+EXPORT_TRAP(t_irq2)
308 
+EXPORT_TRAP(t_irq3)
309 
+EXPORT_TRAP(t_irq4)
310 
+EXPORT_TRAP(t_irq5)
311 
+EXPORT_TRAP(t_irq6)
312 
+EXPORT_TRAP(t_irq7)
313 
+EXPORT_TRAP(t_irq8)
314 
+EXPORT_TRAP(t_irq9)
315 
+EXPORT_TRAP(t_irq10)
316 
+EXPORT_TRAP(t_irq11)
317 
+EXPORT_TRAP(t_irq12)
318 
+EXPORT_TRAP(t_irq13)
319 
+EXPORT_TRAP(t_irq14)
320 
+EXPORT_TRAP(t_irq15)
321 
+
322 
+C_LABEL(trapbase):
323 
+t_zero:	b goprol; nop; nop; nop;
324 
+t_tflt:	SRMMU_TFAULT                        /* Inst. Access Exception        */
325 
+t_bins:	TRAP_ENTRY(0x2, bad_instruction)    /* Illegal Instruction           */
326 
+t_pins:	TRAP_ENTRY(0x3, priv_instruction)   /* Privileged Instruction        */
327 
+t_fpd:	TRAP_ENTRY(0x4, fpd_trap_handler)   /* Floating Point Disabled       */
328 
+t_wovf:	WINDOW_SPILL                        /* Window Overflow               */
329 
+t_wunf:	WINDOW_FILL                         /* Window Underflow              */
330 
+t_mna:	TRAP_ENTRY(0x7, mna_handler)        /* Memory Address Not Aligned    */
331 
+t_fpe:	TRAP_ENTRY(0x8, fpe_trap_handler)   /* Floating Point Exception      */
332 
+t_dflt:	SRMMU_DFAULT                        /* Data Miss Exception           */
333 
+t_tio:	TRAP_ENTRY(0xa, do_tag_overflow)    /* Tagged Instruction Ovrflw     */
334 
+t_wpt:	TRAP_ENTRY(0xb, do_watchpoint)      /* Watchpoint Detected           */
335 
+t_badc:	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
336 
+t_irq1:	TRAP_ENTRY_INTERRUPT(1)             /* IRQ Software/SBUS Level 1     */
337 
+t_irq2:	TRAP_ENTRY_INTERRUPT(2)             /* IRQ SBUS Level 2              */
338 
+t_irq3:	TRAP_ENTRY_INTERRUPT(3)             /* IRQ SCSI/DMA/SBUS Level 3     */
339 
+t_irq4:	TRAP_ENTRY_INTERRUPT(4)             /* IRQ Software Level 4          */
340 
+t_irq5:	TRAP_ENTRY_INTERRUPT(5)             /* IRQ SBUS/Ethernet Level 5     */
341 
+t_irq6:	TRAP_ENTRY_INTERRUPT(6)             /* IRQ Software Level 6          */
342 
+t_irq7:	TRAP_ENTRY_INTERRUPT(7)             /* IRQ Video/SBUS Level 5        */
343 
+t_irq8:	TRAP_ENTRY_INTERRUPT(8)             /* IRQ SBUS Level 6              */
344 
+t_irq9:	TRAP_ENTRY_INTERRUPT(9)             /* IRQ SBUS Level 7              */
345 
+t_irq10:TRAP_ENTRY_INTERRUPT(10)            /* IRQ Timer #1 (one we use)     */
346 
+t_irq11:TRAP_ENTRY_INTERRUPT(11)            /* IRQ Floppy Intr.              */
347 
+t_irq12:TRAP_ENTRY_INTERRUPT(12)            /* IRQ Zilog serial chip         */
348 
+t_irq13:TRAP_ENTRY_INTERRUPT(13)            /* IRQ Audio Intr.               */
349 
+t_irq14:TRAP_ENTRY_INTERRUPT(14)            /* IRQ Timer #2                  */
350 
+t_nmi:	NMI_TRAP                            /* Level 15 (NMI)                */
351 
+t_racc:	TRAP_ENTRY(0x20, do_reg_access)     /* General Register Access Error */
352 
+t_iacce:BAD_TRAP(0x21)                      /* Instr Access Error            */
353 
+t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)
354 
+t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled)    /* Co-Processor Disabled         */
355 
+t_uflsh:SKIP_TRAP(0x25, unimp_flush)        /* Unimplemented FLUSH inst.     */
356 
+t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
357 
+t_cpexc:TRAP_ENTRY(0x28, do_cp_exception)   /* Co-Processor Exception        */
358 
+t_dacce:SRMMU_DFAULT                        /* Data Access Error             */
359 
+t_hwdz:	TRAP_ENTRY(0x2a, do_hw_divzero)     /* Division by zero, you lose... */
360 
+t_dserr:BAD_TRAP(0x2b)                      /* Data Store Error              */
361 
+t_daccm:BAD_TRAP(0x2c)                      /* Data Access MMU-Miss          */
362 
+t_bad2d:               BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f)
363 
+        BAD_TRAP(0x30) BAD_TRAP(0x31) BAD_TRAP(0x32) BAD_TRAP(0x33)
364 
+        BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36) BAD_TRAP(0x37)
365 
+        BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
366 
+t_iaccm:BAD_TRAP(0x3c)                      /* Instr Access MMU-Miss         */
367 
+ BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f)
368 
+ BAD_TRAP(0x40) BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43)
369 
+ BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46) BAD_TRAP(0x47)
370 
+ BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)
371 
+ BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
372 
+ BAD_TRAP(0x50) BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53)
373 
+ BAD_TRAP(0x54) BAD_TRAP(0x55) BAD_TRAP(0x56) BAD_TRAP(0x57)
374 
+ BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a) BAD_TRAP(0x5b)
375 
+ BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
376 
+ BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63)
377 
+ BAD_TRAP(0x64) BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67)
378 
+ BAD_TRAP(0x68) BAD_TRAP(0x69) BAD_TRAP(0x6a) BAD_TRAP(0x6b)
379 
+ BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e) BAD_TRAP(0x6f)
380 
+ BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
381 
+ BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77)
382 
+ BAD_TRAP(0x78) BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b)
383 
+ BAD_TRAP(0x7c) BAD_TRAP(0x7d) BAD_TRAP(0x7e) BAD_TRAP(0x7f)
384 
+t_sunos:SUNOS_SYSCALL_TRAP                  /* SunOS System Call             */
385 
+t_sbkpt:BREAKPOINT_TRAP                     /* Software Breakpoint/KGDB      */
386 
+t_divz:	BAD_TRAP(0x82)                      /* Divide by zero trap           */
387 
+t_flwin:TRAP_ENTRY(0x83, do_flush_windows)  /* Flush Windows Trap            */
388 
+t_clwin:BAD_TRAP(0x84)                      /* Clean Windows Trap            */
389 
+t_rchk:	BAD_TRAP(0x85)                      /* Range Check                   */
390 
+t_funal:BAD_TRAP(0x86)                      /* Fix Unaligned Access Trap     */
391 
+t_iovf:	BAD_TRAP(0x87)                      /* Integer Overflow Trap         */
392 
+t_slowl:SOLARIS_SYSCALL_TRAP                /* Slowaris System Call          */
393 
+t_netbs:NETBSD_SYSCALL_TRAP                 /* Net-B.S. System Call          */
394 
+t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d)
395 
+ BAD_TRAP(0x8e) BAD_TRAP(0x8f)
396 
+t_linux:LINUX_SYSCALL_TRAP                  /* Linux System Call             */
397 
+t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93)
398 
+ BAD_TRAP(0x94) BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97)
399 
+ BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)
400 
+t_getcc:GETCC_TRAP                          /* Get Condition Codes           */
401 
+t_setcc:SETCC_TRAP                          /* Set Condition Codes           */
402 
+t_bada2:BAD_TRAP(0xa2) BAD_TRAP(0xa3)
403 
+ BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
404 
+t_slowi:INDIRECT_SOLARIS_SYSCALL(156)
405 
+ BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
406 
+ BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf)
407 
+ BAD_TRAP(0xb0) BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3)
408 
+ BAD_TRAP(0xb4) BAD_TRAP(0xb5) BAD_TRAP(0xb6) BAD_TRAP(0xb7)
409 
+ BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba) BAD_TRAP(0xbb)
410 
+ BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
411 
+t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3)
412 
+ BAD_TRAP(0xc4) BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7)
413 
+ BAD_TRAP(0xc8) BAD_TRAP(0xc9) BAD_TRAP(0xca) BAD_TRAP(0xcb)
414 
+ BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce) BAD_TRAP(0xcf)
415 
+ BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
416 
+t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7)
417 
+ BAD_TRAP(0xd8) BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb)
418 
+ BAD_TRAP(0xdc) BAD_TRAP(0xdd) BAD_TRAP(0xde) BAD_TRAP(0xdf)
419 
+ BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2) BAD_TRAP(0xe3)
420 
+ BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
421 
+t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb)
422 
+ BAD_TRAP(0xec) BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef)
423 
+ BAD_TRAP(0xf0) BAD_TRAP(0xf1) BAD_TRAP(0xf2) BAD_TRAP(0xf3)
424 
+ BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6) BAD_TRAP(0xf7)
425 
+ BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
426 
+t_badfc:BAD_TRAP(0xfc) BAD_TRAP(0xfd)
427 
+dbtrap:	BAD_TRAP(0xfe)                      /* Debugger/PROM breakpoint #1   */
428 
+dbtrap2:BAD_TRAP(0xff)                      /* Debugger/PROM breakpoint #2   */
429 
+
430 
+stub_trap:
431 
+   set (PHYS_JJ_TCX_FB + 0xbf0), %g5	/* 2 cells from side */
432 
+   set 0x00ffffff, %g4
433 
+   sta %g4, [%g5] ASI_M_BYPASS
434 
+1:	ba 1b; nop
435 
+
436 
+	.section ".bss"
437 
+	.align 8
438 
+bss_start:
439 
+	.align	0x1000		! PAGE_SIZE
440 
+	.globl C_LABEL(bootup_user_stack)
441 
+        .type   bootup_user_stack,#object
442 
+        .size   bootup_user_stack,0x2000
443 
+C_LABEL(bootup_user_stack):		.skip 0x2000
444 
+
445 
+	.section ".text"
446 
+	.register %g2, #scratch
447 
+	.register %g3, #scratch
448 
+	.register %g6, #scratch
449 
+	.register %g7, #scratch
450 
+
451 
+goprol:
452 
+	! %g1 contains end of memory
453 
+	set	PHYS_JJ_EEPROM + 0x30, %g1
454 
+	lda	[%g1] ASI_M_BYPASS, %g1
455 
+	! map PROLDATA to PROLBASE+PROLSIZE to end of ram
456 
+	set	PROLSIZE+0x1000-PROLDATA+PROLBASE, %g2	! add 0x1000 for temp tables
457 
+	sub	%g1, %g2, %g2			! start of private memory
458 
+	srl	%g2, 0x4, %g7			! ctx table at s+0x0
459 
+	add	%g2, 0x400, %g3			! l1 table at s+0x400
460 
+	srl	%g3, 0x4, %g3
461 
+	or	%g3, 0x1, %g3
462 
+	sta	%g3, [%g2] ASI_M_BYPASS
463 
+	add	%g2, 0x400, %g2			! s+0x400
464 
+	add	%g2, 0x800, %g3			! l2 table for ram (00xxxxxx) at s+0x800
465 
+	srl	%g3, 0x4, %g3
466 
+	or	%g3, 0x1, %g3
467 
+	sta	%g3, [%g2] ASI_M_BYPASS
468 
+	add	%g2, 0x500, %g3			! l2 table for rom (ffxxxxxx) at s+0x900
469 
+	add	%g2, 0x3fc, %g2			! s+0x7fc
470 
+	srl	%g3, 0x4, %g3
471 
+	or	%g3, 0x1, %g3
472 
+	sta	%g3, [%g2] ASI_M_BYPASS
473 
+	add	%g2, 0x4, %g2			! s+0x800
474 
+	set	((7 << 2) | 2), %g3		! 7 = U: --- S: RWX (main memory)
475 
+	sta	%g3, [%g2] ASI_M_BYPASS
476 
+	add	%g2, 0x200, %g3			! l3 table for rom at s+0xa00
477 
+	add	%g2, 0x1d0, %g2			! s+0x9d0
478 
+	srl	%g3, 0x4, %g3
479 
+	or	%g3, 0x1, %g3
480 
+	sta	%g3, [%g2] ASI_M_BYPASS
481 
+	add	%g2, 0x30, %g2			! s+0xa00
482 
+
483 
+	set	PROLBASE, %g3
484 
+	set	0x1000, %g5
485 
+	set	(PROLDATA-PROLBASE)/0x1000, %g6 ! # of .text pages
486 
+1:	srl	%g3, 0x4, %g4
487 
+	or	%g4, ((7 << 2) | 2), %g4	! 4 = U: --X S: --X (rom, execute only)
488 
+	sta	%g4, [%g2] ASI_M_BYPASS
489 
+	add	%g2, 4, %g2
490 
+	add	%g3, %g5, %g3
491 
+	deccc	%g6
492 
+	bne	1b
493 
+	 nop
494 
+#if 0
495 
+	set	(PROLDATA-PROLRODATA)/0x1000, %g6 ! # of .rodata pages
496 
+1:	srl	%g3, 0x4, %g4
497 
+	or	%g4, ((0 << 2) | 2), %g4	! 0 = U: R-- S: R-- (rom, read only)
498 
+	sta	%g4, [%g2] ASI_M_BYPASS
499 
+	add	%g2, 4, %g2
500 
+	add	%g3, %g5, %g3
501 
+	deccc	%g6
502 
+	bne	1b
503 
+	 nop
504 
+#endif
505 
+	set	(PROLBASE+PROLSIZE-PROLDATA)/0x1000, %g6 ! # of .bss pages
506 
+	set	0x1000, %g4
507 
+	sll	%g7, 0x4, %g3
508 
+	add	%g4, %g3, %g3
509 
+1:	srl	%g3, 0x4, %g4
510 
+	or	%g4, ((7 << 2) | 2), %g4        ! 5 = U: R-- S: RW- (data area, read/write)
511 
+	sta	%g4, [%g2] ASI_M_BYPASS
512 
+	add	%g2, 4, %g2
513 
+	add	%g3, %g5, %g3
514 
+	deccc	%g6
515 
+	bne	1b
516 
+	 nop
517 
+
518 
+	mov	%g1, %g3
519 
+
520 
+	set     AC_M_CTPR, %g2
521 
+	sta     %g7, [%g2] ASI_M_MMUREGS	! set ctx table ptr
522 
+	set	1, %g1
523 
+	sta     %g1, [%g0] ASI_M_MMUREGS	! enable mmu
524 
+
525 
+	/*
526 
+	 * The code which enables traps is a simplified version of
527 
+	 * kernel head.S.
528 
+	 *
529 
+	 * We know number of windows as 8 so we do not calculate them.
530 
+	 * The deadwood is here for any case.
531 
+	 */
532 
+
533 
+	/* Turn on Supervisor, EnableFloating, and all the PIL bits.
534 
+	 * Also puts us in register window zero with traps off.
535 
+	 */
536 
+	set	(PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
537 
+	wr	%g2, 0x0, %psr
538 
+	WRITE_PAUSE
539 
+
540 
+	/* I want a kernel stack NOW! */
541 
+	set	C_LABEL(bootup_user_stack), %g1
542 
+	set	(0x2000 - REGWIN_SZ), %g2
543 
+	add	%g1, %g2, %sp
544 
+	mov	0, %fp			/* And for good luck */
545 
+
546 
+	/* Zero out our BSS section. */
547 
+	set	C_LABEL(bss_start) , %o0	! First address of BSS
548 
+	set	C_LABEL(end) , %o1		! Last address of BSS
549 
+	ba	2f
550 
+	 nop
551 
+1:
552 
+	st	%g0, [%o0]
553 
+2:
554 
+	subcc	%o0, %o1, %g0
555 
+	bl	1b
556 
+	 add	%o0, 0x4, %o0
557 
+
558 
+	mov	2, %g1
559 
+	wr	%g1, 0x0, %wim			! make window 1 invalid
560 
+	WRITE_PAUSE
561 
+
562 
+#if 0
563 
+	wr  %g0, 0x0, %wim
564 
+	WRITE_PAUSE
565 
+	save
566 
+	rd  %psr, %g3
567 
+	restore
568 
+	and  %g3, PSR_CWP, %g3
569 
+	add  %g3, 0x1, %g3
570 
+#else
571 
+	or	%g0, 8, %g3
572 
+#endif
573 
+
574 
+#if 0
575 
+	sethi	%hi( C_LABEL(cputyp) ), %o0
576 
+	st	%g7, [%o0 + %lo( C_LABEL(cputyp) )]
577 
+
578 
+	sethi	%hi( C_LABEL(nwindows) ), %g4
579 
+	st	%g3, [%g4 + %lo( C_LABEL(nwindows) )]
580 
+
581 
+	sub	%g3, 0x1, %g3
582 
+	sethi	%hi( C_LABEL(nwindowsm1) ), %g4
583 
+	st	%g3, [%g4 + %lo( C_LABEL(nwindowsm1) )]
584 
+#endif
585 
+
586 
+	/* Here we go, start using Linux's trap table... */
587 
+	set	C_LABEL(trapbase), %g3
588 
+	wr	%g3, 0x0, %tbr
589 
+	WRITE_PAUSE
590 
+
591 
+	/* Finally, turn on traps so that we can call c-code. */
592 
+	rd	%psr, %g3
593 
+	wr	%g3, 0x0, %psr
594 
+	WRITE_PAUSE
595 
+
596 
+	wr	%g3, PSR_ET, %psr
597 
+	WRITE_PAUSE
598 
+
599 
+	.globl prolmain
600 
+	call C_LABEL(prolmain)
601 
+	 nop
602 
+
603 
+3:
604 
+	b       3b
605 
+	 nop
606 
+
607 
+/*
608 
+ * Memory access trap handler
609 
+ *   %l0  program %psr from trap table entry
610 
+ *   %l1  program %pc from hardware
611 
+ *   %l2  program %npc from hardware
612 
+ *   %l3  program %wim from trap table entry
613 
+ *   %l4
614 
+ *   %l5
615 
+ *   %l6
616 
+ *   %l7  text flag from trap table entry
617 
+ */
618 
+
619 
+	.section ".text"
620 
+	.globl srmmu_fault
621 
+C_LABEL(srmmu_fault):
622 
+
623 
+	set AC_M_SFAR, %l6
624 
+	set AC_M_SFSR, %l5
625 
+	lda [%l6] ASI_M_MMUREGS, %l6
626 
+	lda [%l5] ASI_M_MMUREGS, %l5
627 
+
628 
+	set ignore_fault, %l5
629 
+	ld [%l5], %l5
630 
+	subcc %l5, %g0, %g0		/* NULL pointer trap faults always */
631 
+	be 3f
632 
+	 nop
633 
+	subcc %l5, %l6, %g0
634 
+	be 2f
635 
+	 nop
636 
+3:
637 
+
638 
+   set (PHYS_JJ_TCX_FB + 0xbf0), %g5	/* 2 cells from side */
639 
+   set 0x00ffffff, %g4
640 
+   sta %g4, [%g5] ASI_M_BYPASS
641 
+   add %g5, 8, %g5			/* On right side */
642 
+   sta %g4, [%g5] ASI_M_BYPASS
643 
+1:	ba 1b; nop
644 
+
645 
+2:
646 
+	set C_LABEL(fault_ignored), %l5
647 
+	mov 1, %l6
648 
+	st %l6, [%l5]
649 
+
650 
+	/*
651 
+	 * Skip the faulting instruction.
652 
+	 * I think it works when next instruction is a branch even.
653 
+	 */
654 
+	or %l2, 0, %l1
655 
+	add %l2, 4, %l2
656 
+
657 
+	wr %l0, 0, %psr
658 
+	WRITE_PAUSE
659 
+	jmp %l1
660 
+	rett %l2
661 
+
662 
+/*
663 
+ * Slow external versions of st_bypass and ld_bypass.
664 
+ * rconsole.c uses inlines. We call these in places which are not speed
665 
+ * critical, to avoid compiler bugs.
666 
+ */
667 
+	.globl C_LABEL(st_bypass)
668 
+C_LABEL(st_bypass):
669 
+	retl
670 
+	 sta %o1, [%o0] ASI_M_BYPASS
671 
+	.globl C_LABEL(ld_bypass)
672 
+C_LABEL(ld_bypass):
673 
+	retl
674 
+	 lda [%o0] ASI_M_BYPASS, %o0
675 
+	.globl C_LABEL(sth_bypass)
676 
+C_LABEL(sth_bypass):
677 
+	retl
678 
+	 stha %o1, [%o0] ASI_M_BYPASS
679 
+	.globl C_LABEL(ldh_bypass)
680 
+C_LABEL(ldh_bypass):
681 
+	retl
682 
+	 lduha [%o0] ASI_M_BYPASS, %o0
683 
+	.globl C_LABEL(stb_bypass)
684 
+C_LABEL(stb_bypass):
685 
+	retl
686 
+	 stba %o1, [%o0] ASI_M_BYPASS
687 
+	.globl C_LABEL(ldb_bypass)
688 
+C_LABEL(ldb_bypass):
689 
+	retl
690 
+	 lduba [%o0] ASI_M_BYPASS, %o0
691 
diff -ruN proll_18.orig/qemu/main.c proll-patch-15/qemu/main.c
692 
--- proll_18.orig/qemu/main.c	1970-01-01 00:00:00.000000000 +0000
693 
+++ proll-patch-15/qemu/main.c	2005-08-14 10:07:48.000000000 +0000
694 
@@ -0,0 +1,185 @@
695 
+/**
696 
+ ** Proll (PROM replacement)
697 
+ ** Copyright 1999 Pete Zaitcev
698 
+ ** This code is licensed under GNU General Public License.
699 
+ **/
700 
+#include <stdarg.h>
701 
+
702 
+// #include <asm/contregs.h>
703 
+#include <asi.h>
704 
+#include "pgtsrmmu.h"
705 
+#include "iommu.h"		/* Typical SBus IOMMU for sun4m */
706 
+#include "phys_jj.h"
707 
+#include "vconsole.h"
708 
+#include "version.h"
709 
+#include <general.h>		/* __P() */
710 
+#include <net.h>		/* init_net() */
711 
+#include <romlib.h>		/* we are a provider for part of this. */
712 
+#include <netpriv.h>		/* myipaddr */
713 
+#include <arpa.h>
714 
+#include <system.h>		/* our own prototypes */
715 
+
716 
+void *init_openprom_qemu(int bankc, struct bank *bankv, unsigned hiphybas, const char *cmdline, char boot_device, int nographic);
717 
+int vcon_zs_init(struct vconterm *t, unsigned int a0);
718 
+int vcon_zs_write(struct vconterm *t, char *data, int leng);
719 
+int vcon_zs_getch(struct vconterm *t);
720 
+void esp_probe();
721 
+int esp_boot(int unit);
722 
+static void init_idprom(void);
723 
+
724 
+struct vconterm dp0;
725 
+struct mem cmem;		/* Current memory, virtual */
726 
+struct mem cio;			/* Current I/O space */
727 
+struct phym pmem;		/* Current phys. mem. */
728 
+struct iommu ciommu;		/* Our IOMMU on sun4m */
729 
+
730 
+static struct {
731 
+    const char id[16];
732 
+    unsigned int version;
733 
+    char pad1[0x1c]; // Pad to 0x30
734 
+    unsigned int ram_size;
735 
+    char boot_device;
736 
+    unsigned int load_addr, kernel_size;
737 
+    unsigned int cmdline, cmdline_len;
738 
+    char pad2[0x0c]; // Pad to 0x54
739 
+    unsigned short width, height, depth;
740 
+} *hw_idprom;
741 
+
742 
+int ignore_fault, fault_ignored;
743 
+void *printk_fn, *getch_fn;
744 
+unsigned int q_height, q_width;
745 
+
746 
+/*
747 
+ */
748 
+void prolmain()
749 
+{
750 
+	static char fname[14];
751 
+	static struct banks bb;
752 
+	unsigned int hiphybas;
753 
+	const void *romvec;
754 
+	unsigned int ram_size;
755 
+	char nographic, bootdev;
756 
+
757 
+	nographic = ldb_bypass(PHYS_JJ_EEPROM + 0x2F);
758 
+	if (!nographic) {
759 
+	    q_width = ldh_bypass(PHYS_JJ_EEPROM + 0x54);
760 
+	    q_height = ldh_bypass(PHYS_JJ_EEPROM + 0x56);
761 
+	    vcon_init(&dp0, PHYS_JJ_TCX_FB);
762 
+	    printk_fn = vcon_write;
763 
+	    getch_fn = vcon_getch;
764 
+	}
765 
+	else {
766 
+	    vcon_zs_init(&dp0, 0x71100004);
767 
+	    printk_fn = vcon_zs_write;
768 
+	    getch_fn = vcon_zs_getch;
769 
+	}
770 
+
771 
+
772 
+	printk("PROLL %s QEMU\n", PROLL_VERSION_STRING);
773 
+	ram_size = ld_bypass(PHYS_JJ_EEPROM + 0x30);
774 
+	printk("%d MB total\n", ram_size/(1024*1024));
775 
+
776 
+	bb.nbanks = 1;
777 
+	bb.bankv[0].start = 0;
778 
+	bb.bankv[0].length = ram_size;
779 
+
780 
+	hiphybas = ram_size - PROLSIZE;
781 
+
782 
+	mem_init(&cmem, (char *) &_end, (char *)(PROLBASE+PROLSIZE));
783 
+	makepages(&pmem, hiphybas);
784 
+	init_mmu_swift((unsigned int)pmem.pctp - PROLBASE + hiphybas);
785 
+
786 
+	mem_init(&cio, (char *)(PROLBASE+PROLSIZE),
787 
+	    (char *)(PROLBASE+PROLSIZE+IOMAPSIZE));
788 
+
789 
+	iommu_init(&ciommu, hiphybas);
790 
+
791 
+	/*
792 
+	 */
793 
+	init_idprom();
794 
+	printk("NVRAM: id %s version %d\n", hw_idprom->id, hw_idprom->version);
795 
+	if (!nographic)
796 
+	    printk("Prom console: TCX %dx%d\n", q_width, q_height);
797 
+	else
798 
+	    printk("Prom console: serial\n");
799 
+	sched_init();
800 
+	le_probe();
801 
+	init_net();
802 
+	esp_probe();
803 
+
804 
+	bootdev = hw_idprom->boot_device;
805 
+	printk("Boot device: %c\n", bootdev);
806 
+	if (hw_idprom->kernel_size > 0) {
807 
+	    printk("Kernel already loaded\n");
808 
+	} else if (bootdev == 'n') {
809 
+	    if (bootp() != 0) fatal();
810 
+	    /*
811 
+	     * boot_rec.bp_file cannot be used because system PROM
812 
+	     * uses it to locate ourselves. If we load from boot_rec.bp_file,
813 
+	     * we will loop reloading PROLL over and over again.
814 
+	     * Thus we use traditional PROLL scheme HEXIPADDR.PROL (single L).
815 
+	     */
816 
+	    xtoa(myipaddr, fname, 8);
817 
+	    fname[9] = '.';
818 
+	    fname[10] = 'P';
819 
+	    fname[11] = 'R';
820 
+	    fname[12] = 'O';
821 
+	    fname[13] = 'L';
822 
+	    fname[14] = 0;
823 
+
824 
+	    if (load(boot_rec.bp_siaddr, fname) != 0) fatal();
825 
+	} else if (bootdev == 'c') {
826 
+	    if (esp_boot(0) != 0) fatal();
827 
+	} else if (bootdev == 'd') {
828 
+	    if (esp_boot(2) != 0) fatal();
829 
+	}
830 
+
831 
+	romvec = init_openprom_qemu(bb.nbanks, bb.bankv, hiphybas,
832 
+				    (void *)hw_idprom->cmdline, hw_idprom->boot_device, nographic);
833 
+
834 
+	printk("Memory used: virt 0x%x:0x%x[%dK] iomap 0x%x:0x%x\n",
835 
+	    PROLBASE, (int)cmem.curp, ((unsigned) cmem.curp - PROLBASE)/1024,
836 
+	    (int)cio.start, (int)cio.curp);
837 
+
838 
+	{
839 
+	    void (*entry)(const void *, int, int, int, int) = (void *) hw_idprom->load_addr;
840 
+		printk("Kernel loaded at 0x%x, size %dK, command line = '%s'\n",
841 
+		       *entry, hw_idprom->kernel_size/1024, hw_idprom->cmdline);
842 
+		entry(romvec, 0, 0, 0, 0);
843 
+	}
844 
+
845 
+	mem_fini(&cmem);
846 
+	vcon_fini(&dp0);
847 
+}
848 
+
849 
+/*
850 
+ * dvma_alloc over iommu_alloc.
851 
+ */
852 
+void *dvma_alloc(int size, unsigned int *pphys)
853 
+{
854 
+	return iommu_alloc(&ciommu, size, pphys);
855 
+}
856 
+
857 
+/*
858 
+ */
859 
+void udelay(__attribute__((unused)) unsigned long usecs)
860 
+{
861 
+    // Qemu hardware is perfect and does not need any delays!
862 
+}
863 
+
864 
+static void init_idprom()
865 
+{
866 
+	void *va_prom;
867 
+
868 
+	if ((va_prom = map_io(PHYS_JJ_EEPROM, PHYS_JJ_EEPROM_SIZE)) == NULL) {
869 
+		printk("init_idprom: cannot map eeprom\n");
870 
+		fatal();
871 
+	}
872 
+	bcopy(va_prom + PHYS_JJ_IDPROM_OFF, idprom, IDPROM_SIZE);
873 
+	/*
874 
+	 * hw_idprom is not used anywhere.
875 
+	 * It's just as we hate to leave hanging pointers (I/O page here).
876 
+	 */
877 
+	hw_idprom = va_prom;
878 
+}
879 
+
880 
diff -ruN proll_18.orig/qemu/openprom.c proll-patch-15/qemu/openprom.c
881 
--- proll_18.orig/qemu/openprom.c	1970-01-01 00:00:00.000000000 +0000
882 
+++ proll-patch-15/qemu/openprom.c	2005-11-07 20:11:04.000000000 +0000
883 
@@ -0,0 +1,910 @@
884 
+/*
885 
+ * PROM interface support
886 
+ * Copyright 1996 The Australian National University.
887 
+ * Copyright 1996 Fujitsu Laboratories Limited
888 
+ * Copyright 1999 Pete A. Zaitcev
889 
+ * This software may be distributed under the terms of the Gnu
890 
+ * Public License version 2 or later
891 
+ */
892 
+
893 
+#include <openprom.h>
894 
+#include <general.h>
895 
+#include <romlib.h>
896 
+#include <system.h>
897 
+#include <vconsole.h>
898 
+#include "phys_jj.h"
899 
+
900 
+//#define DEBUG_OBP
901 
+
902 
+#define PAGE_SIZE 4096
903 
+
904 
+struct property {
905 
+	const char *name;
906 
+	const char *value;
907 
+	int length;
908 
+};
909 
+
910 
+struct node {
911 
+	const struct property *properties;
912 
+	/* short */ const int sibling;
913 
+	/* short */ const int child;
914 
+};
915 
+
916 
+static int obp_nextnode(int node);
917 
+static int obp_child(int node);
918 
+static int obp_proplen(int node, char *name);
919 
+static int obp_getprop(int node, char *name, char *val);
920 
+static int obp_setprop(int node, char *name, char *val, int len);
921 
+static const char *obp_nextprop(int node, char *name);
922 
+
923 
+static char obp_idprom[IDPROM_SIZE];
924 
+static const struct property null_properties = { NULL, NULL, -1 };
925 
+static const int prop_true = -1;
926 
+
927 
+static struct property propv_root[7];
928 
+
929 
+static const struct property propv_root_templ[] = {
930 
+	{"name",	"SUNW,SparcStation-5", sizeof("SUNW,SparcStation-5") },
931 
+	{"idprom",	obp_idprom, IDPROM_SIZE},
932 
+	{"banner-name", "SparcStation", sizeof("SparcStation")},
933 
+	{"compatible",	"sun4m", 6},
934 
+};
935 
+
936 
+static const int prop_iommu_reg[] = {
937 
+	0x0, 0x10000000, 0x00000300,
938 
+};
939 
+static const struct property propv_iommu[] = {
940 
+	{"name",	"iommu", sizeof("iommu")},
941 
+	{"reg",		(char*)&prop_iommu_reg[0], sizeof(prop_iommu_reg) },
942 
+	{NULL, NULL, -1}
943 
+};
944 
+
945 
+static const int prop_sbus_ranges[] = {
946 
+	0x0, 0x0, 0x0, 0x30000000, 0x10000000,
947 
+	0x1, 0x0, 0x0, 0x40000000, 0x10000000,
948 
+	0x2, 0x0, 0x0, 0x50000000, 0x10000000,
949 
+	0x3, 0x0, 0x0, 0x60000000, 0x10000000,
950 
+	0x4, 0x0, 0x0, 0x70000000, 0x10000000,
951 
+};
952 
+static const struct property propv_sbus[] = {
953 
+	{"name",	"sbus", 5},
954 
+	{"ranges",	(char*)&prop_sbus_ranges[0], sizeof(prop_sbus_ranges)},
955 
+	{"device_type",	"hierarchical", sizeof("hierarchical") },
956 
+	{NULL, NULL, -1}
957 
+};
958 
+
959 
+static const int prop_tcx_regs[] = {
960 
+	0x2, 0x00800000, 0x00100000,
961 
+	0x2, 0x02000000, 0x00000001,
962 
+	0x2, 0x04000000, 0x00800000,
963 
+	0x2, 0x06000000, 0x00800000,
964 
+	0x2, 0x0a000000, 0x00000001,
965 
+	0x2, 0x0c000000, 0x00000001,
966 
+	0x2, 0x0e000000, 0x00000001,
967 
+	0x2, 0x00700000, 0x00001000,
968 
+	0x2, 0x00200000, 0x00000004,
969 
+	0x2, 0x00300000, 0x0000081c,
970 
+	0x2, 0x00000000, 0x00010000,
971 
+	0x2, 0x00240000, 0x00000004,
972 
+	0x2, 0x00280000, 0x00000001,
973 
+};
974 
+
975 
+#if 1	/* Zaitcev */
976 
+static const int pixfreq = 0x03dfd240;
977 
+static const int hbporch = 0xa0;
978 
+static const int vfreq = 0x3c;
979 
+#endif
980 
+#if 0	/* Kevin Boone - 70Hz refresh */
981 
+static const int pixfreq = 0x047868C0;
982 
+static const int hbporch = 0x90;
983 
+static const int vfreq = 0x46;
984 
+#endif
985 
+
986 
+static const int vbporch = 0x1d;
987 
+static const int vsync = 0x6;
988 
+static const int hsync = 0x88;
989 
+static const int vfporch = 0x3;
990 
+static const int hfporch = 0x18;
991 
+static const int height = 0x300;
992 
+static const int width = 0x400;
993 
+static const int linebytes = 0x400;
994 
+static const int depth = 24;
995 
+static const int tcx_intr[] = { 5, 0 };
996 
+static const int tcx_interrupts = 5;
997 
+static const struct property propv_sbus_tcx[] = {
998 
+	{"name",	"SUNW,tcx", sizeof("SUNW,tcx")},
999 
+	{"vbporch",	(char*)&vbporch, sizeof(int)},
1000 
+	{"hbporch",	(char*)&hbporch, sizeof(int)},
1001 
+	{"vsync",	(char*)&vsync, sizeof(int)},
1002 
+	{"hsync",	(char*)&hsync, sizeof(int)},
1003 
+	{"vfporch",	(char*)&vfporch, sizeof(int)},
1004 
+	{"hfporch",	(char*)&hfporch, sizeof(int)},
1005 
+	{"pixfreq",	(char*)&pixfreq, sizeof(int)},
1006 
+	{"vfreq",	(char*)&vfreq, sizeof(int)},
1007 
+	{"height",	(char*)&height, sizeof(int)},
1008 
+	{"width",	(char*)&width, sizeof(int)},
1009 
+	{"linebytes",	(char*)&linebytes, sizeof(int)},
1010 
+	{"depth",	(char*)&depth, sizeof(int)},
1011 
+	{"reg",		(char*)&prop_tcx_regs[0], sizeof(prop_tcx_regs)},
1012 
+	{"tcx-8-bit",	0, -1},
1013 
+	{"intr",	(char*)&tcx_intr[0], sizeof(tcx_intr)},
1014 
+	{"interrupts",	(char*)&tcx_interrupts, sizeof(tcx_interrupts)},
1015 
+	{"device_type",	"display", sizeof("display")},
1016 
+	{NULL, NULL, -1}
1017 
+};
1018 
+
1019 
+static const int prop_cs4231_reg[] = {
1020 
+	0x3, 0x0C000000, 0x00000040
1021 
+};
1022 
+static const int cs4231_interrupts = 5;
1023 
+static const int cs4231_intr[] = { 5, 0 };
1024 
+
1025 
+static const struct property propv_sbus_cs4231[] = {
1026 
+	{"name",	"SUNW,CS4231", sizeof("SUNW,CS4231") },
1027 
+	{"intr",	(char*)&cs4231_intr[0], sizeof(cs4231_intr) },
1028 
+	{"interrupts",  (char*)&cs4231_interrupts, sizeof(cs4231_interrupts) },
1029 
+	{"reg",		(char*)&prop_cs4231_reg[0], sizeof(prop_cs4231_reg) },
1030 
+	{"device_type", "serial", sizeof("serial") },
1031 
+	{"alias",	"audio", sizeof("audio") },
1032 
+	{NULL, NULL, -1}
1033 
+};
1034 
+
1035 
+static const int cpu_nctx = NCTX_SWIFT;
1036 
+static const int cpu_cache_line_size = 0x20;
1037 
+static const int cpu_cache_nlines = 0x200;
1038 
+static const struct property propv_cpu[] = {
1039 
+	{"name",	"STP1012PGA", sizeof("STP1012PGA") },
1040 
+	{"device_type",	"cpu", 4 },
1041 
+	{"mmu-nctx",	(char*)&cpu_nctx, sizeof(int)},
1042 
+	{"cache-line-size",	(char*)&cpu_cache_line_size, sizeof(int)},
1043 
+	{"cache-nlines",	(char*)&cpu_cache_nlines, sizeof(int)},
1044 
+	{NULL, NULL, -1}
1045 
+};
1046 
+
1047 
+static const int prop_obio_ranges[] = {
1048 
+	0x0, 0x0, 0x0, 0x71000000, 0x01000000,
1049 
+};
1050 
+static const struct property propv_obio[] = {
1051 
+	{"name",	"obio", 5 },
1052 
+	{"ranges",	(char*)&prop_obio_ranges[0], sizeof(prop_obio_ranges) },
1053 
+	{"device_type",	"hierarchical", sizeof("hierarchical") },
1054 
+	{NULL, NULL, -1}
1055 
+};
1056 
+
1057 
+static const int prop_auxio_reg[] = {
1058 
+	0x0, 0x00900000, 0x00000001,
1059 
+};
1060 
+static const struct property propv_obio_auxio[] = {
1061 
+	{"name",	"auxio", sizeof("auxio") },
1062 
+	{"reg",		(char*)&prop_auxio_reg[0], sizeof(prop_auxio_reg) },
1063 
+	{NULL, NULL, -1}
1064 
+};
1065 
+
1066 
+static const int prop_int_reg[] = {
1067 
+	0x0, 0x00e00000, 0x00000010,
1068 
+	0x0, 0x00e10000, 0x00000010,
1069 
+};
1070 
+static const struct property propv_obio_int[] = {
1071 
+	{"name",	"interrupt", sizeof("interrupt")},
1072 
+	{"reg",		(char*)&prop_int_reg[0], sizeof(prop_int_reg) },
1073 
+	{NULL, NULL, -1}
1074 
+};
1075 
+
1076 
+static const int prop_cnt_reg[] = {
1077 
+	0x0, 0x00d00000, 0x00000010,
1078 
+	0x0, 0x00d10000, 0x00000010,
1079 
+};
1080 
+static const struct property propv_obio_cnt[] = {
1081 
+	{"name",	"counter", sizeof("counter")},
1082 
+	{"reg",		(char*)&prop_cnt_reg[0], sizeof(prop_cnt_reg) },
1083 
+	{NULL, NULL, -1}
1084 
+};
1085 
+
1086 
+static const int prop_eeprom_reg[] = {
1087 
+	0x0, 0x00200000, 0x00002000,
1088 
+};
1089 
+static const struct property propv_obio_eep[] = {
1090 
+	{"name",	"eeprom", sizeof("eeprom")},
1091 
+	{"reg",		(char*)&prop_eeprom_reg[0], sizeof(prop_eeprom_reg) },
1092 
+	{"model",	"mk48t08", sizeof("mk48t08")},
1093 
+	{NULL, NULL, -1}
1094 
+};
1095 
+
1096 
+static const int prop_su_reg[] = {
1097 
+	0x0, 0x003002f8, 0x00000008,
1098 
+};
1099 
+static const struct property propv_obio_su[] = {
1100 
+	{"name",	"su", sizeof("su")},
1101 
+	{"reg",		(char*)&prop_su_reg[0], sizeof(prop_su_reg) },
1102 
+	{NULL, NULL, -1}
1103 
+};
1104 
+
1105 
+static const int prop_zs_intr[] = { 0x2c, 0x0 };
1106 
+static const int prop_zs_reg[] = {
1107 
+	0x0, 0x00000000, 0x00000008,
1108 
+};
1109 
+static void *prop_zs_addr;
1110 
+static const int prop_zs_slave = 1;
1111 
+static const struct property propv_obio_zs[] = {
1112 
+	{"name",	"zs", sizeof("zs")},
1113 
+	{"reg",		(char*)&prop_zs_reg[0], sizeof(prop_zs_reg) },
1114 
+	{"slave",	(char*)&prop_zs_slave, sizeof(prop_zs_slave) },
1115 
+	{"device_type", "serial", sizeof("serial") },
1116 
+	{"intr",	(char*)&prop_zs_intr[0], sizeof(prop_zs_intr) },
1117 
+	{"address",	(char*)&prop_zs_addr, sizeof(prop_zs_addr) },
1118 
+	{"keyboard",	(char*)&prop_true, 0},
1119 
+	{"mouse",	(char*)&prop_true, 0},
1120 
+	{NULL, NULL, -1}
1121 
+};
1122 
+
1123 
+static const int prop_zs1_intr[] = { 0x2c, 0x0 };
1124 
+static const int prop_zs1_reg[] = {
1125 
+	0x0, 0x00100000, 0x00000008,
1126 
+};
1127 
+static void *prop_zs1_addr;
1128 
+static const int prop_zs1_slave = 0;
1129 
+static const struct property propv_obio_zs1[] = {
1130 
+	{"name",	"zs", sizeof("zs")},
1131 
+	{"reg",		(char*)&prop_zs1_reg[0], sizeof(prop_zs1_reg) },
1132 
+	{"slave",	(char*)&prop_zs1_slave, sizeof(prop_zs1_slave) },
1133 
+	{"device_type", "serial", sizeof("serial") },
1134 
+	{"intr",	(char*)&prop_zs1_intr[0], sizeof(prop_zs1_intr) },
1135 
+	{"address",	(char*)&prop_zs1_addr, sizeof(prop_zs1_addr) },
1136 
+	{NULL, NULL, -1}
1137 
+};
1138 
+
1139 
+static const int prop_ledma_reg[] = {
1140 
+	0x4, 0x08400010, 0x00000020,
1141 
+};
1142 
+static const int prop_ledma_burst = 0x3f;
1143 
+static const struct property propv_sbus_ledma[] = {
1144 
+	{"name",	"ledma", sizeof("ledma")},
1145 
+	{"reg",		(char*)&prop_ledma_reg[0], sizeof(prop_ledma_reg) },
1146 
+	{"burst-sizes",	(char*)&prop_ledma_burst, sizeof(int) },
1147 
+	{NULL, NULL, -1}
1148 
+};
1149 
+
1150 
+static const int prop_le_reg[] = {
1151 
+	0x4, 0x08c00000, 0x00000004,
1152 
+};
1153 
+static const int prop_le_busmaster_regval = 0x7;
1154 
+static const int prop_le_intr[] = { 0x26, 0x0 };
1155 
+static const struct property propv_sbus_ledma_le[] = {
1156 
+	{"name",	"le", sizeof("le")},
1157 
+	{"reg",		(char*)&prop_le_reg[0], sizeof(prop_le_reg) },
1158 
+	{"busmaster-regval",	(char*)&prop_le_busmaster_regval, sizeof(int)},
1159 
+	{"intr",	(char*)&prop_le_intr[0], sizeof(prop_le_intr) },
1160 
+	{NULL, NULL, -1}
1161 
+};
1162 
+
1163 
+static const int prop_espdma_reg[] = {
1164 
+	0x4, 0x08400000, 0x00000010,
1165 
+};
1166 
+
1167 
+static const struct property propv_sbus_espdma[] = {
1168 
+	{"name",	"espdma", sizeof("espdma")},
1169 
+	{"reg",		(char*)&prop_espdma_reg[0], sizeof(prop_espdma_reg) },
1170 
+	{NULL, NULL, -1}
1171 
+};
1172 
+
1173 
+static const int prop_esp_reg[] = {
1174 
+	0x4, 0x08800000, 0x00000040,
1175 
+};
1176 
+static const int prop_esp_intr[] = { 0x24, 0x0 };
1177 
+static const struct property propv_sbus_espdma_esp[] = {
1178 
+	{"name",	"esp", sizeof("esp")},
1179 
+	{"reg",		(char*)&prop_esp_reg[0], sizeof(prop_esp_reg) },
1180 
+	{"intr",	(char*)&prop_esp_intr[0], sizeof(prop_esp_intr) },
1181 
+	{NULL, NULL, -1}
1182 
+};
1183 
+
1184 
+static const int prop_bpp_reg[] = {
1185 
+	0x4, 0x0c800000, 0x0000001c,
1186 
+};
1187 
+static const int prop_bpp_intr[] = { 0x33, 0x0 };
1188 
+static const struct property propv_sbus_bpp[] = {
1189 
+	{"name",	"SUNW,bpp", sizeof("SUNW,bpp")},
1190 
+	{"reg",		(char*)&prop_bpp_reg[0], sizeof(prop_bpp_reg) },
1191 
+	{"intr",	(char*)&prop_bpp_intr[0], sizeof(prop_bpp_intr) },
1192 
+	{NULL, NULL, -1}
1193 
+};
1194 
+
1195 
+static const int prop_apc_reg[] = {
1196 
+	0x4, 0x0a000000, 0x00000010,
1197 
+};
1198 
+static const struct property propv_sbus_apc[] = {
1199 
+	{"name",	"xxxpower-management", sizeof("xxxpower-management")},
1200 
+	{"reg",		(char*)&prop_apc_reg[0], sizeof(prop_apc_reg) },
1201 
+	{NULL, NULL, -1}
1202 
+};
1203 
+
1204 
+static const int prop_fd_intr[] = { 0x2b, 0x0 };
1205 
+static const int prop_fd_reg[] = {
1206 
+	0x0, 0x00400000, 0x0000000f,
1207 
+};
1208 
+static const struct property propv_obio_fd[] = {
1209 
+	{"name",	"SUNW,fdtwo", sizeof("SUNW,fdtwo")},
1210 
+	{"reg",		(char*)&prop_fd_reg[0], sizeof(prop_fd_reg) },
1211 
+	{"device_type", "block", sizeof("block") },
1212 
+	{"intr",	(char*)&prop_fd_intr[0], sizeof(prop_fd_intr) },
1213 
+	{NULL, NULL, -1}
1214 
+};
1215 
+
1216 
+static const int prop_pw_intr[] = { 0x22, 0x0 };
1217 
+static const int prop_pw_reg[] = {
1218 
+	0x0, 0x00910000, 0x00000001,
1219 
+};
1220 
+static const struct property propv_obio_pw[] = {
1221 
+	{"name",	"power", sizeof("power")},
1222 
+	{"reg",		(char*)&prop_pw_reg[0], sizeof(prop_pw_reg) },
1223 
+	{"intr",	(char*)&prop_pw_intr[0], sizeof(prop_pw_intr) },
1224 
+	{NULL, NULL, -1}
1225 
+};
1226 
+
1227 
+static const int prop_cf_reg[] = {
1228 
+	0x0, 0x00800000, 0x00000001,
1229 
+};
1230 
+static const struct property propv_obio_cf[] = {
1231 
+	{"name",	"slavioconfig", sizeof("slavioconfig")},
1232 
+	{"reg",		(char*)&prop_cf_reg[0], sizeof(prop_cf_reg) },
1233 
+	{NULL, NULL, -1}
1234 
+};
1235 
+
1236 
+static const struct property propv_options[] = {
1237 
+	{"name",	"options", sizeof("options")},
1238 
+	{"screen-#columns",	"80", sizeof("80")},
1239 
+	{"screen-#rows",	"25", sizeof("25")},
1240 
+	{"tpe-link-test?",	(char *)&prop_true, 0},
1241 
+	{"ttya-mode",		"9600,8,n,1,-", sizeof("9600,8,n,1,-")},
1242 
+	{"ttya-ignore-cd",	(char *)&prop_true, 0},
1243 
+	{"ttya-rts-dtr-off",	0, -1},
1244 
+	{"ttyb-mode",		"9600,8,n,1,-", sizeof("9600,8,n,1,-")},
1245 
+	{"ttyb-ignore-cd",	(char *)&prop_true, 0},
1246 
+	{"ttyb-rts-dtr-off",	0, -1},
1247 
+	{NULL, NULL, -1}
1248 
+};
1249 
+
1250 
+static int prop_mem_reg[3];
1251 
+static int prop_mem_avail[3];
1252 
+
1253 
+static const struct property propv_memory[] = {
1254 
+	{"name",	"memory", sizeof("memory")},
1255 
+	{"reg",		(char*)&prop_mem_reg[0], sizeof(prop_mem_reg) },
1256 
+	{"available",	(char*)&prop_mem_avail[0], sizeof(prop_mem_avail) },
1257 
+	{NULL, NULL, -1}
1258 
+};
1259 
+
1260 
+static int prop_vmem_avail[6];
1261 
+
1262 
+static const struct property propv_vmemory[] = {
1263 
+	{"name",	"virtual-memory", sizeof("virtual-memory")},
1264 
+	{"available",	(char*)&prop_vmem_avail[0], sizeof(prop_vmem_avail) },
1265 
+	{NULL, NULL, -1}
1266 
+};
1267 
+
1268 
+static const struct node nodes[] = {
1269 
+	{ &null_properties,	 1,  0 }, /* 0 = big brother of root */
1270 
+	{ propv_root,		 0,  2 }, /*  1 "/" */
1271 
+	{ propv_iommu,		12,  3 }, /*  2 "/iommu" */
1272 
+	{ propv_sbus,		 0,  4 }, /*  3 "/iommu/sbus" */
1273 
+	{ propv_sbus_tcx,	 5,  0 }, /*  4 "/iommu/sbus/SUNW,tcx" */
1274 
+	{ propv_sbus_ledma,	 7,  6 }, /*  5 "/iommu/sbus/ledma" */
1275 
+	{ propv_sbus_ledma_le,	 0,  0 }, /*  6 "/iommu/sbus/ledma/le" */
1276 
+	{ propv_sbus_cs4231,	 8,  0 }, /*  7 "/iommu/sbus/SUNW,CS4231 */
1277 
+	{ propv_sbus_bpp,	 9,  0 }, /*  8 "/iommu/sbus/SUNW,bpp */
1278 
+	{ propv_sbus_espdma,	11, 10 }, /*  9 "/iommu/sbus/espdma" */
1279 
+	{ propv_sbus_espdma_esp, 0,  0 }, /* 10 "/iommu/sbus/espdma/esp" */
1280 
+	{ propv_sbus_apc,	 0,  0 }, /* 11 "/iommu/sbus/power-management */
1281 
+	{ propv_cpu,		13,  0 }, /* 12 "/STP1012PGA" */
1282 
+	{ propv_obio,		23, 14 }, /* 13 "/obio" */
1283 
+	{ propv_obio_int,	15,  0 }, /* 14 "/obio/interrupt" */
1284 
+	{ propv_obio_cnt,	16,  0 }, /* 15 "/obio/counter" */
1285 
+	{ propv_obio_eep,	17,  0 }, /* 16 "/obio/eeprom" */
1286 
+	{ propv_obio_auxio,	18,  0 }, /* 17 "/obio/auxio" */
1287 
+	{ propv_obio_zs1,	19,  0 }, /* 18 "/obio/zs@0,100000"
1288 
+					     Must be before zs@0,0! */
1289 
+	{ propv_obio_zs,	20,  0 }, /* 19 "/obio/zs@0,0" */
1290 
+	{ propv_obio_fd,	21,  0 }, /* 20 "/obio/SUNW,fdtwo" */
1291 
+	{ propv_obio_pw,	22,  0 }, /* 21 "/obio/power" */
1292 
+	{ propv_obio_cf,	 0,  0 }, /* 22 "/obio/slavioconfig@0,800000" */
1293 
+	{ propv_options,	24,  0 }, /* 23 "/options" */
1294 
+	{ propv_memory,		25,  0 }, /* 24 "/memory" */
1295 
+	{ propv_vmemory,	 0,  0 }, /* 25 "/virtual-memory" */
1296 
+};
1297 
+
1298 
+static struct linux_mlist_v0 totphys[MAX_BANKS];
1299 
+static struct linux_mlist_v0 totmap[1];
1300 
+static struct linux_mlist_v0 totavail[MAX_BANKS];
1301 
+
1302 
+static struct linux_mlist_v0 *ptphys;
1303 
+static struct linux_mlist_v0 *ptmap;
1304 
+static struct linux_mlist_v0 *ptavail;
1305 
+
1306 
+static const struct linux_nodeops nodeops0 = {
1307 
+        obp_nextnode,	/* int (*no_nextnode)(int node); */
1308 
+        obp_child,	/* int (*no_child)(int node); */
1309 
+        obp_proplen,	/* int (*no_proplen)(int node, char *name); */
1310 
+        obp_getprop,	/* int (*no_getprop)(int node,char *name,char *val); */
1311 
+        obp_setprop,	/* int (*no_setprop)(int node, char *name,
1312 
+				 char *val, int len); */
1313 
+        obp_nextprop	/* char * (*no_nextprop)(int node, char *name); */
1314 
+};
1315 
+
1316 
+static struct linux_arguments_v0 obp_arg;
1317 
+static const struct linux_arguments_v0 * const obp_argp = &obp_arg;
1318 
+
1319 
+static void (*synch_hook)(void);
1320 
+static char obp_stdin, obp_stdout;
1321 
+static int obp_fd_stdin, obp_fd_stdout;
1322 
+
1323 
+static int obp_nbgetchar(void);
1324 
+static int obp_nbputchar(int ch);
1325 
+static void obp_reboot(char *);
1326 
+static void obp_abort(void);
1327 
+static void obp_halt(void);
1328 
+static int obp_devopen(char *str);
1329 
+static int obp_devclose(int dev_desc);
1330 
+static int obp_devread(int dev_desc, char *buf, int nbytes);
1331 
+static int obp_devwrite(int dev_desc, char *buf, int nbytes);
1332 
+static int obp_devseek(int dev_desc, int hi, int lo);
1333 
+static int obp_rdblkdev(int dev_desc, int num_blks, int blk_st, char *buf);
1334 
+static char *obp_dumb_mmap(char *va, int which_io, unsigned int pa, unsigned int size);
1335 
+static void obp_dumb_munmap(char *va, unsigned int size);
1336 
+static int obp_inst2pkg(int dev_desc);
1337 
+
1338 
+static void doublewalk(unsigned ptab1, unsigned va)
1339 
+{
1340 
+unsigned int proc_tablewalk(int ctx, unsigned int va);
1341 
+unsigned int mem_tablewalk(unsigned int pa, unsigned int va);
1342 
+
1343 
+	proc_tablewalk(0, va);
1344 
+	if (ptab1 != 0) mem_tablewalk(ptab1, va);
1345 
+}
1346 
+
1347 
+static struct linux_romvec romvec0;
1348 
+
1349 
+struct fd {
1350 
+    int unit, part;
1351 
+    int offset;
1352 
+    int (*pread)(int dev_desc, int offset, char *buf, unsigned int nbytes);
1353 
+    int (*pwrite)(int dev_desc, int offset, char *buf, unsigned int nbytes);
1354 
+} fd_table[16];
1355 
+
1356 
+static int fd_index;
1357 
+static int con_pread(int dev_desc, int offset, char *buf, unsigned int nbytes);
1358 
+static int con_pwrite(int dev_desc, int offset, char *buf, unsigned int nbytes);
1359 
+
1360 
+void *
1361 
+init_openprom_qemu(int bankc, struct bank *bankv, unsigned hiphybas,
1362 
+		   const char *cmdline, char boot_device, int nographic)
1363 
+{
1364 
+	int i;
1365 
+
1366 
+	/*
1367 
+	 * Avoid data segment allocations
1368 
+	 */
1369 
+	ptphys = totphys;
1370 
+	ptmap = totmap;
1371 
+	ptavail = totavail;
1372 
+	/*
1373 
+	 * Form memory descriptors.
1374 
+	 */
1375 
+	for (i = 0; i < bankc; i++) {
1376 
+		totphys[i].theres_more = &totphys[i+1];
1377 
+		totphys[i].start_adr = (char*) bankv[i].start;
1378 
+		totphys[i].num_bytes = bankv[i].length;
1379 
+	}
1380 
+	totphys[i-1].theres_more = 0;
1381 
+
1382 
+	/*
1383 
+	 * XXX Merged in normal PROM when full banks touch.
1384 
+	 */
1385 
+	for (i = 0; i < bankc; i++) {
1386 
+		unsigned bankbase = bankv[i].start;
1387 
+		unsigned banksize = bankv[i].length;
1388 
+		if (hiphybas > bankbase &&
1389 
+		    hiphybas < bankbase + banksize) {
1390 
+			banksize = hiphybas - bankbase;
1391 
+		}
1392 
+		totavail[i].theres_more = &totavail[i+1];
1393 
+		totavail[i].start_adr = (char*) bankbase;
1394 
+		totavail[i].num_bytes = banksize;
1395 
+	}
1396 
+	totavail[i-1].theres_more = 0;
1397 
+
1398 
+	totmap[0].theres_more = 0;
1399 
+	totmap[0].start_adr = (char*) PROLBASE;
1400 
+	totmap[0].num_bytes = PROLSIZE;
1401 
+	prop_mem_reg[0] = 0;
1402 
+	prop_mem_reg[1] = 0;
1403 
+	prop_mem_reg[2] = bankv[0].length;
1404 
+	prop_mem_avail[0] = 0;
1405 
+	prop_mem_avail[1] = 0;
1406 
+	prop_mem_avail[2] = hiphybas;
1407 
+	prop_vmem_avail[0] = 0;
1408 
+	prop_vmem_avail[1] = 0;
1409 
+	prop_vmem_avail[2] = PROLBASE-1;
1410 
+	prop_vmem_avail[3] = 0;
1411 
+	prop_vmem_avail[4] = 0xffe00000;
1412 
+	prop_vmem_avail[5] = 0x00200000;
1413 
+
1414 
+	/*
1415 
+	 * idprom
1416 
+	 */
1417 
+	bcopy(idprom, obp_idprom, IDPROM_SIZE);
1418 
+
1419 
+	// Linux wants a R/W romvec table
1420 
+	romvec0.pv_magic_cookie = LINUX_OPPROM_MAGIC;
1421 
+	romvec0.pv_romvers = 3;
1422 
+	romvec0.pv_plugin_revision = 77;
1423 
+	romvec0.pv_printrev = 0x10203;
1424 
+	romvec0.pv_v0mem.v0_totphys = &ptphys;
1425 
+	romvec0.pv_v0mem.v0_prommap = &ptmap;
1426 
+	romvec0.pv_v0mem.v0_available = &ptavail;
1427 
+	romvec0.pv_nodeops = &nodeops0;
1428 
+	romvec0.pv_bootstr = (void *)doublewalk;
1429 
+	romvec0.pv_v0devops.v0_devopen = &obp_devopen;
1430 
+	romvec0.pv_v0devops.v0_devclose = &obp_devclose;
1431 
+	romvec0.pv_v0devops.v0_rdblkdev = &obp_rdblkdev;
1432 
+	romvec0.pv_stdin = &obp_stdin;
1433 
+	romvec0.pv_stdout = &obp_stdout;
1434 
+	romvec0.pv_getchar = obp_nbgetchar;
1435 
+	romvec0.pv_putchar = (void (*)(int))obp_nbputchar;
1436 
+	romvec0.pv_nbgetchar = obp_nbgetchar;
1437 
+	romvec0.pv_nbputchar = obp_nbputchar;
1438 
+	romvec0.pv_reboot = obp_reboot;
1439 
+	romvec0.pv_printf = (void (*)(const char *fmt, ...))printk;
1440 
+	romvec0.pv_abort = obp_abort;
1441 
+	romvec0.pv_halt = obp_halt;
1442 
+	romvec0.pv_synchook = &synch_hook;
1443 
+	romvec0.pv_v0bootargs = &obp_argp;
1444 
+	romvec0.pv_v2devops.v2_inst2pkg = obp_inst2pkg;
1445 
+	romvec0.pv_v2devops.v2_dumb_mmap = obp_dumb_mmap;
1446 
+	romvec0.pv_v2devops.v2_dumb_munmap = obp_dumb_munmap;
1447 
+	romvec0.pv_v2devops.v2_dev_open = obp_devopen;
1448 
+	romvec0.pv_v2devops.v2_dev_close = (void (*)(int))obp_devclose;
1449 
+	romvec0.pv_v2devops.v2_dev_read = obp_devread;
1450 
+	romvec0.pv_v2devops.v2_dev_write = obp_devwrite;
1451 
+	romvec0.pv_v2devops.v2_dev_seek = obp_devseek;
1452 
+	obp_arg.boot_dev_ctrl = 0;
1453 
+	obp_arg.boot_dev_unit = '0';
1454 
+	obp_arg.argv[0] = "sd(0,0,0):d";
1455 
+	switch(boot_device) {
1456 
+	default:
1457 
+	case 'a':
1458 
+	    obp_arg.argv[0] = "fd()";
1459 
+	    obp_arg.boot_dev[0] = 'f';
1460 
+	    obp_arg.boot_dev[1] = 'd';
1461 
+	    break;
1462 
+	case 'd':
1463 
+	    obp_arg.boot_dev_unit = '2';
1464 
+	    obp_arg.argv[0] = "sd(0,2,0):d";
1465 
+	    // Fall through
1466 
+	case 'c':
1467 
+	    obp_arg.boot_dev[0] = 's';
1468 
+	    obp_arg.boot_dev[1] = 'd';
1469 
+	    break;
1470 
+	case 'n':
1471 
+	    obp_arg.argv[0] = "le()";
1472 
+	    obp_arg.boot_dev[0] = 'l';
1473 
+	    obp_arg.boot_dev[1] = 'e';
1474 
+	    break;
1475 
+	}
1476 
+	obp_arg.argv[1] = cmdline;
1477 
+	romvec0.pv_v2bootargs.bootpath = &obp_arg.argv[0];
1478 
+	romvec0.pv_v2bootargs.bootargs = &cmdline;
1479 
+	romvec0.pv_v2bootargs.fd_stdin = &obp_fd_stdin;
1480 
+	romvec0.pv_v2bootargs.fd_stdout = &obp_fd_stdout;
1481 
+
1482 
+	bcopy(propv_root_templ, propv_root, sizeof(propv_root_templ));
1483 
+	propv_root[4].name = "stdin-path";
1484 
+	propv_root[5].name = "stdout-path";
1485 
+	obp_fd_stdin = 0;
1486 
+	obp_fd_stdout = 1;
... This diff was truncated because it exceeds the maximum size that can be displayed.

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