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                                     offsetof(CPUAlphaState, usp), "usp");

#endif

    done_init = 1;

}

#endif

    a64_translate_init();

}

static inline TCGv_i32 load_cpu_offset(int offset)

{

    int i;

    cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");

    cc_x = tcg_global_mem_new(TCG_AREG0,

                              offsetof(CPUCRISState, cc_x), "cc_x");

    cpu_regs[R_EDI] = tcg_global_mem_new_i32(TCG_AREG0,

                                             offsetof(CPUX86State, regs[R_EDI]), "edi");

#endif

}

/* generate intermediate code in gen_opc_buf and gen_opparam_buf for

    NULL_QREG = tcg_global_mem_new(TCG_AREG0, -4, "NULL");

    store_dummy = tcg_global_mem_new(TCG_AREG0, -8, "NULL");

}

static inline void qemu_assert(int cond, const char *msg)

                          offsetof(CPUMBState, sregs[i]),

                          special_regnames[i]);

    }

}

void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)

                                       offsetof(CPUMIPSState, active_fpu.fcr31),

                                       "fcr31");

    inited = 1;

}

                                      offsetof(CPUOpenRISCState, gpr[i]),

                                      regnames[i]);

    }

}

/* Writeback SR_F transaltion-space to execution-space.  */

    cpu_access_type = tcg_global_mem_new_i32(TCG_AREG0,

                                             offsetof(CPUPPCState, access_type), "access_type");

    done_init = 1;

}

                                      offsetof(CPUS390XState, fregs[i].d),

                                      cpu_reg_names[i + 16]);

    }

}

static TCGv_i64 load_reg(int reg)

                                              offsetof(CPUSH4State, fregs[i]),

                                              fregnames[i]);

    done_init = 1;

}

                                                offsetof(CPUSPARCState, fpr[i]),

                                                fregnames[i]);

        }

    }

}

        cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,

                                offsetof(CPUUniCore32State, regs[i]), regnames[i]);

    }

}

static int num_temps;

                    uregnames[i].name);

        }

    }

}

static inline bool option_bits_enabled(DisasContext *dc, uint64_t opt)

    s->pool_current = NULL;

}

void tcg_context_init(TCGContext *s)

{

    int op, total_args, n;

        sorted_args += n;

        args_ct += n;

    }

    tcg_target_init(s);

}