Revision 5d8a4f8f tcg/i386/tcg-target.h
b/tcg/i386/tcg-target.h | ||
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*/ |
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#define TCG_TARGET_I386 1 |
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#define TCG_TARGET_REG_BITS 32 |
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#if defined(__x86_64__) |
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# define TCG_TARGET_REG_BITS 64 |
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#else |
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# define TCG_TARGET_REG_BITS 32 |
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#endif |
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//#define TCG_TARGET_WORDS_BIGENDIAN |
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#define TCG_TARGET_NB_REGS 8 |
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#if TCG_TARGET_REG_BITS == 64 |
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# define TCG_TARGET_NB_REGS 16 |
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#else |
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# define TCG_TARGET_NB_REGS 8 |
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#endif |
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enum { |
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TCG_REG_EAX = 0, |
... | ... | |
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TCG_REG_EBP, |
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TCG_REG_ESI, |
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TCG_REG_EDI, |
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/* 64-bit registers; always define the symbols to avoid |
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too much if-deffing. */ |
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TCG_REG_R8, |
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TCG_REG_R9, |
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TCG_REG_R10, |
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TCG_REG_R11, |
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TCG_REG_R12, |
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TCG_REG_R13, |
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TCG_REG_R14, |
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TCG_REG_R15, |
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TCG_REG_RAX = TCG_REG_EAX, |
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TCG_REG_RCX = TCG_REG_ECX, |
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TCG_REG_RDX = TCG_REG_EDX, |
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TCG_REG_RBX = TCG_REG_EBX, |
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TCG_REG_RSP = TCG_REG_ESP, |
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TCG_REG_RBP = TCG_REG_EBP, |
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TCG_REG_RSI = TCG_REG_ESI, |
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TCG_REG_RDI = TCG_REG_EDI, |
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}; |
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#define TCG_CT_CONST_S32 0x100 |
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#define TCG_CT_CONST_U32 0x200 |
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/* used for function call generation */ |
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#define TCG_REG_CALL_STACK TCG_REG_ESP |
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#define TCG_TARGET_STACK_ALIGN 16 |
... | ... | |
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// #define TCG_TARGET_HAS_nand_i32 |
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// #define TCG_TARGET_HAS_nor_i32 |
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#if TCG_TARGET_REG_BITS == 64 |
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#define TCG_TARGET_HAS_div2_i64 |
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#define TCG_TARGET_HAS_rot_i64 |
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#define TCG_TARGET_HAS_ext8s_i64 |
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#define TCG_TARGET_HAS_ext16s_i64 |
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#define TCG_TARGET_HAS_ext32s_i64 |
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#define TCG_TARGET_HAS_ext8u_i64 |
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#define TCG_TARGET_HAS_ext16u_i64 |
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#define TCG_TARGET_HAS_ext32u_i64 |
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#define TCG_TARGET_HAS_bswap16_i64 |
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#define TCG_TARGET_HAS_bswap32_i64 |
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#define TCG_TARGET_HAS_bswap64_i64 |
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#define TCG_TARGET_HAS_neg_i64 |
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#define TCG_TARGET_HAS_not_i64 |
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// #define TCG_TARGET_HAS_andc_i64 |
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// #define TCG_TARGET_HAS_orc_i64 |
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// #define TCG_TARGET_HAS_eqv_i64 |
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// #define TCG_TARGET_HAS_nand_i64 |
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// #define TCG_TARGET_HAS_nor_i64 |
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#endif |
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#define TCG_TARGET_HAS_GUEST_BASE |
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/* Note: must be synced with dyngen-exec.h */ |
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#define TCG_AREG0 TCG_REG_EBP |
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#if TCG_TARGET_REG_BITS == 64 |
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# define TCG_AREG0 TCG_REG_R14 |
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#else |
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# define TCG_AREG0 TCG_REG_EBP |
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#endif |
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static inline void flush_icache_range(unsigned long start, unsigned long stop) |
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{ |
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