Revision 5dcb6b91 hw/m48t59.c
| b/hw/m48t59.c | ||
|---|---|---|
| 43 | 43 |
/* Hardware parameters */ |
| 44 | 44 |
qemu_irq IRQ; |
| 45 | 45 |
int mem_index; |
| 46 |
uint32_t mem_base;
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| 46 |
target_phys_addr_t mem_base;
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| 47 | 47 |
uint32_t io_base; |
| 48 | 48 |
uint16_t size; |
| 49 | 49 |
/* RTC management */ |
| ... | ... | |
| 610 | 610 |
} |
| 611 | 611 |
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| 612 | 612 |
/* Initialisation routine */ |
| 613 |
m48t59_t *m48t59_init (qemu_irq IRQ, target_ulong mem_base,
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| 613 |
m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base,
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| 614 | 614 |
uint32_t io_base, uint16_t size, |
| 615 | 615 |
int type) |
| 616 | 616 |
{
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| 617 | 617 |
m48t59_t *s; |
| 618 |
target_ulong save_base;
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| 618 |
target_phys_addr_t save_base;
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| 619 | 619 |
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| 620 | 620 |
s = qemu_mallocz(sizeof(m48t59_t)); |
| 621 | 621 |
if (!s) |
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