Archipelago » qemu

#define TCX_TEC_NREGS    0x1000

typedef struct TCXState {

    DisplayState *ds;

    uint8_t *vram;

    uint32_t *vram24, *cplane;

{

    TCXState *s = opaque;

    qemu_put_be32s(f, (uint32_t *)&s->vram);

    qemu_put_be32s(f, (uint32_t *)&s->vram24);

    qemu_put_be32s(f, (uint32_t *)&s->cplane);

{

    TCXState *s = opaque;

        return -EINVAL;

    qemu_get_be32s(f, (uint32_t *)&s->vram);

    qemu_get_be32s(f, (uint32_t *)&s->vram24);

    qemu_get_be32s(f, (uint32_t *)&s->cplane);

    tcx_dummy_writel,

};

              unsigned long vram_offset, int vram_size, int width, int height,

              int depth)

{

    // 8-bit plane

    s->vram = vram_base;

    size = vram_size;

    vram_offset += size;

    vram_base += size;

    io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);

    dummy_memory = cpu_register_io_memory(0, tcx_dummy_read, tcx_dummy_write,

                                          s);

                                 dummy_memory);

    if (depth == 24) {

        // 24-bit plane

        size = vram_size * 4;

        s->vram24 = (uint32_t *)vram_base;

        s->vram24_offset = vram_offset;

        vram_offset += size;

        vram_base += size;

        size = vram_size * 4;

        s->cplane = (uint32_t *)vram_base;

        s->cplane_offset = vram_offset;

        graphic_console_init(s->ds, tcx24_update_display,

                             tcx24_invalidate_display, tcx24_screen_dump, s);

    } else {

                                     dummy_memory);

        graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,

                             tcx_screen_dump, s);

    }

    // NetBSD writes here even with 8-bit display

                                 dummy_memory);

    qemu_register_reset(tcx_reset, s);

    tcx_reset(s);

    dpy_resize(s->ds, width, height);