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/*
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* QEMU Sparc SLAVIO serial port emulation
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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/* debug serial */
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//#define DEBUG_SERIAL
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/* debug keyboard */
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//#define DEBUG_KBD
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/* debug mouse */
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//#define DEBUG_MOUSE
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/*
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* This is the serial port, mouse and keyboard part of chip STP2001
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* (Slave I/O), also produced as NCR89C105. See
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* http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
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*
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* The serial ports implement full AMD AM8530 or Zilog Z8530 chips,
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* mouse and keyboard ports don't implement all functions and they are
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* only asynchronous. There is no DMA.
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*
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*/
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/*
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* Modifications:
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* 2006-Aug-10 Igor Kovalenko : Renamed KBDQueue to SERIOQueue, implemented
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* serial mouse queue.
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* Implemented serial mouse protocol.
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*/
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#ifdef DEBUG_SERIAL
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#define SER_DPRINTF(fmt, args...) \
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do { printf("SER: " fmt , ##args); } while (0) |
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#else
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#define SER_DPRINTF(fmt, args...)
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#endif
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#ifdef DEBUG_KBD
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#define KBD_DPRINTF(fmt, args...) \
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do { printf("KBD: " fmt , ##args); } while (0) |
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#else
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#define KBD_DPRINTF(fmt, args...)
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#endif
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#ifdef DEBUG_MOUSE
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#define MS_DPRINTF(fmt, args...) \
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do { printf("MSC: " fmt , ##args); } while (0) |
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#else
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#define MS_DPRINTF(fmt, args...)
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#endif
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|
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typedef enum { |
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chn_a, chn_b, |
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} chn_id_t; |
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|
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#define CHN_C(s) ((s)->chn == chn_b? 'b' : 'a') |
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|
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typedef enum { |
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ser, kbd, mouse, |
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} chn_type_t; |
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|
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#define SERIO_QUEUE_SIZE 256 |
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|
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typedef struct { |
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uint8_t data[SERIO_QUEUE_SIZE]; |
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int rptr, wptr, count;
|
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} SERIOQueue; |
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|
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typedef struct ChannelState { |
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qemu_irq irq; |
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int reg;
|
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int rxint, txint, rxint_under_svc, txint_under_svc;
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chn_id_t chn; // this channel, A (base+4) or B (base+0)
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chn_type_t type; |
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struct ChannelState *otherchn;
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uint8_t rx, tx, wregs[16], rregs[16]; |
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SERIOQueue queue; |
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CharDriverState *chr; |
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} ChannelState; |
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|
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struct SerialState {
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struct ChannelState chn[2]; |
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}; |
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|
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#define SERIAL_MAXADDR 7 |
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|
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static void handle_kbd_command(ChannelState *s, int val); |
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static int serial_can_receive(void *opaque); |
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static void serial_receive_byte(ChannelState *s, int ch); |
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static inline void set_txint(ChannelState *s); |
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|
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static void clear_queue(void *opaque) |
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{
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ChannelState *s = opaque; |
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SERIOQueue *q = &s->queue; |
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q->rptr = q->wptr = q->count = 0;
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} |
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|
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static void put_queue(void *opaque, int b) |
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{
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ChannelState *s = opaque; |
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SERIOQueue *q = &s->queue; |
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|
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SER_DPRINTF("channel %c put: 0x%02x\n", CHN_C(s), b);
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if (q->count >= SERIO_QUEUE_SIZE)
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return;
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q->data[q->wptr] = b; |
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if (++q->wptr == SERIO_QUEUE_SIZE)
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q->wptr = 0;
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q->count++; |
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serial_receive_byte(s, 0);
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} |
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|
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static uint32_t get_queue(void *opaque) |
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{
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ChannelState *s = opaque; |
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SERIOQueue *q = &s->queue; |
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int val;
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|
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if (q->count == 0) { |
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return 0; |
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} else {
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val = q->data[q->rptr]; |
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if (++q->rptr == SERIO_QUEUE_SIZE)
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q->rptr = 0;
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q->count--; |
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} |
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SER_DPRINTF("channel %c get 0x%02x\n", CHN_C(s), val);
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if (q->count > 0) |
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serial_receive_byte(s, 0);
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return val;
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} |
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|
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static int slavio_serial_update_irq_chn(ChannelState *s) |
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{
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if ((s->wregs[1] & 1) && // interrupts enabled |
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(((s->wregs[1] & 2) && s->txint == 1) || // tx ints enabled, pending |
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((((s->wregs[1] & 0x18) == 8) || ((s->wregs[1] & 0x18) == 0x10)) && |
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s->rxint == 1) || // rx ints enabled, pending |
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((s->wregs[15] & 0x80) && (s->rregs[0] & 0x80)))) { // break int e&p |
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return 1; |
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} |
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return 0; |
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} |
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|
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static void slavio_serial_update_irq(ChannelState *s) |
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{
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int irq;
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irq = slavio_serial_update_irq_chn(s); |
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irq |= slavio_serial_update_irq_chn(s->otherchn); |
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SER_DPRINTF("IRQ = %d\n", irq);
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qemu_set_irq(s->irq, irq); |
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} |
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|
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static void slavio_serial_reset_chn(ChannelState *s) |
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{
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int i;
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|
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s->reg = 0;
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for (i = 0; i < SERIAL_MAXADDR; i++) { |
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s->rregs[i] = 0;
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s->wregs[i] = 0;
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} |
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s->wregs[4] = 4; |
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s->wregs[9] = 0xc0; |
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s->wregs[11] = 8; |
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s->wregs[14] = 0x30; |
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s->wregs[15] = 0xf8; |
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s->rregs[0] = 0x44; |
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s->rregs[1] = 6; |
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|
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s->rx = s->tx = 0;
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s->rxint = s->txint = 0;
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s->rxint_under_svc = s->txint_under_svc = 0;
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clear_queue(s); |
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} |
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|
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static void slavio_serial_reset(void *opaque) |
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{
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SerialState *s = opaque; |
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slavio_serial_reset_chn(&s->chn[0]);
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slavio_serial_reset_chn(&s->chn[1]);
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} |
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|
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static inline void clr_rxint(ChannelState *s) |
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{
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s->rxint = 0;
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s->rxint_under_svc = 0;
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if (s->chn == chn_a) {
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if (s->wregs[9] & 0x10) |
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s->otherchn->rregs[2] = 0x60; |
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else
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s->otherchn->rregs[2] = 0x06; |
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s->rregs[3] &= ~0x20; |
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} else {
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if (s->wregs[9] & 0x10) |
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s->rregs[2] = 0x60; |
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else
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s->rregs[2] = 0x06; |
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s->otherchn->rregs[3] &= ~4; |
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} |
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if (s->txint)
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set_txint(s); |
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slavio_serial_update_irq(s); |
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} |
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|
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static inline void set_rxint(ChannelState *s) |
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{
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s->rxint = 1;
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if (!s->txint_under_svc) {
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s->rxint_under_svc = 1;
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if (s->chn == chn_a) {
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if (s->wregs[9] & 0x10) |
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s->otherchn->rregs[2] = 0x30; |
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else
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s->otherchn->rregs[2] = 0x0c; |
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} else {
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if (s->wregs[9] & 0x10) |
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s->rregs[2] = 0x20; |
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else
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s->rregs[2] = 0x04; |
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} |
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} |
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if (s->chn == chn_a)
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s->rregs[3] |= 0x20; |
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else
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s->otherchn->rregs[3] |= 4; |
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slavio_serial_update_irq(s); |
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} |
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|
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static inline void clr_txint(ChannelState *s) |
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{
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s->txint = 0;
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s->txint_under_svc = 0;
|
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if (s->chn == chn_a) {
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if (s->wregs[9] & 0x10) |
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s->otherchn->rregs[2] = 0x60; |
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else
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s->otherchn->rregs[2] = 0x06; |
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s->rregs[3] &= ~0x10; |
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} else {
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if (s->wregs[9] & 0x10) |
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s->rregs[2] = 0x60; |
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else
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s->rregs[2] = 0x06; |
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s->otherchn->rregs[3] &= ~2; |
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} |
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if (s->rxint)
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set_rxint(s); |
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slavio_serial_update_irq(s); |
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} |
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|
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static inline void set_txint(ChannelState *s) |
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{
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s->txint = 1;
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if (!s->rxint_under_svc) {
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s->txint_under_svc = 1;
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if (s->chn == chn_a) {
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if (s->wregs[9] & 0x10) |
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s->otherchn->rregs[2] = 0x10; |
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else
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s->otherchn->rregs[2] = 0x08; |
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} else {
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s->rregs[2] = 0; |
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} |
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} |
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if (s->chn == chn_a)
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s->rregs[3] |= 0x10; |
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else
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s->otherchn->rregs[3] |= 2; |
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slavio_serial_update_irq(s); |
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} |
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|
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static void slavio_serial_update_parameters(ChannelState *s) |
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{
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int speed, parity, data_bits, stop_bits;
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QEMUSerialSetParams ssp; |
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|
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if (!s->chr || s->type != ser)
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return;
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|
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if (s->wregs[4] & 1) { |
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if (s->wregs[4] & 2) |
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parity = 'E';
|
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else
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parity = 'O';
|
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} else {
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parity = 'N';
|
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} |
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if ((s->wregs[4] & 0x0c) == 0x0c) |
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stop_bits = 2;
|
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else
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stop_bits = 1;
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switch (s->wregs[5] & 0x60) { |
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case 0x00: |
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data_bits = 5;
|
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break;
|
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case 0x20: |
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data_bits = 7;
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break;
|
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case 0x40: |
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data_bits = 6;
|
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break;
|
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default:
|
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case 0x60: |
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data_bits = 8;
|
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break;
|
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} |
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speed = 2457600 / ((s->wregs[12] | (s->wregs[13] << 8)) + 2); |
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switch (s->wregs[4] & 0xc0) { |
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case 0x00: |
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break;
|
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case 0x40: |
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speed /= 16;
|
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break;
|
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case 0x80: |
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speed /= 32;
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break;
|
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default:
|
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case 0xc0: |
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speed /= 64;
|
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break;
|
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} |
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ssp.speed = speed; |
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ssp.parity = parity; |
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ssp.data_bits = data_bits; |
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ssp.stop_bits = stop_bits; |
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SER_DPRINTF("channel %c: speed=%d parity=%c data=%d stop=%d\n", CHN_C(s),
|
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speed, parity, data_bits, stop_bits); |
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qemu_chr_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp); |
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} |
| 353 |
|
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static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
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{
|
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SerialState *ser = opaque; |
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ChannelState *s; |
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uint32_t saddr; |
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int newreg, channel;
|
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|
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val &= 0xff;
|
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saddr = (addr & 3) >> 1; |
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channel = (addr & SERIAL_MAXADDR) >> 2;
|
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s = &ser->chn[channel]; |
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switch (saddr) {
|
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case 0: |
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SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff); |
| 368 |
newreg = 0;
|
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switch (s->reg) {
|
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case 0: |
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newreg = val & 7;
|
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val &= 0x38;
|
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switch (val) {
|
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case 8: |
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newreg |= 0x8;
|
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break;
|
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case 0x28: |
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clr_txint(s); |
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break;
|
| 380 |
case 0x38: |
| 381 |
if (s->rxint_under_svc)
|
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clr_rxint(s); |
| 383 |
else if (s->txint_under_svc) |
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clr_txint(s); |
| 385 |
break;
|
| 386 |
default:
|
| 387 |
break;
|
| 388 |
} |
| 389 |
break;
|
| 390 |
case 1 ... 3: |
| 391 |
case 6 ... 8: |
| 392 |
case 10 ... 11: |
| 393 |
case 14 ... 15: |
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s->wregs[s->reg] = val; |
| 395 |
break;
|
| 396 |
case 4: |
| 397 |
case 5: |
| 398 |
case 12: |
| 399 |
case 13: |
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s->wregs[s->reg] = val; |
| 401 |
slavio_serial_update_parameters(s); |
| 402 |
break;
|
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case 9: |
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switch (val & 0xc0) { |
| 405 |
case 0: |
| 406 |
default:
|
| 407 |
break;
|
| 408 |
case 0x40: |
| 409 |
slavio_serial_reset_chn(&ser->chn[1]);
|
| 410 |
return;
|
| 411 |
case 0x80: |
| 412 |
slavio_serial_reset_chn(&ser->chn[0]);
|
| 413 |
return;
|
| 414 |
case 0xc0: |
| 415 |
slavio_serial_reset(ser); |
| 416 |
return;
|
| 417 |
} |
| 418 |
break;
|
| 419 |
default:
|
| 420 |
break;
|
| 421 |
} |
| 422 |
if (s->reg == 0) |
| 423 |
s->reg = newreg; |
| 424 |
else
|
| 425 |
s->reg = 0;
|
| 426 |
break;
|
| 427 |
case 1: |
| 428 |
SER_DPRINTF("Write channel %c, ch %d\n", CHN_C(s), val);
|
| 429 |
if (s->wregs[5] & 8) { // tx enabled |
| 430 |
s->tx = val; |
| 431 |
if (s->chr)
|
| 432 |
qemu_chr_write(s->chr, &s->tx, 1);
|
| 433 |
else if (s->type == kbd) { |
| 434 |
handle_kbd_command(s, val); |
| 435 |
} |
| 436 |
s->rregs[0] |= 4; // Tx buffer empty |
| 437 |
s->rregs[1] |= 1; // All sent |
| 438 |
set_txint(s); |
| 439 |
} |
| 440 |
break;
|
| 441 |
default:
|
| 442 |
break;
|
| 443 |
} |
| 444 |
} |
| 445 |
|
| 446 |
static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr) |
| 447 |
{
|
| 448 |
SerialState *ser = opaque; |
| 449 |
ChannelState *s; |
| 450 |
uint32_t saddr; |
| 451 |
uint32_t ret; |
| 452 |
int channel;
|
| 453 |
|
| 454 |
saddr = (addr & 3) >> 1; |
| 455 |
channel = (addr & SERIAL_MAXADDR) >> 2;
|
| 456 |
s = &ser->chn[channel]; |
| 457 |
switch (saddr) {
|
| 458 |
case 0: |
| 459 |
SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]);
|
| 460 |
ret = s->rregs[s->reg]; |
| 461 |
s->reg = 0;
|
| 462 |
return ret;
|
| 463 |
case 1: |
| 464 |
s->rregs[0] &= ~1; |
| 465 |
clr_rxint(s); |
| 466 |
if (s->type == kbd || s->type == mouse)
|
| 467 |
ret = get_queue(s); |
| 468 |
else
|
| 469 |
ret = s->rx; |
| 470 |
SER_DPRINTF("Read channel %c, ch %d\n", CHN_C(s), ret);
|
| 471 |
return ret;
|
| 472 |
default:
|
| 473 |
break;
|
| 474 |
} |
| 475 |
return 0; |
| 476 |
} |
| 477 |
|
| 478 |
static int serial_can_receive(void *opaque) |
| 479 |
{
|
| 480 |
ChannelState *s = opaque; |
| 481 |
int ret;
|
| 482 |
|
| 483 |
if (((s->wregs[3] & 1) == 0) // Rx not enabled |
| 484 |
|| ((s->rregs[0] & 1) == 1)) // char already available |
| 485 |
ret = 0;
|
| 486 |
else
|
| 487 |
ret = 1;
|
| 488 |
//SER_DPRINTF("channel %c can receive %d\n", CHN_C(s), ret);
|
| 489 |
return ret;
|
| 490 |
} |
| 491 |
|
| 492 |
static void serial_receive_byte(ChannelState *s, int ch) |
| 493 |
{
|
| 494 |
SER_DPRINTF("channel %c put ch %d\n", CHN_C(s), ch);
|
| 495 |
s->rregs[0] |= 1; |
| 496 |
s->rx = ch; |
| 497 |
set_rxint(s); |
| 498 |
} |
| 499 |
|
| 500 |
static void serial_receive_break(ChannelState *s) |
| 501 |
{
|
| 502 |
s->rregs[0] |= 0x80; |
| 503 |
slavio_serial_update_irq(s); |
| 504 |
} |
| 505 |
|
| 506 |
static void serial_receive1(void *opaque, const uint8_t *buf, int size) |
| 507 |
{
|
| 508 |
ChannelState *s = opaque; |
| 509 |
serial_receive_byte(s, buf[0]);
|
| 510 |
} |
| 511 |
|
| 512 |
static void serial_event(void *opaque, int event) |
| 513 |
{
|
| 514 |
ChannelState *s = opaque; |
| 515 |
if (event == CHR_EVENT_BREAK)
|
| 516 |
serial_receive_break(s); |
| 517 |
} |
| 518 |
|
| 519 |
static CPUReadMemoryFunc *slavio_serial_mem_read[3] = { |
| 520 |
slavio_serial_mem_readb, |
| 521 |
slavio_serial_mem_readb, |
| 522 |
slavio_serial_mem_readb, |
| 523 |
}; |
| 524 |
|
| 525 |
static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = { |
| 526 |
slavio_serial_mem_writeb, |
| 527 |
slavio_serial_mem_writeb, |
| 528 |
slavio_serial_mem_writeb, |
| 529 |
}; |
| 530 |
|
| 531 |
static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s) |
| 532 |
{
|
| 533 |
int tmp;
|
| 534 |
tmp = 0;
|
| 535 |
qemu_put_be32s(f, &tmp); /* unused, was IRQ. */
|
| 536 |
qemu_put_be32s(f, &s->reg); |
| 537 |
qemu_put_be32s(f, &s->rxint); |
| 538 |
qemu_put_be32s(f, &s->txint); |
| 539 |
qemu_put_be32s(f, &s->rxint_under_svc); |
| 540 |
qemu_put_be32s(f, &s->txint_under_svc); |
| 541 |
qemu_put_8s(f, &s->rx); |
| 542 |
qemu_put_8s(f, &s->tx); |
| 543 |
qemu_put_buffer(f, s->wregs, 16);
|
| 544 |
qemu_put_buffer(f, s->rregs, 16);
|
| 545 |
} |
| 546 |
|
| 547 |
static void slavio_serial_save(QEMUFile *f, void *opaque) |
| 548 |
{
|
| 549 |
SerialState *s = opaque; |
| 550 |
|
| 551 |
slavio_serial_save_chn(f, &s->chn[0]);
|
| 552 |
slavio_serial_save_chn(f, &s->chn[1]);
|
| 553 |
} |
| 554 |
|
| 555 |
static int slavio_serial_load_chn(QEMUFile *f, ChannelState *s, int version_id) |
| 556 |
{
|
| 557 |
int tmp;
|
| 558 |
|
| 559 |
if (version_id > 2) |
| 560 |
return -EINVAL;
|
| 561 |
|
| 562 |
qemu_get_be32s(f, &tmp); /* unused */
|
| 563 |
qemu_get_be32s(f, &s->reg); |
| 564 |
qemu_get_be32s(f, &s->rxint); |
| 565 |
qemu_get_be32s(f, &s->txint); |
| 566 |
if (version_id >= 2) { |
| 567 |
qemu_get_be32s(f, &s->rxint_under_svc); |
| 568 |
qemu_get_be32s(f, &s->txint_under_svc); |
| 569 |
} |
| 570 |
qemu_get_8s(f, &s->rx); |
| 571 |
qemu_get_8s(f, &s->tx); |
| 572 |
qemu_get_buffer(f, s->wregs, 16);
|
| 573 |
qemu_get_buffer(f, s->rregs, 16);
|
| 574 |
return 0; |
| 575 |
} |
| 576 |
|
| 577 |
static int slavio_serial_load(QEMUFile *f, void *opaque, int version_id) |
| 578 |
{
|
| 579 |
SerialState *s = opaque; |
| 580 |
int ret;
|
| 581 |
|
| 582 |
ret = slavio_serial_load_chn(f, &s->chn[0], version_id);
|
| 583 |
if (ret != 0) |
| 584 |
return ret;
|
| 585 |
ret = slavio_serial_load_chn(f, &s->chn[1], version_id);
|
| 586 |
return ret;
|
| 587 |
|
| 588 |
} |
| 589 |
|
| 590 |
SerialState *slavio_serial_init(target_phys_addr_t base, qemu_irq irq, |
| 591 |
CharDriverState *chr1, CharDriverState *chr2) |
| 592 |
{
|
| 593 |
int slavio_serial_io_memory, i;
|
| 594 |
SerialState *s; |
| 595 |
|
| 596 |
s = qemu_mallocz(sizeof(SerialState));
|
| 597 |
if (!s)
|
| 598 |
return NULL; |
| 599 |
|
| 600 |
slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s);
|
| 601 |
cpu_register_physical_memory(base, SERIAL_MAXADDR, slavio_serial_io_memory); |
| 602 |
|
| 603 |
s->chn[0].chr = chr1;
|
| 604 |
s->chn[1].chr = chr2;
|
| 605 |
|
| 606 |
for (i = 0; i < 2; i++) { |
| 607 |
s->chn[i].irq = irq; |
| 608 |
s->chn[i].chn = 1 - i;
|
| 609 |
s->chn[i].type = ser; |
| 610 |
if (s->chn[i].chr) {
|
| 611 |
qemu_chr_add_handlers(s->chn[i].chr, serial_can_receive, |
| 612 |
serial_receive1, serial_event, &s->chn[i]); |
| 613 |
} |
| 614 |
} |
| 615 |
s->chn[0].otherchn = &s->chn[1]; |
| 616 |
s->chn[1].otherchn = &s->chn[0]; |
| 617 |
register_savevm("slavio_serial", base, 2, slavio_serial_save, slavio_serial_load, s); |
| 618 |
qemu_register_reset(slavio_serial_reset, s); |
| 619 |
slavio_serial_reset(s); |
| 620 |
return s;
|
| 621 |
} |
| 622 |
|
| 623 |
static const uint8_t keycodes[128] = { |
| 624 |
127, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 43, 53, |
| 625 |
54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 89, 76, 77, 78, |
| 626 |
79, 80, 81, 82, 83, 84, 85, 86, 87, 42, 99, 88, 100, 101, 102, 103, |
| 627 |
104, 105, 106, 107, 108, 109, 110, 47, 19, 121, 119, 5, 6, 8, 10, 12, |
| 628 |
14, 16, 17, 18, 7, 98, 23, 68, 69, 70, 71, 91, 92, 93, 125, 112, |
| 629 |
113, 114, 94, 50, 0, 0, 124, 9, 11, 0, 0, 0, 0, 0, 0, 0, |
| 630 |
90, 0, 46, 22, 13, 111, 52, 20, 96, 24, 28, 74, 27, 123, 44, 66, |
| 631 |
0, 45, 2, 4, 48, 0, 0, 21, 0, 0, 0, 0, 0, 120, 122, 67, |
| 632 |
}; |
| 633 |
|
| 634 |
static void sunkbd_event(void *opaque, int ch) |
| 635 |
{
|
| 636 |
ChannelState *s = opaque; |
| 637 |
int release = ch & 0x80; |
| 638 |
|
| 639 |
ch = keycodes[ch & 0x7f];
|
| 640 |
KBD_DPRINTF("Keycode %d (%s)\n", ch, release? "release" : "press"); |
| 641 |
put_queue(s, ch | release); |
| 642 |
} |
| 643 |
|
| 644 |
static void handle_kbd_command(ChannelState *s, int val) |
| 645 |
{
|
| 646 |
KBD_DPRINTF("Command %d\n", val);
|
| 647 |
switch (val) {
|
| 648 |
case 1: // Reset, return type code |
| 649 |
clear_queue(s); |
| 650 |
put_queue(s, 0xff);
|
| 651 |
put_queue(s, 4); // Type 4 |
| 652 |
break;
|
| 653 |
case 7: // Query layout |
| 654 |
case 0xf: |
| 655 |
clear_queue(s); |
| 656 |
put_queue(s, 0xfe);
|
| 657 |
put_queue(s, 19); // XXX, layout? |
| 658 |
break;
|
| 659 |
default:
|
| 660 |
break;
|
| 661 |
} |
| 662 |
} |
| 663 |
|
| 664 |
static void sunmouse_event(void *opaque, |
| 665 |
int dx, int dy, int dz, int buttons_state) |
| 666 |
{
|
| 667 |
ChannelState *s = opaque; |
| 668 |
int ch;
|
| 669 |
|
| 670 |
MS_DPRINTF("dx=%d dy=%d buttons=%01x\n", dx, dy, buttons_state);
|
| 671 |
|
| 672 |
ch = 0x80 | 0x7; /* protocol start byte, no buttons pressed */ |
| 673 |
|
| 674 |
if (buttons_state & MOUSE_EVENT_LBUTTON)
|
| 675 |
ch ^= 0x4;
|
| 676 |
if (buttons_state & MOUSE_EVENT_MBUTTON)
|
| 677 |
ch ^= 0x2;
|
| 678 |
if (buttons_state & MOUSE_EVENT_RBUTTON)
|
| 679 |
ch ^= 0x1;
|
| 680 |
|
| 681 |
put_queue(s, ch); |
| 682 |
|
| 683 |
ch = dx; |
| 684 |
|
| 685 |
if (ch > 127) |
| 686 |
ch=127;
|
| 687 |
else if (ch < -127) |
| 688 |
ch=-127;
|
| 689 |
|
| 690 |
put_queue(s, ch & 0xff);
|
| 691 |
|
| 692 |
ch = -dy; |
| 693 |
|
| 694 |
if (ch > 127) |
| 695 |
ch=127;
|
| 696 |
else if (ch < -127) |
| 697 |
ch=-127;
|
| 698 |
|
| 699 |
put_queue(s, ch & 0xff);
|
| 700 |
|
| 701 |
// MSC protocol specify two extra motion bytes
|
| 702 |
|
| 703 |
put_queue(s, 0);
|
| 704 |
put_queue(s, 0);
|
| 705 |
} |
| 706 |
|
| 707 |
void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq)
|
| 708 |
{
|
| 709 |
int slavio_serial_io_memory, i;
|
| 710 |
SerialState *s; |
| 711 |
|
| 712 |
s = qemu_mallocz(sizeof(SerialState));
|
| 713 |
if (!s)
|
| 714 |
return;
|
| 715 |
for (i = 0; i < 2; i++) { |
| 716 |
s->chn[i].irq = irq; |
| 717 |
s->chn[i].chn = 1 - i;
|
| 718 |
s->chn[i].chr = NULL;
|
| 719 |
} |
| 720 |
s->chn[0].otherchn = &s->chn[1]; |
| 721 |
s->chn[1].otherchn = &s->chn[0]; |
| 722 |
s->chn[0].type = mouse;
|
| 723 |
s->chn[1].type = kbd;
|
| 724 |
|
| 725 |
slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s);
|
| 726 |
cpu_register_physical_memory(base, SERIAL_MAXADDR, slavio_serial_io_memory); |
| 727 |
|
| 728 |
qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0, "QEMU Sun Mouse"); |
| 729 |
qemu_add_kbd_event_handler(sunkbd_event, &s->chn[1]);
|
| 730 |
register_savevm("slavio_serial_mouse", base, 2, slavio_serial_save, slavio_serial_load, s); |
| 731 |
qemu_register_reset(slavio_serial_reset, s); |
| 732 |
slavio_serial_reset(s); |
| 733 |
} |