Revision 5deaeee3
| b/hw/cirrus_vga.c | ||
|---|---|---|
| 1419 | 1419 |
* |
| 1420 | 1420 |
***************************************/ |
| 1421 | 1421 |
|
| 1422 |
static int cirrus_hook_read_palette(CirrusVGAState * s, int *reg_value)
|
|
| 1422 |
static int cirrus_vga_read_palette(CirrusVGAState * s)
|
|
| 1423 | 1423 |
{
|
| 1424 |
if (!(s->vga.sr[0x12] & CIRRUS_CURSOR_HIDDENPEL)) |
|
| 1425 |
return CIRRUS_HOOK_NOT_HANDLED; |
|
| 1426 |
*reg_value = |
|
| 1427 |
s->cirrus_hidden_palette[(s->vga.dac_read_index & 0x0f) * 3 + |
|
| 1428 |
s->vga.dac_sub_index]; |
|
| 1424 |
int val; |
|
| 1425 |
|
|
| 1426 |
if ((s->vga.sr[0x12] & CIRRUS_CURSOR_HIDDENPEL)) {
|
|
| 1427 |
val = s->cirrus_hidden_palette[(s->vga.dac_read_index & 0x0f) * 3 + |
|
| 1428 |
s->vga.dac_sub_index]; |
|
| 1429 |
} else {
|
|
| 1430 |
val = s->vga.palette[s->vga.dac_read_index * 3 + s->vga.dac_sub_index]; |
|
| 1431 |
} |
|
| 1429 | 1432 |
if (++s->vga.dac_sub_index == 3) {
|
| 1430 | 1433 |
s->vga.dac_sub_index = 0; |
| 1431 | 1434 |
s->vga.dac_read_index++; |
| 1432 | 1435 |
} |
| 1433 |
return CIRRUS_HOOK_HANDLED;
|
|
| 1436 |
return val;
|
|
| 1434 | 1437 |
} |
| 1435 | 1438 |
|
| 1436 | 1439 |
static int cirrus_hook_write_palette(CirrusVGAState * s, int reg_value) |
| ... | ... | |
| 2698 | 2701 |
c->cirrus_hidden_dac_lockindex = 0; |
| 2699 | 2702 |
break; |
| 2700 | 2703 |
case 0x3c9: |
| 2701 |
if (cirrus_hook_read_palette(c, &val)) |
|
| 2702 |
break; |
|
| 2703 |
val = s->palette[s->dac_read_index * 3 + s->dac_sub_index]; |
|
| 2704 |
if (++s->dac_sub_index == 3) {
|
|
| 2705 |
s->dac_sub_index = 0; |
|
| 2706 |
s->dac_read_index++; |
|
| 2707 |
} |
|
| 2708 |
break; |
|
| 2704 |
val = cirrus_vga_read_palette(c); |
|
| 2705 |
break; |
|
| 2709 | 2706 |
case 0x3ca: |
| 2710 | 2707 |
val = s->fcr; |
| 2711 | 2708 |
break; |
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