Revision 5e3f878a target-arm/op.c
b/target-arm/op.c | ||
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OPSUB(rsb, rsc, T0, T1, T0) |
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void OPPROTO op_addq_T0_T1(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)T1 << 32) | T0; |
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res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]); |
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T1 = res >> 32; |
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T0 = res; |
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} |
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void OPPROTO op_addq_lo_T0_T1(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)T1 << 32) | T0; |
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res += (uint64_t)(env->regs[PARAM1]); |
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T1 = res >> 32; |
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T0 = res; |
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} |
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/* Dual 16-bit accumulate. */ |
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void OPPROTO op_addq_T0_T1_dual(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]); |
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res += (int32_t)T0; |
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res += (int32_t)T1; |
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env->regs[PARAM1] = (uint32_t)res; |
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env->regs[PARAM2] = res >> 32; |
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} |
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/* Dual 16-bit subtract accumulate. */ |
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void OPPROTO op_subq_T0_T1_dual(void) |
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{ |
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uint64_t res; |
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res = ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]); |
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res += (int32_t)T0; |
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res -= (int32_t)T1; |
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env->regs[PARAM1] = (uint32_t)res; |
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env->regs[PARAM2] = res >> 32; |
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} |
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void OPPROTO op_logicq_cc(void) |
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{ |
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env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0); |
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} |
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/* memory access */ |
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#define MEMSUFFIX _raw |
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