Revision 5f06b547 target-sparc/translate.c
| b/target-sparc/translate.c | ||
|---|---|---|
| 4732 | 4732 |
switch (xop) {
|
| 4733 | 4733 |
#ifdef TARGET_SPARC64 |
| 4734 | 4734 |
case 0x34: /* V9 stfa */ |
| 4735 |
if (gen_trap_ifnofpu(dc, cpu_cond)) {
|
|
| 4736 |
goto jmp_insn; |
|
| 4737 |
} |
|
| 4735 | 4738 |
gen_stf_asi(cpu_addr, insn, 4, rd); |
| 4736 | 4739 |
break; |
| 4737 | 4740 |
case 0x36: /* V9 stqfa */ |
| ... | ... | |
| 4739 | 4742 |
TCGv_i32 r_const; |
| 4740 | 4743 |
|
| 4741 | 4744 |
CHECK_FPU_FEATURE(dc, FLOAT128); |
| 4745 |
if (gen_trap_ifnofpu(dc, cpu_cond)) {
|
|
| 4746 |
goto jmp_insn; |
|
| 4747 |
} |
|
| 4742 | 4748 |
r_const = tcg_const_i32(7); |
| 4743 | 4749 |
gen_helper_check_align(cpu_addr, r_const); |
| 4744 | 4750 |
tcg_temp_free_i32(r_const); |
| ... | ... | |
| 4746 | 4752 |
} |
| 4747 | 4753 |
break; |
| 4748 | 4754 |
case 0x37: /* V9 stdfa */ |
| 4755 |
if (gen_trap_ifnofpu(dc, cpu_cond)) {
|
|
| 4756 |
goto jmp_insn; |
|
| 4757 |
} |
|
| 4749 | 4758 |
gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); |
| 4750 | 4759 |
break; |
| 4751 | 4760 |
case 0x3c: /* V9 casa */ |
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