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1 | b9adb4a6 | bellard | /* General "disassemble this chunk" code. Used for debugging. */
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2 | 5bbe9299 | bellard | #include "config.h" |
3 | b9adb4a6 | bellard | #include "dis-asm.h" |
4 | b9adb4a6 | bellard | #include "elf.h" |
5 | aa0aa4fa | bellard | #include <errno.h> |
6 | b9adb4a6 | bellard | |
7 | c6105c0a | bellard | #include "cpu.h" |
8 | c6105c0a | bellard | #include "exec-all.h" |
9 | 9307c4c1 | bellard | #include "disas.h" |
10 | c6105c0a | bellard | |
11 | b9adb4a6 | bellard | /* Filled in by elfload.c. Simplistic, but will do for now. */
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12 | e80cfcfc | bellard | struct syminfo *syminfos = NULL; |
13 | b9adb4a6 | bellard | |
14 | aa0aa4fa | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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15 | aa0aa4fa | bellard | Transfer them to myaddr. */
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16 | aa0aa4fa | bellard | int
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17 | aa0aa4fa | bellard | buffer_read_memory (memaddr, myaddr, length, info) |
18 | aa0aa4fa | bellard | bfd_vma memaddr; |
19 | aa0aa4fa | bellard | bfd_byte *myaddr; |
20 | aa0aa4fa | bellard | int length;
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21 | aa0aa4fa | bellard | struct disassemble_info *info;
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22 | aa0aa4fa | bellard | { |
23 | c6105c0a | bellard | if (memaddr < info->buffer_vma
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24 | c6105c0a | bellard | || memaddr + length > info->buffer_vma + info->buffer_length) |
25 | c6105c0a | bellard | /* Out of bounds. Use EIO because GDB uses it. */
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26 | c6105c0a | bellard | return EIO;
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27 | c6105c0a | bellard | memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); |
28 | c6105c0a | bellard | return 0; |
29 | aa0aa4fa | bellard | } |
30 | aa0aa4fa | bellard | |
31 | c6105c0a | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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32 | c6105c0a | bellard | Transfer them to myaddr. */
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33 | c6105c0a | bellard | static int |
34 | c27004ec | bellard | target_read_memory (bfd_vma memaddr, |
35 | c27004ec | bellard | bfd_byte *myaddr, |
36 | c27004ec | bellard | int length,
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37 | c27004ec | bellard | struct disassemble_info *info)
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38 | c6105c0a | bellard | { |
39 | c6105c0a | bellard | int i;
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40 | c6105c0a | bellard | for(i = 0; i < length; i++) { |
41 | c27004ec | bellard | myaddr[i] = ldub_code(memaddr + i); |
42 | c6105c0a | bellard | } |
43 | c6105c0a | bellard | return 0; |
44 | c6105c0a | bellard | } |
45 | c6105c0a | bellard | |
46 | aa0aa4fa | bellard | /* Print an error message. We can assume that this is in response to
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47 | aa0aa4fa | bellard | an error return from buffer_read_memory. */
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48 | aa0aa4fa | bellard | void
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49 | aa0aa4fa | bellard | perror_memory (status, memaddr, info) |
50 | aa0aa4fa | bellard | int status;
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51 | aa0aa4fa | bellard | bfd_vma memaddr; |
52 | aa0aa4fa | bellard | struct disassemble_info *info;
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53 | aa0aa4fa | bellard | { |
54 | aa0aa4fa | bellard | if (status != EIO)
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55 | aa0aa4fa | bellard | /* Can't happen. */
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56 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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57 | aa0aa4fa | bellard | else
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58 | aa0aa4fa | bellard | /* Actually, address between memaddr and memaddr + len was
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59 | aa0aa4fa | bellard | out of bounds. */
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60 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, |
61 | 26a76461 | bellard | "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); |
62 | aa0aa4fa | bellard | } |
63 | aa0aa4fa | bellard | |
64 | aa0aa4fa | bellard | /* This could be in a separate file, to save miniscule amounts of space
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65 | aa0aa4fa | bellard | in statically linked executables. */
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66 | aa0aa4fa | bellard | |
67 | aa0aa4fa | bellard | /* Just print the address is hex. This is included for completeness even
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68 | aa0aa4fa | bellard | though both GDB and objdump provide their own (to print symbolic
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69 | aa0aa4fa | bellard | addresses). */
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70 | aa0aa4fa | bellard | |
71 | aa0aa4fa | bellard | void
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72 | aa0aa4fa | bellard | generic_print_address (addr, info) |
73 | aa0aa4fa | bellard | bfd_vma addr; |
74 | aa0aa4fa | bellard | struct disassemble_info *info;
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75 | aa0aa4fa | bellard | { |
76 | 26a76461 | bellard | (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
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77 | aa0aa4fa | bellard | } |
78 | aa0aa4fa | bellard | |
79 | aa0aa4fa | bellard | /* Just return the given address. */
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80 | aa0aa4fa | bellard | |
81 | aa0aa4fa | bellard | int
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82 | aa0aa4fa | bellard | generic_symbol_at_address (addr, info) |
83 | aa0aa4fa | bellard | bfd_vma addr; |
84 | aa0aa4fa | bellard | struct disassemble_info * info;
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85 | aa0aa4fa | bellard | { |
86 | aa0aa4fa | bellard | return 1; |
87 | aa0aa4fa | bellard | } |
88 | aa0aa4fa | bellard | |
89 | aa0aa4fa | bellard | bfd_vma bfd_getl32 (const bfd_byte *addr)
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90 | aa0aa4fa | bellard | { |
91 | aa0aa4fa | bellard | unsigned long v; |
92 | aa0aa4fa | bellard | |
93 | aa0aa4fa | bellard | v = (unsigned long) addr[0]; |
94 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 8; |
95 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 16; |
96 | aa0aa4fa | bellard | v |= (unsigned long) addr[3] << 24; |
97 | aa0aa4fa | bellard | return (bfd_vma) v;
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98 | aa0aa4fa | bellard | } |
99 | aa0aa4fa | bellard | |
100 | aa0aa4fa | bellard | bfd_vma bfd_getb32 (const bfd_byte *addr)
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101 | aa0aa4fa | bellard | { |
102 | aa0aa4fa | bellard | unsigned long v; |
103 | aa0aa4fa | bellard | |
104 | aa0aa4fa | bellard | v = (unsigned long) addr[0] << 24; |
105 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 16; |
106 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 8; |
107 | aa0aa4fa | bellard | v |= (unsigned long) addr[3]; |
108 | aa0aa4fa | bellard | return (bfd_vma) v;
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109 | aa0aa4fa | bellard | } |
110 | aa0aa4fa | bellard | |
111 | 6af0bf9c | bellard | bfd_vma bfd_getl16 (const bfd_byte *addr)
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112 | 6af0bf9c | bellard | { |
113 | 6af0bf9c | bellard | unsigned long v; |
114 | 6af0bf9c | bellard | |
115 | 6af0bf9c | bellard | v = (unsigned long) addr[0]; |
116 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 8; |
117 | 6af0bf9c | bellard | return (bfd_vma) v;
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118 | 6af0bf9c | bellard | } |
119 | 6af0bf9c | bellard | |
120 | 6af0bf9c | bellard | bfd_vma bfd_getb16 (const bfd_byte *addr)
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121 | 6af0bf9c | bellard | { |
122 | 6af0bf9c | bellard | unsigned long v; |
123 | 6af0bf9c | bellard | |
124 | 6af0bf9c | bellard | v = (unsigned long) addr[0] << 24; |
125 | 6af0bf9c | bellard | v |= (unsigned long) addr[1] << 16; |
126 | 6af0bf9c | bellard | return (bfd_vma) v;
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127 | 6af0bf9c | bellard | } |
128 | 6af0bf9c | bellard | |
129 | c2d551ff | bellard | #ifdef TARGET_ARM
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130 | c2d551ff | bellard | static int |
131 | c2d551ff | bellard | print_insn_thumb1(bfd_vma pc, disassemble_info *info) |
132 | c2d551ff | bellard | { |
133 | c2d551ff | bellard | return print_insn_arm(pc | 1, info); |
134 | c2d551ff | bellard | } |
135 | c2d551ff | bellard | #endif
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136 | c2d551ff | bellard | |
137 | e91c8a77 | ths | /* Disassemble this for me please... (debugging). 'flags' has the following
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138 | c2d551ff | bellard | values:
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139 | c2d551ff | bellard | i386 - nonzero means 16 bit code
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140 | 5fafdf24 | ths | arm - nonzero means thumb code
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141 | 6a00d601 | bellard | ppc - nonzero means little endian
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142 | c2d551ff | bellard | other targets - unused
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143 | c2d551ff | bellard | */
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144 | 83b34f8b | bellard | void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) |
145 | b9adb4a6 | bellard | { |
146 | c27004ec | bellard | target_ulong pc; |
147 | b9adb4a6 | bellard | int count;
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148 | b9adb4a6 | bellard | struct disassemble_info disasm_info;
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149 | b9adb4a6 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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150 | b9adb4a6 | bellard | |
151 | b9adb4a6 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
152 | b9adb4a6 | bellard | |
153 | c27004ec | bellard | disasm_info.read_memory_func = target_read_memory; |
154 | c27004ec | bellard | disasm_info.buffer_vma = code; |
155 | c27004ec | bellard | disasm_info.buffer_length = size; |
156 | c27004ec | bellard | |
157 | c27004ec | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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158 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
159 | c27004ec | bellard | #else
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160 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
161 | c27004ec | bellard | #endif
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162 | c27004ec | bellard | #if defined(TARGET_I386)
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163 | c27004ec | bellard | if (flags == 2) |
164 | c27004ec | bellard | disasm_info.mach = bfd_mach_x86_64; |
165 | 5fafdf24 | ths | else if (flags == 1) |
166 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
167 | c27004ec | bellard | else
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168 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i386; |
169 | c27004ec | bellard | print_insn = print_insn_i386; |
170 | c27004ec | bellard | #elif defined(TARGET_ARM)
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171 | c2d551ff | bellard | if (flags)
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172 | c2d551ff | bellard | print_insn = print_insn_thumb1; |
173 | c2d551ff | bellard | else
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174 | c2d551ff | bellard | print_insn = print_insn_arm; |
175 | c27004ec | bellard | #elif defined(TARGET_SPARC)
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176 | c27004ec | bellard | print_insn = print_insn_sparc; |
177 | 3475187d | bellard | #ifdef TARGET_SPARC64
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178 | 3475187d | bellard | disasm_info.mach = bfd_mach_sparc_v9b; |
179 | 5fafdf24 | ths | #endif
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180 | c27004ec | bellard | #elif defined(TARGET_PPC)
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181 | 6a00d601 | bellard | if (flags)
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182 | 111bfab3 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
183 | a2458627 | bellard | #ifdef TARGET_PPC64
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184 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc64; |
185 | a2458627 | bellard | #else
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186 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc; |
187 | a2458627 | bellard | #endif
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188 | c27004ec | bellard | print_insn = print_insn_ppc; |
189 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
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190 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
191 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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192 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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193 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
194 | 76b3030c | bellard | #else
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195 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
196 | 76b3030c | bellard | #endif
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197 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
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198 | fdf9b3e8 | bellard | disasm_info.mach = bfd_mach_sh4; |
199 | fdf9b3e8 | bellard | print_insn = print_insn_sh; |
200 | eddf68a6 | j_mayer | #elif defined(TARGET_ALPHA)
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201 | eddf68a6 | j_mayer | disasm_info.mach = bfd_mach_alpha; |
202 | eddf68a6 | j_mayer | print_insn = print_insn_alpha; |
203 | c27004ec | bellard | #else
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204 | b8076a74 | bellard | fprintf(out, "0x" TARGET_FMT_lx
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205 | b8076a74 | bellard | ": Asm output not supported on this arch\n", code);
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206 | c27004ec | bellard | return;
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207 | c6105c0a | bellard | #endif
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208 | c6105c0a | bellard | |
209 | c27004ec | bellard | for (pc = code; pc < code + size; pc += count) {
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210 | fa15e030 | bellard | fprintf(out, "0x" TARGET_FMT_lx ": ", pc); |
211 | c27004ec | bellard | count = print_insn(pc, &disasm_info); |
212 | c27004ec | bellard | #if 0
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213 | c27004ec | bellard | {
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214 | c27004ec | bellard | int i;
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215 | c27004ec | bellard | uint8_t b;
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216 | c27004ec | bellard | fprintf(out, " {");
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217 | c27004ec | bellard | for(i = 0; i < count; i++) {
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218 | c27004ec | bellard | target_read_memory(pc + i, &b, 1, &disasm_info);
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219 | c27004ec | bellard | fprintf(out, " %02x", b);
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220 | c27004ec | bellard | }
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221 | c27004ec | bellard | fprintf(out, " }");
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222 | c27004ec | bellard | }
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223 | c27004ec | bellard | #endif
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224 | c27004ec | bellard | fprintf(out, "\n");
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225 | c27004ec | bellard | if (count < 0) |
226 | c27004ec | bellard | break;
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227 | c27004ec | bellard | } |
228 | c27004ec | bellard | } |
229 | c27004ec | bellard | |
230 | c27004ec | bellard | /* Disassemble this for me please... (debugging). */
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231 | c27004ec | bellard | void disas(FILE *out, void *code, unsigned long size) |
232 | c27004ec | bellard | { |
233 | c27004ec | bellard | unsigned long pc; |
234 | c27004ec | bellard | int count;
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235 | c27004ec | bellard | struct disassemble_info disasm_info;
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236 | c27004ec | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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237 | c27004ec | bellard | |
238 | c27004ec | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
239 | c27004ec | bellard | |
240 | b9adb4a6 | bellard | disasm_info.buffer = code; |
241 | b9adb4a6 | bellard | disasm_info.buffer_vma = (unsigned long)code; |
242 | b9adb4a6 | bellard | disasm_info.buffer_length = size; |
243 | b9adb4a6 | bellard | |
244 | b9adb4a6 | bellard | #ifdef WORDS_BIGENDIAN
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245 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
246 | b9adb4a6 | bellard | #else
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247 | c27004ec | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
248 | b9adb4a6 | bellard | #endif
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249 | bc51c5c9 | bellard | #if defined(__i386__)
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250 | c27004ec | bellard | disasm_info.mach = bfd_mach_i386_i386; |
251 | c27004ec | bellard | print_insn = print_insn_i386; |
252 | bc51c5c9 | bellard | #elif defined(__x86_64__)
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253 | c27004ec | bellard | disasm_info.mach = bfd_mach_x86_64; |
254 | c27004ec | bellard | print_insn = print_insn_i386; |
255 | b9adb4a6 | bellard | #elif defined(__powerpc__)
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256 | c27004ec | bellard | print_insn = print_insn_ppc; |
257 | a993ba85 | bellard | #elif defined(__alpha__)
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258 | c27004ec | bellard | print_insn = print_insn_alpha; |
259 | aa0aa4fa | bellard | #elif defined(__sparc__)
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260 | c27004ec | bellard | print_insn = print_insn_sparc; |
261 | 6ecd4534 | blueswir1 | #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
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262 | 6ecd4534 | blueswir1 | disasm_info.mach = bfd_mach_sparc_v9b; |
263 | 6ecd4534 | blueswir1 | #endif
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264 | 5fafdf24 | ths | #elif defined(__arm__)
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265 | c27004ec | bellard | print_insn = print_insn_arm; |
266 | 6af0bf9c | bellard | #elif defined(__MIPSEB__)
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267 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
268 | 6af0bf9c | bellard | #elif defined(__MIPSEL__)
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269 | 6af0bf9c | bellard | print_insn = print_insn_little_mips; |
270 | 48024e4a | bellard | #elif defined(__m68k__)
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271 | 48024e4a | bellard | print_insn = print_insn_m68k; |
272 | 8f860bb8 | ths | #elif defined(__s390__)
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273 | 8f860bb8 | ths | print_insn = print_insn_s390; |
274 | b9adb4a6 | bellard | #else
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275 | b8076a74 | bellard | fprintf(out, "0x%lx: Asm output not supported on this arch\n",
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276 | b8076a74 | bellard | (long) code);
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277 | c27004ec | bellard | return;
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278 | b9adb4a6 | bellard | #endif
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279 | c27004ec | bellard | for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) { |
280 | c27004ec | bellard | fprintf(out, "0x%08lx: ", pc);
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281 | aa0aa4fa | bellard | #ifdef __arm__
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282 | 46152182 | pbrook | /* since data is included in the code, it is better to
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283 | aa0aa4fa | bellard | display code data too */
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284 | 46152182 | pbrook | fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc)); |
285 | aa0aa4fa | bellard | #endif
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286 | c27004ec | bellard | count = print_insn(pc, &disasm_info); |
287 | b9adb4a6 | bellard | fprintf(out, "\n");
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288 | b9adb4a6 | bellard | if (count < 0) |
289 | b9adb4a6 | bellard | break;
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290 | b9adb4a6 | bellard | } |
291 | b9adb4a6 | bellard | } |
292 | b9adb4a6 | bellard | |
293 | b9adb4a6 | bellard | /* Look up symbol for debugging purpose. Returns "" if unknown. */
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294 | c27004ec | bellard | const char *lookup_symbol(target_ulong orig_addr) |
295 | b9adb4a6 | bellard | { |
296 | b9adb4a6 | bellard | unsigned int i; |
297 | b9adb4a6 | bellard | /* Hack, because we know this is x86. */
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298 | e80cfcfc | bellard | Elf32_Sym *sym; |
299 | e80cfcfc | bellard | struct syminfo *s;
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300 | b3ecf620 | bellard | target_ulong addr; |
301 | 5fafdf24 | ths | |
302 | e80cfcfc | bellard | for (s = syminfos; s; s = s->next) {
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303 | e80cfcfc | bellard | sym = s->disas_symtab; |
304 | e80cfcfc | bellard | for (i = 0; i < s->disas_num_syms; i++) { |
305 | e80cfcfc | bellard | if (sym[i].st_shndx == SHN_UNDEF
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306 | e80cfcfc | bellard | || sym[i].st_shndx >= SHN_LORESERVE) |
307 | e80cfcfc | bellard | continue;
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308 | b9adb4a6 | bellard | |
309 | e80cfcfc | bellard | if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
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310 | e80cfcfc | bellard | continue;
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311 | b9adb4a6 | bellard | |
312 | b3ecf620 | bellard | addr = sym[i].st_value; |
313 | a8fcf883 | ths | #if defined(TARGET_ARM) || defined (TARGET_MIPS)
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314 | a8fcf883 | ths | /* The bottom address bit marks a Thumb or MIPS16 symbol. */
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315 | b3ecf620 | bellard | addr &= ~(target_ulong)1;
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316 | b3ecf620 | bellard | #endif
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317 | b3ecf620 | bellard | if (orig_addr >= addr
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318 | b3ecf620 | bellard | && orig_addr < addr + sym[i].st_size) |
319 | e80cfcfc | bellard | return s->disas_strtab + sym[i].st_name;
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320 | e80cfcfc | bellard | } |
321 | b9adb4a6 | bellard | } |
322 | b9adb4a6 | bellard | return ""; |
323 | b9adb4a6 | bellard | } |
324 | 9307c4c1 | bellard | |
325 | 9307c4c1 | bellard | #if !defined(CONFIG_USER_ONLY)
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326 | 9307c4c1 | bellard | |
327 | 3d2cfdf1 | bellard | void term_vprintf(const char *fmt, va_list ap); |
328 | 3d2cfdf1 | bellard | void term_printf(const char *fmt, ...); |
329 | 3d2cfdf1 | bellard | |
330 | 9307c4c1 | bellard | static int monitor_disas_is_physical; |
331 | 6a00d601 | bellard | static CPUState *monitor_disas_env;
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332 | 9307c4c1 | bellard | |
333 | 9307c4c1 | bellard | static int |
334 | 9307c4c1 | bellard | monitor_read_memory (memaddr, myaddr, length, info) |
335 | 9307c4c1 | bellard | bfd_vma memaddr; |
336 | 9307c4c1 | bellard | bfd_byte *myaddr; |
337 | 9307c4c1 | bellard | int length;
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338 | 9307c4c1 | bellard | struct disassemble_info *info;
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339 | 9307c4c1 | bellard | { |
340 | 9307c4c1 | bellard | if (monitor_disas_is_physical) {
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341 | 9307c4c1 | bellard | cpu_physical_memory_rw(memaddr, myaddr, length, 0);
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342 | 9307c4c1 | bellard | } else {
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343 | 6a00d601 | bellard | cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
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344 | 9307c4c1 | bellard | } |
345 | 9307c4c1 | bellard | return 0; |
346 | 9307c4c1 | bellard | } |
347 | 9307c4c1 | bellard | |
348 | 3d2cfdf1 | bellard | static int monitor_fprintf(FILE *stream, const char *fmt, ...) |
349 | 3d2cfdf1 | bellard | { |
350 | 3d2cfdf1 | bellard | va_list ap; |
351 | 3d2cfdf1 | bellard | va_start(ap, fmt); |
352 | 3d2cfdf1 | bellard | term_vprintf(fmt, ap); |
353 | 3d2cfdf1 | bellard | va_end(ap); |
354 | 3d2cfdf1 | bellard | return 0; |
355 | 3d2cfdf1 | bellard | } |
356 | 3d2cfdf1 | bellard | |
357 | 6a00d601 | bellard | void monitor_disas(CPUState *env,
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358 | 6a00d601 | bellard | target_ulong pc, int nb_insn, int is_physical, int flags) |
359 | 9307c4c1 | bellard | { |
360 | 9307c4c1 | bellard | int count, i;
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361 | 9307c4c1 | bellard | struct disassemble_info disasm_info;
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362 | 9307c4c1 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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363 | 9307c4c1 | bellard | |
364 | 3d2cfdf1 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
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365 | 9307c4c1 | bellard | |
366 | 6a00d601 | bellard | monitor_disas_env = env; |
367 | 9307c4c1 | bellard | monitor_disas_is_physical = is_physical; |
368 | 9307c4c1 | bellard | disasm_info.read_memory_func = monitor_read_memory; |
369 | 9307c4c1 | bellard | |
370 | 9307c4c1 | bellard | disasm_info.buffer_vma = pc; |
371 | 9307c4c1 | bellard | |
372 | 9307c4c1 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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373 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
374 | 9307c4c1 | bellard | #else
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375 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
376 | 9307c4c1 | bellard | #endif
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377 | 9307c4c1 | bellard | #if defined(TARGET_I386)
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378 | fa15e030 | bellard | if (flags == 2) |
379 | fa15e030 | bellard | disasm_info.mach = bfd_mach_x86_64; |
380 | 5fafdf24 | ths | else if (flags == 1) |
381 | 9307c4c1 | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
382 | fa15e030 | bellard | else
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383 | fa15e030 | bellard | disasm_info.mach = bfd_mach_i386_i386; |
384 | 9307c4c1 | bellard | print_insn = print_insn_i386; |
385 | 9307c4c1 | bellard | #elif defined(TARGET_ARM)
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386 | 9307c4c1 | bellard | print_insn = print_insn_arm; |
387 | 9307c4c1 | bellard | #elif defined(TARGET_SPARC)
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388 | 9307c4c1 | bellard | print_insn = print_insn_sparc; |
389 | 682c4f15 | blueswir1 | #ifdef TARGET_SPARC64
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390 | 682c4f15 | blueswir1 | disasm_info.mach = bfd_mach_sparc_v9b; |
391 | 682c4f15 | blueswir1 | #endif
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392 | 9307c4c1 | bellard | #elif defined(TARGET_PPC)
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393 | a2458627 | bellard | #ifdef TARGET_PPC64
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394 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc64; |
395 | a2458627 | bellard | #else
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396 | a2458627 | bellard | disasm_info.mach = bfd_mach_ppc; |
397 | a2458627 | bellard | #endif
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398 | 9307c4c1 | bellard | print_insn = print_insn_ppc; |
399 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
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400 | e6e5906b | pbrook | print_insn = print_insn_m68k; |
401 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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402 | 76b3030c | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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403 | 6af0bf9c | bellard | print_insn = print_insn_big_mips; |
404 | 76b3030c | bellard | #else
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405 | 76b3030c | bellard | print_insn = print_insn_little_mips; |
406 | 76b3030c | bellard | #endif
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407 | 9307c4c1 | bellard | #else
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408 | b8076a74 | bellard | term_printf("0x" TARGET_FMT_lx
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409 | b8076a74 | bellard | ": Asm output not supported on this arch\n", pc);
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410 | 9307c4c1 | bellard | return;
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411 | 9307c4c1 | bellard | #endif
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412 | 9307c4c1 | bellard | |
413 | 9307c4c1 | bellard | for(i = 0; i < nb_insn; i++) { |
414 | fa15e030 | bellard | term_printf("0x" TARGET_FMT_lx ": ", pc); |
415 | 9307c4c1 | bellard | count = print_insn(pc, &disasm_info); |
416 | 3d2cfdf1 | bellard | term_printf("\n");
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417 | 9307c4c1 | bellard | if (count < 0) |
418 | 9307c4c1 | bellard | break;
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419 | 9307c4c1 | bellard | pc += count; |
420 | 9307c4c1 | bellard | } |
421 | 9307c4c1 | bellard | } |
422 | 9307c4c1 | bellard | #endif |