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/*
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 * QEMU PC System Emulator
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 *
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 * Copyright (c) 2003-2004 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "vl.h"
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin"
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#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
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#define ACPI_DATA_SIZE       0x10000
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static IOAPICState *ioapic;
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static PCIDevice *i440fx_state;
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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{
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}
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/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq;
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{
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    qemu_irq_raise(ferr_irq);
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}
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
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{
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    qemu_irq_lower(ferr_irq);
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}
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env)
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{
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    /* Note: when using kqemu, it is more logical to return the host TSC
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       because kqemu does not trap the RDTSC instruction for
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       performance reasons */
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#if USE_KQEMU
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    if (env->kqemu_enabled) {
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        return cpu_get_real_ticks();
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    } else
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#endif
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    {
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        return cpu_get_ticks();
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    }
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}
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/* SMM support */
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void cpu_smm_update(CPUState *env)
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{
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    if (i440fx_state && env == first_cpu)
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        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
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}
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{
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    int intno;
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    intno = apic_get_interrupt(env);
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    if (intno >= 0) {
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        /* set irq request if a PIC irq is still pending */
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        /* XXX: improve that */
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        pic_update_irq(isa_pic);
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        return intno;
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    }
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    /* read the irq from the PIC */
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    intno = pic_read_irq(isa_pic);
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    return intno;
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}
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static void pic_irq_request(void *opaque, int irq, int level)
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{
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    CPUState *env = opaque;
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    if (level)
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        cpu_interrupt(env, CPU_INTERRUPT_HARD);
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    else
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        cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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/* PC cmos mappings */
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#define REG_EQUIPMENT_BYTE          0x14
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static int cmos_get_fd_drive_type(int fd0)
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{
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    int val;
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    switch (fd0) {
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    case 0:
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        /* 1.44 Mb 3"5 drive */
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        val = 4;
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        break;
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    case 1:
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        /* 2.88 Mb 3"5 drive */
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        val = 5;
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        break;
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    case 2:
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        /* 1.2 Mb 5"5 drive */
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        val = 2;
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        break;
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    default:
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        val = 0;
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        break;
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    }
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    return val;
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}
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
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    RTCState *s = rtc_state;
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    int cylinders, heads, sectors;
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    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
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    rtc_set_memory(s, type_ofs, 47);
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    rtc_set_memory(s, info_ofs, cylinders);
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    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 2, heads);
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    rtc_set_memory(s, info_ofs + 3, 0xff);
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    rtc_set_memory(s, info_ofs + 4, 0xff);
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    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
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    rtc_set_memory(s, info_ofs + 6, cylinders);
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    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 8, sectors);
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}
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/* hd_table must contain 4 block drivers */
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static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
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{
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    RTCState *s = rtc_state;
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    int val;
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    int fd0, fd1, nb;
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    int i;
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    /* various important CMOS locations needed by PC/Bochs bios */
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    /* memory size */
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    val = 640; /* base memory in K */
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    rtc_set_memory(s, 0x15, val);
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    rtc_set_memory(s, 0x16, val >> 8);
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    val = (ram_size / 1024) - 1024;
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    if (val > 65535)
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        val = 65535;
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    rtc_set_memory(s, 0x17, val);
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    rtc_set_memory(s, 0x18, val >> 8);
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    rtc_set_memory(s, 0x30, val);
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    rtc_set_memory(s, 0x31, val >> 8);
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    if (ram_size > (16 * 1024 * 1024))
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        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
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    else
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        val = 0;
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    if (val > 65535)
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        val = 65535;
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    rtc_set_memory(s, 0x34, val);
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    rtc_set_memory(s, 0x35, val >> 8);
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    switch(boot_device) {
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    case 'a':
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    case 'b':
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        rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
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        if (!fd_bootchk)
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            rtc_set_memory(s, 0x38, 0x01); /* disable signature check */
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        break;
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    default:
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    case 'c':
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        rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
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        break;
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    case 'd':
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        rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
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        break;
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    case 'n':
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        rtc_set_memory(s, 0x3d, 0x04); /* Network boot */
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        break;
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    }
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    /* floppy type */
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    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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    rtc_set_memory(s, 0x10, val);
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    val = 0;
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    nb = 0;
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    if (fd0 < 3)
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        nb++;
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    if (fd1 < 3)
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        nb++;
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    switch (nb) {
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    case 0:
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        break;
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    case 1:
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        val |= 0x01; /* 1 drive, ready for boot */
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        break;
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    case 2:
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        val |= 0x41; /* 2 drives, ready for boot */
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        break;
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    }
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    val |= 0x02; /* FPU is there */
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    val |= 0x04; /* PS/2 mouse installed */
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    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
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    /* hard drives */
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    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
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    if (hd_table[0])
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        cmos_init_hd(0x19, 0x1b, hd_table[0]);
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    if (hd_table[1])
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        cmos_init_hd(0x1a, 0x24, hd_table[1]);
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    val = 0;
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    for (i = 0; i < 4; i++) {
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        if (hd_table[i]) {
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            int cylinders, heads, sectors, translation;
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            /* NOTE: bdrv_get_geometry_hint() returns the physical
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                geometry.  It is always such that: 1 <= sects <= 63, 1
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                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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                geometry can be different if a translation is done. */
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            translation = bdrv_get_translation_hint(hd_table[i]);
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            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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                bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
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                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
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                    /* No translation. */
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                    translation = 0;
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                } else {
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                    /* LBA translation. */
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                    translation = 1;
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                }
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            } else {
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                translation--;
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            }
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            val |= translation << (i * 2);
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        }
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    }
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    rtc_set_memory(s, 0x39, val);
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}
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void ioport_set_a20(int enable)
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{
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    /* XXX: send to all CPUs ? */
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    cpu_x86_set_a20(first_cpu, enable);
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}
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int ioport_get_a20(void)
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{
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    return ((first_cpu->a20_mask >> 20) & 1);
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}
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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    ioport_set_a20((val >> 1) & 1);
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    /* XXX: bit 0 is fast reset */
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}
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static uint32_t ioport92_read(void *opaque, uint32_t addr)
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{
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    return ioport_get_a20() << 1;
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}
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/***********************************************************/
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/* Bochs BIOS debug ports */
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void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    static const char shutdown_str[8] = "Shutdown";
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    static int shutdown_index = 0;
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    switch(addr) {
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        /* Bochs BIOS messages */
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    case 0x400:
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    case 0x401:
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        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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        exit(1);
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    case 0x402:
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    case 0x403:
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#ifdef DEBUG_BIOS
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        fprintf(stderr, "%c", val);
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#endif
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        break;
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    case 0x8900:
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        /* same as Bochs power off */
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        if (val == shutdown_str[shutdown_index]) {
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            shutdown_index++;
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            if (shutdown_index == 8) {
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                shutdown_index = 0;
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                qemu_system_shutdown_request();
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            }
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        } else {
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            shutdown_index = 0;
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        }
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        break;
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        /* LGPL'ed VGA BIOS messages */
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    case 0x501:
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    case 0x502:
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        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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        exit(1);
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    case 0x500:
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    case 0x503:
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#ifdef DEBUG_BIOS
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        fprintf(stderr, "%c", val);
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#endif
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        break;
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    }
335 80cabfad bellard
}
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void bochs_bios_init(void)
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{
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    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
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    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
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    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
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}
350 80cabfad bellard
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/* Generate an initial boot sector which sets state and jump to
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   a specified vector */
353 3f6c925f balrog
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
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{
355 642a4f96 ths
    uint8_t bootsect[512], *p;
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    int i;
357 642a4f96 ths
358 642a4f96 ths
    if (bs_table[0] == NULL) {
359 642a4f96 ths
        fprintf(stderr, "A disk image must be given for 'hda' when booting "
360 642a4f96 ths
                "a Linux kernel\n");
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        exit(1);
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    }
363 642a4f96 ths
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    memset(bootsect, 0, sizeof(bootsect));
365 642a4f96 ths
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    /* Copy the MSDOS partition table if possible */
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    bdrv_read(bs_table[0], 0, bootsect, 1);
368 642a4f96 ths
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    /* Make sure we have a partition signature */
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    bootsect[510] = 0x55;
371 642a4f96 ths
    bootsect[511] = 0xaa;
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    /* Actual code */
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    p = bootsect;
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    *p++ = 0xfa;                /* CLI */
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    *p++ = 0xfc;                /* CLD */
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    for (i = 0; i < 6; i++) {
379 642a4f96 ths
        if (i == 1)                /* Skip CS */
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            continue;
381 642a4f96 ths
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        *p++ = 0xb8;                /* MOV AX,imm16 */
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        *p++ = segs[i];
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        *p++ = segs[i] >> 8;
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        *p++ = 0x8e;                /* MOV <seg>,AX */
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        *p++ = 0xc0 + (i << 3);
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    }
388 642a4f96 ths
389 642a4f96 ths
    for (i = 0; i < 8; i++) {
390 642a4f96 ths
        *p++ = 0x66;                /* 32-bit operand size */
391 642a4f96 ths
        *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
392 642a4f96 ths
        *p++ = gpr[i];
393 642a4f96 ths
        *p++ = gpr[i] >> 8;
394 642a4f96 ths
        *p++ = gpr[i] >> 16;
395 642a4f96 ths
        *p++ = gpr[i] >> 24;
396 642a4f96 ths
    }
397 642a4f96 ths
398 642a4f96 ths
    *p++ = 0xea;                /* JMP FAR */
399 642a4f96 ths
    *p++ = ip;                        /* IP */
400 642a4f96 ths
    *p++ = ip >> 8;
401 642a4f96 ths
    *p++ = segs[1];                /* CS */
402 642a4f96 ths
    *p++ = segs[1] >> 8;
403 642a4f96 ths
404 642a4f96 ths
    bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
405 642a4f96 ths
}
406 80cabfad bellard
407 5fafdf24 ths
int load_kernel(const char *filename, uint8_t *addr,
408 80cabfad bellard
                uint8_t *real_addr)
409 80cabfad bellard
{
410 80cabfad bellard
    int fd, size;
411 80cabfad bellard
    int setup_sects;
412 80cabfad bellard
413 096b7ea4 bellard
    fd = open(filename, O_RDONLY | O_BINARY);
414 80cabfad bellard
    if (fd < 0)
415 80cabfad bellard
        return -1;
416 80cabfad bellard
417 80cabfad bellard
    /* load 16 bit code */
418 80cabfad bellard
    if (read(fd, real_addr, 512) != 512)
419 80cabfad bellard
        goto fail;
420 80cabfad bellard
    setup_sects = real_addr[0x1F1];
421 80cabfad bellard
    if (!setup_sects)
422 80cabfad bellard
        setup_sects = 4;
423 5fafdf24 ths
    if (read(fd, real_addr + 512, setup_sects * 512) !=
424 80cabfad bellard
        setup_sects * 512)
425 80cabfad bellard
        goto fail;
426 642a4f96 ths
427 80cabfad bellard
    /* load 32 bit code */
428 80cabfad bellard
    size = read(fd, addr, 16 * 1024 * 1024);
429 80cabfad bellard
    if (size < 0)
430 80cabfad bellard
        goto fail;
431 80cabfad bellard
    close(fd);
432 80cabfad bellard
    return size;
433 80cabfad bellard
 fail:
434 80cabfad bellard
    close(fd);
435 80cabfad bellard
    return -1;
436 80cabfad bellard
}
437 80cabfad bellard
438 642a4f96 ths
static long get_file_size(FILE *f)
439 642a4f96 ths
{
440 642a4f96 ths
    long where, size;
441 642a4f96 ths
442 642a4f96 ths
    /* XXX: on Unix systems, using fstat() probably makes more sense */
443 642a4f96 ths
444 642a4f96 ths
    where = ftell(f);
445 642a4f96 ths
    fseek(f, 0, SEEK_END);
446 642a4f96 ths
    size = ftell(f);
447 642a4f96 ths
    fseek(f, where, SEEK_SET);
448 642a4f96 ths
449 642a4f96 ths
    return size;
450 642a4f96 ths
}
451 642a4f96 ths
452 642a4f96 ths
static void load_linux(const char *kernel_filename,
453 642a4f96 ths
                       const char *initrd_filename,
454 642a4f96 ths
                       const char *kernel_cmdline)
455 642a4f96 ths
{
456 642a4f96 ths
    uint16_t protocol;
457 642a4f96 ths
    uint32_t gpr[8];
458 642a4f96 ths
    uint16_t seg[6];
459 642a4f96 ths
    uint16_t real_seg;
460 642a4f96 ths
    int setup_size, kernel_size, initrd_size, cmdline_size;
461 642a4f96 ths
    uint32_t initrd_max;
462 642a4f96 ths
    uint8_t header[1024];
463 642a4f96 ths
    uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr;
464 642a4f96 ths
    FILE *f, *fi;
465 642a4f96 ths
466 642a4f96 ths
    /* Align to 16 bytes as a paranoia measure */
467 642a4f96 ths
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
468 642a4f96 ths
469 642a4f96 ths
    /* load the kernel header */
470 642a4f96 ths
    f = fopen(kernel_filename, "rb");
471 642a4f96 ths
    if (!f || !(kernel_size = get_file_size(f)) ||
472 642a4f96 ths
        fread(header, 1, 1024, f) != 1024) {
473 642a4f96 ths
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
474 642a4f96 ths
                kernel_filename);
475 642a4f96 ths
        exit(1);
476 642a4f96 ths
    }
477 642a4f96 ths
478 642a4f96 ths
    /* kernel protocol version */
479 642a4f96 ths
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
480 642a4f96 ths
    if (ldl_p(header+0x202) == 0x53726448)
481 642a4f96 ths
        protocol = lduw_p(header+0x206);
482 642a4f96 ths
    else
483 642a4f96 ths
        protocol = 0;
484 642a4f96 ths
485 642a4f96 ths
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
486 642a4f96 ths
        /* Low kernel */
487 642a4f96 ths
        real_addr    = phys_ram_base + 0x90000;
488 642a4f96 ths
        cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
489 642a4f96 ths
        prot_addr    = phys_ram_base + 0x10000;
490 642a4f96 ths
    } else if (protocol < 0x202) {
491 642a4f96 ths
        /* High but ancient kernel */
492 642a4f96 ths
        real_addr    = phys_ram_base + 0x90000;
493 642a4f96 ths
        cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
494 642a4f96 ths
        prot_addr    = phys_ram_base + 0x100000;
495 642a4f96 ths
    } else {
496 642a4f96 ths
        /* High and recent kernel */
497 642a4f96 ths
        real_addr    = phys_ram_base + 0x10000;
498 642a4f96 ths
        cmdline_addr = phys_ram_base + 0x20000;
499 642a4f96 ths
        prot_addr    = phys_ram_base + 0x100000;
500 642a4f96 ths
    }
501 642a4f96 ths
502 642a4f96 ths
    fprintf(stderr,
503 642a4f96 ths
            "qemu: real_addr     = %#zx\n"
504 642a4f96 ths
            "qemu: cmdline_addr  = %#zx\n"
505 642a4f96 ths
            "qemu: prot_addr     = %#zx\n",
506 642a4f96 ths
            real_addr-phys_ram_base,
507 642a4f96 ths
            cmdline_addr-phys_ram_base,
508 642a4f96 ths
            prot_addr-phys_ram_base);
509 642a4f96 ths
510 642a4f96 ths
    /* highest address for loading the initrd */
511 642a4f96 ths
    if (protocol >= 0x203)
512 642a4f96 ths
        initrd_max = ldl_p(header+0x22c);
513 642a4f96 ths
    else
514 642a4f96 ths
        initrd_max = 0x37ffffff;
515 642a4f96 ths
516 642a4f96 ths
    if (initrd_max >= ram_size-ACPI_DATA_SIZE)
517 642a4f96 ths
        initrd_max = ram_size-ACPI_DATA_SIZE-1;
518 642a4f96 ths
519 642a4f96 ths
    /* kernel command line */
520 642a4f96 ths
    pstrcpy(cmdline_addr, 4096, kernel_cmdline);
521 642a4f96 ths
522 642a4f96 ths
    if (protocol >= 0x202) {
523 642a4f96 ths
        stl_p(header+0x228, cmdline_addr-phys_ram_base);
524 642a4f96 ths
    } else {
525 642a4f96 ths
        stw_p(header+0x20, 0xA33F);
526 642a4f96 ths
        stw_p(header+0x22, cmdline_addr-real_addr);
527 642a4f96 ths
    }
528 642a4f96 ths
529 642a4f96 ths
    /* loader type */
530 642a4f96 ths
    /* High nybble = B reserved for Qemu; low nybble is revision number.
531 642a4f96 ths
       If this code is substantially changed, you may want to consider
532 642a4f96 ths
       incrementing the revision. */
533 642a4f96 ths
    if (protocol >= 0x200)
534 642a4f96 ths
        header[0x210] = 0xB0;
535 642a4f96 ths
536 642a4f96 ths
    /* heap */
537 642a4f96 ths
    if (protocol >= 0x201) {
538 642a4f96 ths
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
539 642a4f96 ths
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
540 642a4f96 ths
    }
541 642a4f96 ths
542 642a4f96 ths
    /* load initrd */
543 642a4f96 ths
    if (initrd_filename) {
544 642a4f96 ths
        if (protocol < 0x200) {
545 642a4f96 ths
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
546 642a4f96 ths
            exit(1);
547 642a4f96 ths
        }
548 642a4f96 ths
549 642a4f96 ths
        fi = fopen(initrd_filename, "rb");
550 642a4f96 ths
        if (!fi) {
551 642a4f96 ths
            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
552 642a4f96 ths
                    initrd_filename);
553 642a4f96 ths
            exit(1);
554 642a4f96 ths
        }
555 642a4f96 ths
556 642a4f96 ths
        initrd_size = get_file_size(fi);
557 642a4f96 ths
        initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
558 642a4f96 ths
559 642a4f96 ths
        fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
560 642a4f96 ths
                initrd_size, initrd_addr-phys_ram_base);
561 642a4f96 ths
562 642a4f96 ths
        if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) {
563 642a4f96 ths
            fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
564 642a4f96 ths
                    initrd_filename);
565 642a4f96 ths
            exit(1);
566 642a4f96 ths
        }
567 642a4f96 ths
        fclose(fi);
568 642a4f96 ths
569 642a4f96 ths
        stl_p(header+0x218, initrd_addr-phys_ram_base);
570 642a4f96 ths
        stl_p(header+0x21c, initrd_size);
571 642a4f96 ths
    }
572 642a4f96 ths
573 642a4f96 ths
    /* store the finalized header and load the rest of the kernel */
574 642a4f96 ths
    memcpy(real_addr, header, 1024);
575 642a4f96 ths
576 642a4f96 ths
    setup_size = header[0x1f1];
577 642a4f96 ths
    if (setup_size == 0)
578 642a4f96 ths
        setup_size = 4;
579 642a4f96 ths
580 642a4f96 ths
    setup_size = (setup_size+1)*512;
581 642a4f96 ths
    kernel_size -= setup_size;        /* Size of protected-mode code */
582 642a4f96 ths
583 642a4f96 ths
    if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 ||
584 642a4f96 ths
        fread(prot_addr, 1, kernel_size, f) != kernel_size) {
585 642a4f96 ths
        fprintf(stderr, "qemu: read error on kernel '%s'\n",
586 642a4f96 ths
                kernel_filename);
587 642a4f96 ths
        exit(1);
588 642a4f96 ths
    }
589 642a4f96 ths
    fclose(f);
590 642a4f96 ths
591 642a4f96 ths
    /* generate bootsector to set up the initial register state */
592 642a4f96 ths
    real_seg = (real_addr-phys_ram_base) >> 4;
593 642a4f96 ths
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
594 642a4f96 ths
    seg[1] = real_seg+0x20;        /* CS */
595 642a4f96 ths
    memset(gpr, 0, sizeof gpr);
596 642a4f96 ths
    gpr[4] = cmdline_addr-real_addr-16;        /* SP (-16 is paranoia) */
597 642a4f96 ths
598 642a4f96 ths
    generate_bootsect(gpr, seg, 0);
599 642a4f96 ths
}
600 642a4f96 ths
601 59b8ad81 bellard
static void main_cpu_reset(void *opaque)
602 59b8ad81 bellard
{
603 59b8ad81 bellard
    CPUState *env = opaque;
604 59b8ad81 bellard
    cpu_reset(env);
605 59b8ad81 bellard
}
606 59b8ad81 bellard
607 b41a2cd1 bellard
static const int ide_iobase[2] = { 0x1f0, 0x170 };
608 b41a2cd1 bellard
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
609 b41a2cd1 bellard
static const int ide_irq[2] = { 14, 15 };
610 b41a2cd1 bellard
611 b41a2cd1 bellard
#define NE2000_NB_MAX 6
612 b41a2cd1 bellard
613 8d11df9e bellard
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
614 b41a2cd1 bellard
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
615 b41a2cd1 bellard
616 8d11df9e bellard
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
617 8d11df9e bellard
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
618 8d11df9e bellard
619 6508fe59 bellard
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
620 6508fe59 bellard
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
621 6508fe59 bellard
622 6a36d84e bellard
#ifdef HAS_AUDIO
623 d537cf6c pbrook
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
624 6a36d84e bellard
{
625 6a36d84e bellard
    struct soundhw *c;
626 6a36d84e bellard
    int audio_enabled = 0;
627 6a36d84e bellard
628 6a36d84e bellard
    for (c = soundhw; !audio_enabled && c->name; ++c) {
629 6a36d84e bellard
        audio_enabled = c->enabled;
630 6a36d84e bellard
    }
631 6a36d84e bellard
632 6a36d84e bellard
    if (audio_enabled) {
633 6a36d84e bellard
        AudioState *s;
634 6a36d84e bellard
635 6a36d84e bellard
        s = AUD_init ();
636 6a36d84e bellard
        if (s) {
637 6a36d84e bellard
            for (c = soundhw; c->name; ++c) {
638 6a36d84e bellard
                if (c->enabled) {
639 6a36d84e bellard
                    if (c->isa) {
640 d537cf6c pbrook
                        c->init.init_isa (s, pic);
641 6a36d84e bellard
                    }
642 6a36d84e bellard
                    else {
643 6a36d84e bellard
                        if (pci_bus) {
644 6a36d84e bellard
                            c->init.init_pci (pci_bus, s);
645 6a36d84e bellard
                        }
646 6a36d84e bellard
                    }
647 6a36d84e bellard
                }
648 6a36d84e bellard
            }
649 6a36d84e bellard
        }
650 6a36d84e bellard
    }
651 6a36d84e bellard
}
652 6a36d84e bellard
#endif
653 6a36d84e bellard
654 d537cf6c pbrook
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
655 a41b2ff2 pbrook
{
656 a41b2ff2 pbrook
    static int nb_ne2k = 0;
657 a41b2ff2 pbrook
658 a41b2ff2 pbrook
    if (nb_ne2k == NE2000_NB_MAX)
659 a41b2ff2 pbrook
        return;
660 d537cf6c pbrook
    isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
661 a41b2ff2 pbrook
    nb_ne2k++;
662 a41b2ff2 pbrook
}
663 a41b2ff2 pbrook
664 80cabfad bellard
/* PC hardware initialisation */
665 b5ff2d6e bellard
static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
666 b5ff2d6e bellard
                     DisplayState *ds, const char **fd_filename, int snapshot,
667 b5ff2d6e bellard
                     const char *kernel_filename, const char *kernel_cmdline,
668 3dbbdc25 bellard
                     const char *initrd_filename,
669 3dbbdc25 bellard
                     int pci_enabled)
670 80cabfad bellard
{
671 80cabfad bellard
    char buf[1024];
672 642a4f96 ths
    int ret, linux_boot, i;
673 970ac5a3 bellard
    ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
674 970ac5a3 bellard
    int bios_size, isa_bios_size, vga_bios_size;
675 46e50e9d bellard
    PCIBus *pci_bus;
676 5c3ff3a7 pbrook
    int piix3_devfn = -1;
677 59b8ad81 bellard
    CPUState *env;
678 a41b2ff2 pbrook
    NICInfo *nd;
679 d537cf6c pbrook
    qemu_irq *cpu_irq;
680 d537cf6c pbrook
    qemu_irq *i8259;
681 d592d303 bellard
682 80cabfad bellard
    linux_boot = (kernel_filename != NULL);
683 80cabfad bellard
684 59b8ad81 bellard
    /* init CPUs */
685 59b8ad81 bellard
    for(i = 0; i < smp_cpus; i++) {
686 59b8ad81 bellard
        env = cpu_init();
687 59b8ad81 bellard
        if (i != 0)
688 ad49ff9d bellard
            env->hflags |= HF_HALTED_MASK;
689 59b8ad81 bellard
        if (smp_cpus > 1) {
690 59b8ad81 bellard
            /* XXX: enable it in all cases */
691 59b8ad81 bellard
            env->cpuid_features |= CPUID_APIC;
692 59b8ad81 bellard
        }
693 a5954d5c bellard
        register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
694 59b8ad81 bellard
        qemu_register_reset(main_cpu_reset, env);
695 59b8ad81 bellard
        if (pci_enabled) {
696 59b8ad81 bellard
            apic_init(env);
697 59b8ad81 bellard
        }
698 93342807 ths
        vmport_init(env);
699 59b8ad81 bellard
    }
700 59b8ad81 bellard
701 80cabfad bellard
    /* allocate RAM */
702 970ac5a3 bellard
    ram_addr = qemu_ram_alloc(ram_size);
703 970ac5a3 bellard
    cpu_register_physical_memory(0, ram_size, ram_addr);
704 80cabfad bellard
705 970ac5a3 bellard
    /* allocate VGA RAM */
706 970ac5a3 bellard
    vga_ram_addr = qemu_ram_alloc(vga_ram_size);
707 7587cf44 bellard
708 970ac5a3 bellard
    /* BIOS load */
709 80cabfad bellard
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
710 7587cf44 bellard
    bios_size = get_image_size(buf);
711 5fafdf24 ths
    if (bios_size <= 0 ||
712 970ac5a3 bellard
        (bios_size % 65536) != 0) {
713 7587cf44 bellard
        goto bios_error;
714 7587cf44 bellard
    }
715 970ac5a3 bellard
    bios_offset = qemu_ram_alloc(bios_size);
716 7587cf44 bellard
    ret = load_image(buf, phys_ram_base + bios_offset);
717 7587cf44 bellard
    if (ret != bios_size) {
718 7587cf44 bellard
    bios_error:
719 970ac5a3 bellard
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
720 80cabfad bellard
        exit(1);
721 80cabfad bellard
    }
722 7587cf44 bellard
723 80cabfad bellard
    /* VGA BIOS load */
724 de9258a8 bellard
    if (cirrus_vga_enabled) {
725 de9258a8 bellard
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
726 de9258a8 bellard
    } else {
727 de9258a8 bellard
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
728 de9258a8 bellard
    }
729 970ac5a3 bellard
    vga_bios_size = get_image_size(buf);
730 5fafdf24 ths
    if (vga_bios_size <= 0 || vga_bios_size > 65536)
731 970ac5a3 bellard
        goto vga_bios_error;
732 970ac5a3 bellard
    vga_bios_offset = qemu_ram_alloc(65536);
733 970ac5a3 bellard
734 7587cf44 bellard
    ret = load_image(buf, phys_ram_base + vga_bios_offset);
735 970ac5a3 bellard
    if (ret != vga_bios_size) {
736 970ac5a3 bellard
    vga_bios_error:
737 970ac5a3 bellard
        fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
738 970ac5a3 bellard
        exit(1);
739 970ac5a3 bellard
    }
740 970ac5a3 bellard
741 80cabfad bellard
    /* setup basic memory access */
742 5fafdf24 ths
    cpu_register_physical_memory(0xc0000, 0x10000,
743 7587cf44 bellard
                                 vga_bios_offset | IO_MEM_ROM);
744 7587cf44 bellard
745 7587cf44 bellard
    /* map the last 128KB of the BIOS in ISA space */
746 7587cf44 bellard
    isa_bios_size = bios_size;
747 7587cf44 bellard
    if (isa_bios_size > (128 * 1024))
748 7587cf44 bellard
        isa_bios_size = 128 * 1024;
749 5fafdf24 ths
    cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
750 7587cf44 bellard
                                 IO_MEM_UNASSIGNED);
751 5fafdf24 ths
    cpu_register_physical_memory(0x100000 - isa_bios_size,
752 5fafdf24 ths
                                 isa_bios_size,
753 7587cf44 bellard
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
754 9ae02555 ths
755 970ac5a3 bellard
    {
756 970ac5a3 bellard
        ram_addr_t option_rom_offset;
757 970ac5a3 bellard
        int size, offset;
758 970ac5a3 bellard
759 970ac5a3 bellard
        offset = 0;
760 970ac5a3 bellard
        for (i = 0; i < nb_option_roms; i++) {
761 970ac5a3 bellard
            size = get_image_size(option_rom[i]);
762 970ac5a3 bellard
            if (size < 0) {
763 5fafdf24 ths
                fprintf(stderr, "Could not load option rom '%s'\n",
764 970ac5a3 bellard
                        option_rom[i]);
765 970ac5a3 bellard
                exit(1);
766 970ac5a3 bellard
            }
767 970ac5a3 bellard
            if (size > (0x10000 - offset))
768 970ac5a3 bellard
                goto option_rom_error;
769 970ac5a3 bellard
            option_rom_offset = qemu_ram_alloc(size);
770 970ac5a3 bellard
            ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
771 970ac5a3 bellard
            if (ret != size) {
772 970ac5a3 bellard
            option_rom_error:
773 970ac5a3 bellard
                fprintf(stderr, "Too many option ROMS\n");
774 970ac5a3 bellard
                exit(1);
775 970ac5a3 bellard
            }
776 970ac5a3 bellard
            size = (size + 4095) & ~4095;
777 970ac5a3 bellard
            cpu_register_physical_memory(0xd0000 + offset,
778 970ac5a3 bellard
                                         size, option_rom_offset | IO_MEM_ROM);
779 970ac5a3 bellard
            offset += size;
780 970ac5a3 bellard
        }
781 9ae02555 ths
    }
782 9ae02555 ths
783 7587cf44 bellard
    /* map all the bios at the top of memory */
784 5fafdf24 ths
    cpu_register_physical_memory((uint32_t)(-bios_size),
785 7587cf44 bellard
                                 bios_size, bios_offset | IO_MEM_ROM);
786 5fafdf24 ths
   
787 80cabfad bellard
    bochs_bios_init();
788 80cabfad bellard
789 642a4f96 ths
    if (linux_boot)
790 642a4f96 ths
        load_linux(kernel_filename, initrd_filename, kernel_cmdline);
791 80cabfad bellard
792 d537cf6c pbrook
    cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
793 d537cf6c pbrook
    i8259 = i8259_init(cpu_irq[0]);
794 d537cf6c pbrook
    ferr_irq = i8259[13];
795 d537cf6c pbrook
796 69b91039 bellard
    if (pci_enabled) {
797 d537cf6c pbrook
        pci_bus = i440fx_init(&i440fx_state, i8259);
798 8f1c91d8 ths
        piix3_devfn = piix3_init(pci_bus, -1);
799 46e50e9d bellard
    } else {
800 46e50e9d bellard
        pci_bus = NULL;
801 69b91039 bellard
    }
802 69b91039 bellard
803 80cabfad bellard
    /* init basic PC hardware */
804 b41a2cd1 bellard
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
805 80cabfad bellard
806 f929aad6 bellard
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
807 f929aad6 bellard
808 1f04275e bellard
    if (cirrus_vga_enabled) {
809 1f04275e bellard
        if (pci_enabled) {
810 5fafdf24 ths
            pci_cirrus_vga_init(pci_bus,
811 5fafdf24 ths
                                ds, phys_ram_base + vga_ram_addr,
812 970ac5a3 bellard
                                vga_ram_addr, vga_ram_size);
813 1f04275e bellard
        } else {
814 5fafdf24 ths
            isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
815 970ac5a3 bellard
                                vga_ram_addr, vga_ram_size);
816 1f04275e bellard
        }
817 d34cab9f ths
    } else if (vmsvga_enabled) {
818 d34cab9f ths
        if (pci_enabled)
819 d34cab9f ths
            pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size,
820 d34cab9f ths
                            ram_size, vga_ram_size);
821 d34cab9f ths
        else
822 d34cab9f ths
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
823 1f04275e bellard
    } else {
824 89b6b508 bellard
        if (pci_enabled) {
825 5fafdf24 ths
            pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
826 970ac5a3 bellard
                         vga_ram_addr, vga_ram_size, 0, 0);
827 89b6b508 bellard
        } else {
828 5fafdf24 ths
            isa_vga_init(ds, phys_ram_base + vga_ram_addr,
829 970ac5a3 bellard
                         vga_ram_addr, vga_ram_size);
830 89b6b508 bellard
        }
831 1f04275e bellard
    }
832 80cabfad bellard
833 d537cf6c pbrook
    rtc_state = rtc_init(0x70, i8259[8]);
834 80cabfad bellard
835 e1a23744 bellard
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
836 e1a23744 bellard
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
837 e1a23744 bellard
838 d592d303 bellard
    if (pci_enabled) {
839 d592d303 bellard
        ioapic = ioapic_init();
840 d592d303 bellard
    }
841 d537cf6c pbrook
    pit = pit_init(0x40, i8259[0]);
842 fd06c375 bellard
    pcspk_init(pit);
843 d592d303 bellard
    if (pci_enabled) {
844 d592d303 bellard
        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
845 d592d303 bellard
    }
846 b41a2cd1 bellard
847 8d11df9e bellard
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
848 8d11df9e bellard
        if (serial_hds[i]) {
849 d537cf6c pbrook
            serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
850 8d11df9e bellard
        }
851 8d11df9e bellard
    }
852 b41a2cd1 bellard
853 6508fe59 bellard
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
854 6508fe59 bellard
        if (parallel_hds[i]) {
855 d537cf6c pbrook
            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
856 d537cf6c pbrook
                          parallel_hds[i]);
857 6508fe59 bellard
        }
858 6508fe59 bellard
    }
859 6508fe59 bellard
860 a41b2ff2 pbrook
    for(i = 0; i < nb_nics; i++) {
861 a41b2ff2 pbrook
        nd = &nd_table[i];
862 a41b2ff2 pbrook
        if (!nd->model) {
863 a41b2ff2 pbrook
            if (pci_enabled) {
864 a41b2ff2 pbrook
                nd->model = "ne2k_pci";
865 a41b2ff2 pbrook
            } else {
866 a41b2ff2 pbrook
                nd->model = "ne2k_isa";
867 a41b2ff2 pbrook
            }
868 69b91039 bellard
        }
869 a41b2ff2 pbrook
        if (strcmp(nd->model, "ne2k_isa") == 0) {
870 d537cf6c pbrook
            pc_init_ne2k_isa(nd, i8259);
871 a41b2ff2 pbrook
        } else if (pci_enabled) {
872 c4a7060c blueswir1
            if (strcmp(nd->model, "?") == 0)
873 c4a7060c blueswir1
                fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
874 abcebc7e ths
            pci_nic_init(pci_bus, nd, -1);
875 c4a7060c blueswir1
        } else if (strcmp(nd->model, "?") == 0) {
876 c4a7060c blueswir1
            fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
877 c4a7060c blueswir1
            exit(1);
878 a41b2ff2 pbrook
        } else {
879 a41b2ff2 pbrook
            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
880 a41b2ff2 pbrook
            exit(1);
881 69b91039 bellard
        }
882 a41b2ff2 pbrook
    }
883 b41a2cd1 bellard
884 a41b2ff2 pbrook
    if (pci_enabled) {
885 d537cf6c pbrook
        pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259);
886 a41b2ff2 pbrook
    } else {
887 69b91039 bellard
        for(i = 0; i < 2; i++) {
888 d537cf6c pbrook
            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
889 69b91039 bellard
                         bs_table[2 * i], bs_table[2 * i + 1]);
890 69b91039 bellard
        }
891 b41a2cd1 bellard
    }
892 69b91039 bellard
893 d537cf6c pbrook
    i8042_init(i8259[1], i8259[12], 0x60);
894 7c29d0c0 bellard
    DMA_init(0);
895 6a36d84e bellard
#ifdef HAS_AUDIO
896 d537cf6c pbrook
    audio_init(pci_enabled ? pci_bus : NULL, i8259);
897 fb065187 bellard
#endif
898 80cabfad bellard
899 d537cf6c pbrook
    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table);
900 b41a2cd1 bellard
901 ba6c2377 bellard
    cmos_init(ram_size, boot_device, bs_table);
902 69b91039 bellard
903 bb36d470 bellard
    if (pci_enabled && usb_enabled) {
904 afcc3cdf ths
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
905 bb36d470 bellard
    }
906 bb36d470 bellard
907 6515b203 bellard
    if (pci_enabled && acpi_enabled) {
908 3fffc223 ths
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
909 0ff596d0 pbrook
        i2c_bus *smbus;
910 0ff596d0 pbrook
911 0ff596d0 pbrook
        /* TODO: Populate SPD eeprom data.  */
912 7b717336 ths
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100);
913 3fffc223 ths
        for (i = 0; i < 8; i++) {
914 0ff596d0 pbrook
            smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
915 3fffc223 ths
        }
916 6515b203 bellard
    }
917 5fafdf24 ths
   
918 a5954d5c bellard
    if (i440fx_state) {
919 a5954d5c bellard
        i440fx_init_memory_mappings(i440fx_state);
920 a5954d5c bellard
    }
921 96d30e48 ths
#if 0
922 96d30e48 ths
    /* ??? Need to figure out some way for the user to
923 96d30e48 ths
       specify SCSI devices.  */
924 7d8406be pbrook
    if (pci_enabled) {
925 7d8406be pbrook
        void *scsi;
926 96d30e48 ths
        BlockDriverState *bdrv;
927 96d30e48 ths

928 96d30e48 ths
        scsi = lsi_scsi_init(pci_bus, -1);
929 96d30e48 ths
        bdrv = bdrv_new("scsidisk");
930 96d30e48 ths
        bdrv_open(bdrv, "scsi_disk.img", 0);
931 96d30e48 ths
        lsi_scsi_attach(scsi, bdrv, -1);
932 96d30e48 ths
        bdrv = bdrv_new("scsicd");
933 96d30e48 ths
        bdrv_open(bdrv, "scsi_cd.iso", 0);
934 96d30e48 ths
        bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
935 96d30e48 ths
        lsi_scsi_attach(scsi, bdrv, -1);
936 7d8406be pbrook
    }
937 96d30e48 ths
#endif
938 80cabfad bellard
}
939 b5ff2d6e bellard
940 3dbbdc25 bellard
static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
941 5fafdf24 ths
                        DisplayState *ds, const char **fd_filename,
942 5fafdf24 ths
                        int snapshot,
943 5fafdf24 ths
                        const char *kernel_filename,
944 3dbbdc25 bellard
                        const char *kernel_cmdline,
945 94fc95cd j_mayer
                        const char *initrd_filename,
946 94fc95cd j_mayer
                        const char *cpu_model)
947 3dbbdc25 bellard
{
948 3dbbdc25 bellard
    pc_init1(ram_size, vga_ram_size, boot_device,
949 3dbbdc25 bellard
             ds, fd_filename, snapshot,
950 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
951 3dbbdc25 bellard
             initrd_filename, 1);
952 3dbbdc25 bellard
}
953 3dbbdc25 bellard
954 3dbbdc25 bellard
static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
955 5fafdf24 ths
                        DisplayState *ds, const char **fd_filename,
956 5fafdf24 ths
                        int snapshot,
957 5fafdf24 ths
                        const char *kernel_filename,
958 3dbbdc25 bellard
                        const char *kernel_cmdline,
959 94fc95cd j_mayer
                        const char *initrd_filename,
960 94fc95cd j_mayer
                        const char *cpu_model)
961 3dbbdc25 bellard
{
962 3dbbdc25 bellard
    pc_init1(ram_size, vga_ram_size, boot_device,
963 3dbbdc25 bellard
             ds, fd_filename, snapshot,
964 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
965 3dbbdc25 bellard
             initrd_filename, 0);
966 3dbbdc25 bellard
}
967 3dbbdc25 bellard
968 b5ff2d6e bellard
QEMUMachine pc_machine = {
969 b5ff2d6e bellard
    "pc",
970 b5ff2d6e bellard
    "Standard PC",
971 3dbbdc25 bellard
    pc_init_pci,
972 3dbbdc25 bellard
};
973 3dbbdc25 bellard
974 3dbbdc25 bellard
QEMUMachine isapc_machine = {
975 3dbbdc25 bellard
    "isapc",
976 3dbbdc25 bellard
    "ISA-only PC",
977 3dbbdc25 bellard
    pc_init_isa,
978 b5ff2d6e bellard
};