root / softmmu_header.h @ 5fafdf24
History | View | Annotate | Download (11 kB)
1 | b92e5a22 | bellard | /*
|
---|---|---|---|
2 | b92e5a22 | bellard | * Software MMU support
|
3 | 5fafdf24 | ths | *
|
4 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
|
5 | b92e5a22 | bellard | *
|
6 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
|
7 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
|
8 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
|
9 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
|
10 | b92e5a22 | bellard | *
|
11 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
|
12 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
14 | b92e5a22 | bellard | * Lesser General Public License for more details.
|
15 | b92e5a22 | bellard | *
|
16 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
|
17 | b92e5a22 | bellard | * License along with this library; if not, write to the Free Software
|
18 | b92e5a22 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
19 | b92e5a22 | bellard | */
|
20 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
21 | b92e5a22 | bellard | #define SUFFIX q
|
22 | 61382a50 | bellard | #define USUFFIX q
|
23 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
|
24 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
25 | b92e5a22 | bellard | #define SUFFIX l
|
26 | 61382a50 | bellard | #define USUFFIX l
|
27 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
|
28 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
29 | b92e5a22 | bellard | #define SUFFIX w
|
30 | 61382a50 | bellard | #define USUFFIX uw
|
31 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
|
32 | b92e5a22 | bellard | #define DATA_STYPE int16_t
|
33 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
34 | b92e5a22 | bellard | #define SUFFIX b
|
35 | 61382a50 | bellard | #define USUFFIX ub
|
36 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
|
37 | b92e5a22 | bellard | #define DATA_STYPE int8_t
|
38 | b92e5a22 | bellard | #else
|
39 | b92e5a22 | bellard | #error unsupported data size
|
40 | b92e5a22 | bellard | #endif
|
41 | b92e5a22 | bellard | |
42 | 61382a50 | bellard | #if ACCESS_TYPE == 0 |
43 | 61382a50 | bellard | |
44 | 61382a50 | bellard | #define CPU_MEM_INDEX 0 |
45 | 61382a50 | bellard | #define MMUSUFFIX _mmu
|
46 | 61382a50 | bellard | |
47 | 61382a50 | bellard | #elif ACCESS_TYPE == 1 |
48 | 61382a50 | bellard | |
49 | 61382a50 | bellard | #define CPU_MEM_INDEX 1 |
50 | 61382a50 | bellard | #define MMUSUFFIX _mmu
|
51 | 61382a50 | bellard | |
52 | 61382a50 | bellard | #elif ACCESS_TYPE == 2 |
53 | 61382a50 | bellard | |
54 | 2d603d22 | bellard | #ifdef TARGET_I386
|
55 | 61382a50 | bellard | #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
56 | 2d603d22 | bellard | #elif defined (TARGET_PPC)
|
57 | 2d603d22 | bellard | #define CPU_MEM_INDEX (msr_pr)
|
58 | 6af0bf9c | bellard | #elif defined (TARGET_MIPS)
|
59 | 6af0bf9c | bellard | #define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
|
60 | e95c8d51 | bellard | #elif defined (TARGET_SPARC)
|
61 | e95c8d51 | bellard | #define CPU_MEM_INDEX ((env->psrs) == 0) |
62 | b5ff1b31 | bellard | #elif defined (TARGET_ARM)
|
63 | b5ff1b31 | bellard | #define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
|
64 | fdf9b3e8 | bellard | #elif defined (TARGET_SH4)
|
65 | fdf9b3e8 | bellard | #define CPU_MEM_INDEX ((env->sr & SR_MD) == 0) |
66 | eddf68a6 | j_mayer | #elif defined (TARGET_ALPHA)
|
67 | eddf68a6 | j_mayer | #define CPU_MEM_INDEX ((env->ps >> 3) & 3) |
68 | 0633879f | pbrook | #elif defined (TARGET_M68K)
|
69 | 0633879f | pbrook | #define CPU_MEM_INDEX ((env->sr & SR_S) == 0) |
70 | b5ff1b31 | bellard | #else
|
71 | b5ff1b31 | bellard | #error unsupported CPU
|
72 | 2d603d22 | bellard | #endif
|
73 | 61382a50 | bellard | #define MMUSUFFIX _mmu
|
74 | 61382a50 | bellard | |
75 | 61382a50 | bellard | #elif ACCESS_TYPE == 3 |
76 | 61382a50 | bellard | |
77 | 2d603d22 | bellard | #ifdef TARGET_I386
|
78 | 61382a50 | bellard | #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) |
79 | 2d603d22 | bellard | #elif defined (TARGET_PPC)
|
80 | 2d603d22 | bellard | #define CPU_MEM_INDEX (msr_pr)
|
81 | 6af0bf9c | bellard | #elif defined (TARGET_MIPS)
|
82 | 6af0bf9c | bellard | #define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
|
83 | e95c8d51 | bellard | #elif defined (TARGET_SPARC)
|
84 | e95c8d51 | bellard | #define CPU_MEM_INDEX ((env->psrs) == 0) |
85 | b5ff1b31 | bellard | #elif defined (TARGET_ARM)
|
86 | b5ff1b31 | bellard | #define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
|
87 | fdf9b3e8 | bellard | #elif defined (TARGET_SH4)
|
88 | fdf9b3e8 | bellard | #define CPU_MEM_INDEX ((env->sr & SR_MD) == 0) |
89 | eddf68a6 | j_mayer | #elif defined (TARGET_ALPHA)
|
90 | eddf68a6 | j_mayer | #define CPU_MEM_INDEX ((env->ps >> 3) & 3) |
91 | 0633879f | pbrook | #elif defined (TARGET_M68K)
|
92 | 0633879f | pbrook | #define CPU_MEM_INDEX ((env->sr & SR_S) == 0) |
93 | b5ff1b31 | bellard | #else
|
94 | b5ff1b31 | bellard | #error unsupported CPU
|
95 | 2d603d22 | bellard | #endif
|
96 | 61382a50 | bellard | #define MMUSUFFIX _cmmu
|
97 | 61382a50 | bellard | |
98 | b92e5a22 | bellard | #else
|
99 | 61382a50 | bellard | #error invalid ACCESS_TYPE
|
100 | b92e5a22 | bellard | #endif
|
101 | b92e5a22 | bellard | |
102 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
103 | b92e5a22 | bellard | #define RES_TYPE uint64_t
|
104 | b92e5a22 | bellard | #else
|
105 | b92e5a22 | bellard | #define RES_TYPE int |
106 | b92e5a22 | bellard | #endif
|
107 | b92e5a22 | bellard | |
108 | 84b7b8e7 | bellard | #if ACCESS_TYPE == 3 |
109 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
|
110 | 84b7b8e7 | bellard | #else
|
111 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
|
112 | 84b7b8e7 | bellard | #endif
|
113 | b92e5a22 | bellard | |
114 | c27004ec | bellard | DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
|
115 | 61382a50 | bellard | int is_user);
|
116 | c27004ec | bellard | void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user); |
117 | b92e5a22 | bellard | |
118 | c27004ec | bellard | #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ |
119 | c27004ec | bellard | (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
|
120 | e16c53fa | bellard | |
121 | 84b7b8e7 | bellard | #define CPU_TLB_ENTRY_BITS 4 |
122 | 84b7b8e7 | bellard | |
123 | c27004ec | bellard | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
124 | e16c53fa | bellard | { |
125 | e16c53fa | bellard | int res;
|
126 | e16c53fa | bellard | |
127 | e16c53fa | bellard | asm volatile ("movl %1, %%edx\n" |
128 | e16c53fa | bellard | "movl %1, %%eax\n"
|
129 | e16c53fa | bellard | "shrl %3, %%edx\n"
|
130 | e16c53fa | bellard | "andl %4, %%eax\n"
|
131 | e16c53fa | bellard | "andl %2, %%edx\n"
|
132 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
|
133 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
|
134 | e16c53fa | bellard | "movl %1, %%eax\n"
|
135 | e16c53fa | bellard | "je 1f\n"
|
136 | e16c53fa | bellard | "pushl %6\n"
|
137 | e16c53fa | bellard | "call %7\n"
|
138 | e16c53fa | bellard | "popl %%edx\n"
|
139 | e16c53fa | bellard | "movl %%eax, %0\n"
|
140 | e16c53fa | bellard | "jmp 2f\n"
|
141 | e16c53fa | bellard | "1:\n"
|
142 | 84b7b8e7 | bellard | "addl 12(%%edx), %%eax\n"
|
143 | e16c53fa | bellard | #if DATA_SIZE == 1 |
144 | e16c53fa | bellard | "movzbl (%%eax), %0\n"
|
145 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
146 | e16c53fa | bellard | "movzwl (%%eax), %0\n"
|
147 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
148 | e16c53fa | bellard | "movl (%%eax), %0\n"
|
149 | e16c53fa | bellard | #else
|
150 | e16c53fa | bellard | #error unsupported size
|
151 | e16c53fa | bellard | #endif
|
152 | e16c53fa | bellard | "2:\n"
|
153 | e16c53fa | bellard | : "=r" (res)
|
154 | 5fafdf24 | ths | : "r" (ptr),
|
155 | 5fafdf24 | ths | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
156 | 5fafdf24 | ths | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
|
157 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
158 | 84b7b8e7 | bellard | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)), |
159 | e16c53fa | bellard | "i" (CPU_MEM_INDEX),
|
160 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
|
161 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
162 | e16c53fa | bellard | return res;
|
163 | e16c53fa | bellard | } |
164 | e16c53fa | bellard | |
165 | e16c53fa | bellard | #if DATA_SIZE <= 2 |
166 | c27004ec | bellard | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
167 | e16c53fa | bellard | { |
168 | e16c53fa | bellard | int res;
|
169 | e16c53fa | bellard | |
170 | e16c53fa | bellard | asm volatile ("movl %1, %%edx\n" |
171 | e16c53fa | bellard | "movl %1, %%eax\n"
|
172 | e16c53fa | bellard | "shrl %3, %%edx\n"
|
173 | e16c53fa | bellard | "andl %4, %%eax\n"
|
174 | e16c53fa | bellard | "andl %2, %%edx\n"
|
175 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
|
176 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
|
177 | e16c53fa | bellard | "movl %1, %%eax\n"
|
178 | e16c53fa | bellard | "je 1f\n"
|
179 | e16c53fa | bellard | "pushl %6\n"
|
180 | e16c53fa | bellard | "call %7\n"
|
181 | e16c53fa | bellard | "popl %%edx\n"
|
182 | e16c53fa | bellard | #if DATA_SIZE == 1 |
183 | e16c53fa | bellard | "movsbl %%al, %0\n"
|
184 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
185 | e16c53fa | bellard | "movswl %%ax, %0\n"
|
186 | e16c53fa | bellard | #else
|
187 | e16c53fa | bellard | #error unsupported size
|
188 | e16c53fa | bellard | #endif
|
189 | e16c53fa | bellard | "jmp 2f\n"
|
190 | e16c53fa | bellard | "1:\n"
|
191 | 84b7b8e7 | bellard | "addl 12(%%edx), %%eax\n"
|
192 | e16c53fa | bellard | #if DATA_SIZE == 1 |
193 | e16c53fa | bellard | "movsbl (%%eax), %0\n"
|
194 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
195 | e16c53fa | bellard | "movswl (%%eax), %0\n"
|
196 | e16c53fa | bellard | #else
|
197 | e16c53fa | bellard | #error unsupported size
|
198 | e16c53fa | bellard | #endif
|
199 | e16c53fa | bellard | "2:\n"
|
200 | e16c53fa | bellard | : "=r" (res)
|
201 | 5fafdf24 | ths | : "r" (ptr),
|
202 | 5fafdf24 | ths | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
203 | 5fafdf24 | ths | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
|
204 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
205 | 84b7b8e7 | bellard | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)), |
206 | e16c53fa | bellard | "i" (CPU_MEM_INDEX),
|
207 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
|
208 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
209 | e16c53fa | bellard | return res;
|
210 | e16c53fa | bellard | } |
211 | e16c53fa | bellard | #endif
|
212 | e16c53fa | bellard | |
213 | c27004ec | bellard | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
214 | e16c53fa | bellard | { |
215 | e16c53fa | bellard | asm volatile ("movl %0, %%edx\n" |
216 | e16c53fa | bellard | "movl %0, %%eax\n"
|
217 | e16c53fa | bellard | "shrl %3, %%edx\n"
|
218 | e16c53fa | bellard | "andl %4, %%eax\n"
|
219 | e16c53fa | bellard | "andl %2, %%edx\n"
|
220 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
|
221 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
|
222 | e16c53fa | bellard | "movl %0, %%eax\n"
|
223 | e16c53fa | bellard | "je 1f\n"
|
224 | e16c53fa | bellard | #if DATA_SIZE == 1 |
225 | e16c53fa | bellard | "movzbl %b1, %%edx\n"
|
226 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
227 | e16c53fa | bellard | "movzwl %w1, %%edx\n"
|
228 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
229 | e16c53fa | bellard | "movl %1, %%edx\n"
|
230 | e16c53fa | bellard | #else
|
231 | e16c53fa | bellard | #error unsupported size
|
232 | e16c53fa | bellard | #endif
|
233 | e16c53fa | bellard | "pushl %6\n"
|
234 | e16c53fa | bellard | "call %7\n"
|
235 | e16c53fa | bellard | "popl %%eax\n"
|
236 | e16c53fa | bellard | "jmp 2f\n"
|
237 | e16c53fa | bellard | "1:\n"
|
238 | 84b7b8e7 | bellard | "addl 8(%%edx), %%eax\n"
|
239 | e16c53fa | bellard | #if DATA_SIZE == 1 |
240 | e16c53fa | bellard | "movb %b1, (%%eax)\n"
|
241 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
242 | e16c53fa | bellard | "movw %w1, (%%eax)\n"
|
243 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
244 | e16c53fa | bellard | "movl %1, (%%eax)\n"
|
245 | e16c53fa | bellard | #else
|
246 | e16c53fa | bellard | #error unsupported size
|
247 | e16c53fa | bellard | #endif
|
248 | e16c53fa | bellard | "2:\n"
|
249 | 5fafdf24 | ths | : |
250 | 5fafdf24 | ths | : "r" (ptr),
|
251 | e16c53fa | bellard | /* NOTE: 'q' would be needed as constraint, but we could not use it
|
252 | e16c53fa | bellard | with T1 ! */
|
253 | 5fafdf24 | ths | "r" (v),
|
254 | 5fafdf24 | ths | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
255 | 5fafdf24 | ths | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
|
256 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
257 | 84b7b8e7 | bellard | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)), |
258 | e16c53fa | bellard | "i" (CPU_MEM_INDEX),
|
259 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
|
260 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
261 | e16c53fa | bellard | } |
262 | e16c53fa | bellard | |
263 | e16c53fa | bellard | #else
|
264 | e16c53fa | bellard | |
265 | e16c53fa | bellard | /* generic load/store macros */
|
266 | e16c53fa | bellard | |
267 | c27004ec | bellard | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
268 | b92e5a22 | bellard | { |
269 | b92e5a22 | bellard | int index;
|
270 | b92e5a22 | bellard | RES_TYPE res; |
271 | c27004ec | bellard | target_ulong addr; |
272 | c27004ec | bellard | unsigned long physaddr; |
273 | 61382a50 | bellard | int is_user;
|
274 | 61382a50 | bellard | |
275 | c27004ec | bellard | addr = ptr; |
276 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
277 | 61382a50 | bellard | is_user = CPU_MEM_INDEX; |
278 | 5fafdf24 | ths | if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
|
279 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
280 | 61382a50 | bellard | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user); |
281 | b92e5a22 | bellard | } else {
|
282 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
283 | 61382a50 | bellard | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); |
284 | b92e5a22 | bellard | } |
285 | b92e5a22 | bellard | return res;
|
286 | b92e5a22 | bellard | } |
287 | b92e5a22 | bellard | |
288 | b92e5a22 | bellard | #if DATA_SIZE <= 2 |
289 | c27004ec | bellard | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
290 | b92e5a22 | bellard | { |
291 | b92e5a22 | bellard | int res, index;
|
292 | c27004ec | bellard | target_ulong addr; |
293 | c27004ec | bellard | unsigned long physaddr; |
294 | 61382a50 | bellard | int is_user;
|
295 | 61382a50 | bellard | |
296 | c27004ec | bellard | addr = ptr; |
297 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
298 | 61382a50 | bellard | is_user = CPU_MEM_INDEX; |
299 | 5fafdf24 | ths | if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
|
300 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
301 | 61382a50 | bellard | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user); |
302 | b92e5a22 | bellard | } else {
|
303 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
304 | b92e5a22 | bellard | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); |
305 | b92e5a22 | bellard | } |
306 | b92e5a22 | bellard | return res;
|
307 | b92e5a22 | bellard | } |
308 | b92e5a22 | bellard | #endif
|
309 | b92e5a22 | bellard | |
310 | 84b7b8e7 | bellard | #if ACCESS_TYPE != 3 |
311 | 84b7b8e7 | bellard | |
312 | e16c53fa | bellard | /* generic store macro */
|
313 | e16c53fa | bellard | |
314 | c27004ec | bellard | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
315 | b92e5a22 | bellard | { |
316 | b92e5a22 | bellard | int index;
|
317 | c27004ec | bellard | target_ulong addr; |
318 | c27004ec | bellard | unsigned long physaddr; |
319 | 61382a50 | bellard | int is_user;
|
320 | 61382a50 | bellard | |
321 | c27004ec | bellard | addr = ptr; |
322 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
323 | 61382a50 | bellard | is_user = CPU_MEM_INDEX; |
324 | 5fafdf24 | ths | if (__builtin_expect(env->tlb_table[is_user][index].addr_write !=
|
325 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
326 | 61382a50 | bellard | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user); |
327 | b92e5a22 | bellard | } else {
|
328 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
329 | b92e5a22 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); |
330 | b92e5a22 | bellard | } |
331 | b92e5a22 | bellard | } |
332 | b92e5a22 | bellard | |
333 | 84b7b8e7 | bellard | #endif /* ACCESS_TYPE != 3 */ |
334 | 84b7b8e7 | bellard | |
335 | 84b7b8e7 | bellard | #endif /* !asm */ |
336 | 84b7b8e7 | bellard | |
337 | 84b7b8e7 | bellard | #if ACCESS_TYPE != 3 |
338 | e16c53fa | bellard | |
339 | 2d603d22 | bellard | #if DATA_SIZE == 8 |
340 | 3f87bf69 | bellard | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) |
341 | 2d603d22 | bellard | { |
342 | 2d603d22 | bellard | union {
|
343 | 3f87bf69 | bellard | float64 d; |
344 | 2d603d22 | bellard | uint64_t i; |
345 | 2d603d22 | bellard | } u; |
346 | 2d603d22 | bellard | u.i = glue(ldq, MEMSUFFIX)(ptr); |
347 | 2d603d22 | bellard | return u.d;
|
348 | 2d603d22 | bellard | } |
349 | 2d603d22 | bellard | |
350 | 3f87bf69 | bellard | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v) |
351 | 2d603d22 | bellard | { |
352 | 2d603d22 | bellard | union {
|
353 | 3f87bf69 | bellard | float64 d; |
354 | 2d603d22 | bellard | uint64_t i; |
355 | 2d603d22 | bellard | } u; |
356 | 2d603d22 | bellard | u.d = v; |
357 | 2d603d22 | bellard | glue(stq, MEMSUFFIX)(ptr, u.i); |
358 | 2d603d22 | bellard | } |
359 | 2d603d22 | bellard | #endif /* DATA_SIZE == 8 */ |
360 | 2d603d22 | bellard | |
361 | 2d603d22 | bellard | #if DATA_SIZE == 4 |
362 | 3f87bf69 | bellard | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr) |
363 | 2d603d22 | bellard | { |
364 | 2d603d22 | bellard | union {
|
365 | 3f87bf69 | bellard | float32 f; |
366 | 2d603d22 | bellard | uint32_t i; |
367 | 2d603d22 | bellard | } u; |
368 | 2d603d22 | bellard | u.i = glue(ldl, MEMSUFFIX)(ptr); |
369 | 2d603d22 | bellard | return u.f;
|
370 | 2d603d22 | bellard | } |
371 | 2d603d22 | bellard | |
372 | 3f87bf69 | bellard | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) |
373 | 2d603d22 | bellard | { |
374 | 2d603d22 | bellard | union {
|
375 | 3f87bf69 | bellard | float32 f; |
376 | 2d603d22 | bellard | uint32_t i; |
377 | 2d603d22 | bellard | } u; |
378 | 2d603d22 | bellard | u.f = v; |
379 | 2d603d22 | bellard | glue(stl, MEMSUFFIX)(ptr, u.i); |
380 | 2d603d22 | bellard | } |
381 | 2d603d22 | bellard | #endif /* DATA_SIZE == 4 */ |
382 | 2d603d22 | bellard | |
383 | 84b7b8e7 | bellard | #endif /* ACCESS_TYPE != 3 */ |
384 | 84b7b8e7 | bellard | |
385 | b92e5a22 | bellard | #undef RES_TYPE
|
386 | b92e5a22 | bellard | #undef DATA_TYPE
|
387 | b92e5a22 | bellard | #undef DATA_STYPE
|
388 | b92e5a22 | bellard | #undef SUFFIX
|
389 | 61382a50 | bellard | #undef USUFFIX
|
390 | b92e5a22 | bellard | #undef DATA_SIZE
|
391 | 61382a50 | bellard | #undef CPU_MEM_INDEX
|
392 | 61382a50 | bellard | #undef MMUSUFFIX
|
393 | 84b7b8e7 | bellard | #undef ADDR_READ |