Archipelago » qemu

/*

 * defines common to all virtual CPUs

 *  Copyright (c) 2003 Fabrice Bellard

 *

 * This library is free software; you can redistribute it and/or

#define WORDS_ALIGNED

#endif

 * WORDS_ALIGNED : if defined, the host cpu can only make word aligned

 * memory accesses.

 * WORDS_BIGENDIAN : if defined, the host cpu is big endian and

 * otherwise little endian.

 * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))

 * TARGET_WORDS_BIGENDIAN : same for target cpu

 */

 * type is:

 * (empty): integer access

 *   f    : float access

 * sign is:

 * (empty): for floats or 32 bit size

 *   u    : unsigned

 *   w: 16 bits

 *   l: 32 bits

 *   q: 64 bits

 * endian is:

 * (empty): target cpu endianness or 8 bit access

 *   r    : reversed target cpu endianness (not implemented yet)

#define stfq_raw(p, v) stfq_p(saddr((p)), v)

/* if user mode, no other memory access functions */

#define ldub(p) ldub_raw(p)

#define PAGE_VALID     0x0008

/* original state of the write flag (used when tracking self-modifying

   code */

void page_dump(FILE *f);

int page_get_flags(target_ulong address);

CPUState *cpu_copy(CPUState *env);

                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),

                    int flags);

void cpu_dump_statistics (CPUState *env, FILE *f,

   if no page found. */

target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);

#define CPU_LOG_TB_IN_ASM  (1 << 1)

#define CPU_LOG_TB_OP      (1 << 2)

#define CPU_LOG_TB_OP_OPT  (1 << 3)

typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);

typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);

                                  unsigned long size,

                                  unsigned long phys_offset);

uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr);

void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,

                            int len, int is_write);

                                            uint8_t *buf, int len)

{

    cpu_physical_memory_rw(addr, buf, len, 0);

}

                                             const uint8_t *buf, int len)

{

    cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);

void stl_phys(target_phys_addr_t addr, uint32_t val);

void stq_phys(target_phys_addr_t addr, uint64_t val);

                                   const uint8_t *buf, int len);

                        uint8_t *buf, int len, int is_write);

#define VGA_DIRTY_FLAG  0x01

    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] == 0xff;

}

                                                int dirty_flags)

{

    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;

#if defined(__powerpc__)

{

    uint32_t tbl;

    asm volatile("mftb %0" : "=r" (tbl));

    return tbl;

}

{

	uint32_t tbl;

	asm volatile("mftbu %0" : "=r" (tbl));