Revision 5fafdf24 cpu-exec.c

b/cpu-exec.c
1 1
/*
2 2
 *  i386 emulator main execution loop
3
 * 
3
 *
4 4
 *  Copyright (c) 2003-2005 Fabrice Bellard
5 5
 *
6 6
 * This library is free software; you can redistribute it and/or
......
55 55
/* exit the current TB from a signal handler. The host registers are
56 56
   restored in a state compatible with the CPU emulator
57 57
 */
58
void cpu_resume_from_signal(CPUState *env1, void *puc) 
58
void cpu_resume_from_signal(CPUState *env1, void *puc)
59 59
{
60 60
#if !defined(CONFIG_SOFTMMU)
61 61
    struct ucontext *uc = puc;
......
84 84
    unsigned int h;
85 85
    target_ulong phys_pc, phys_page1, phys_page2, virt_page2;
86 86
    uint8_t *tc_ptr;
87
    
87
   
88 88
    spin_lock(&tb_lock);
89 89

  
90 90
    tb_invalidated_flag = 0;
91
    
91
   
92 92
    regs_to_env(); /* XXX: do it just before cpu_gen_code() */
93
    
93
   
94 94
    /* find translated block using physical mappings */
95 95
    phys_pc = get_phys_addr_code(env, pc);
96 96
    phys_page1 = phys_pc & TARGET_PAGE_MASK;
......
101 101
        tb = *ptb1;
102 102
        if (!tb)
103 103
            goto not_found;
104
        if (tb->pc == pc && 
104
        if (tb->pc == pc &&
105 105
            tb->page_addr[0] == phys_page1 &&
106
            tb->cs_base == cs_base && 
106
            tb->cs_base == cs_base &&
107 107
            tb->flags == flags) {
108 108
            /* check next page if needed */
109 109
            if (tb->page_addr[1] != -1) {
110
                virt_page2 = (pc & TARGET_PAGE_MASK) + 
110
                virt_page2 = (pc & TARGET_PAGE_MASK) +
111 111
                    TARGET_PAGE_SIZE;
112 112
                phys_page2 = get_phys_addr_code(env, virt_page2);
113 113
                if (tb->page_addr[1] == phys_page2)
......
135 135
    tb->flags = flags;
136 136
    cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size);
137 137
    code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
138
    
138
   
139 139
    /* check next page if needed */
140 140
    virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;
141 141
    phys_page2 = -1;
......
143 143
        phys_page2 = get_phys_addr_code(env, virt_page2);
144 144
    }
145 145
    tb_link_phys(tb, phys_pc, phys_page2);
146
    
146
   
147 147
 found:
148 148
    /* we add the TB in the virtual pc hash table */
149 149
    env->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
......
252 252
    if (cpu_halted(env1) == EXCP_HALTED)
253 253
        return EXCP_HALTED;
254 254

  
255
    cpu_single_env = env1; 
255
    cpu_single_env = env1;
256 256

  
257 257
    /* first we save global registers */
258 258
#define SAVE_HOST_REGS 1
......
304 304
                       which will be handled outside the cpu execution
305 305
                       loop */
306 306
#if defined(TARGET_I386)
307
                    do_interrupt_user(env->exception_index, 
308
                                      env->exception_is_int, 
309
                                      env->error_code, 
307
                    do_interrupt_user(env->exception_index,
308
                                      env->exception_is_int,
309
                                      env->error_code,
310 310
                                      env->exception_next_eip);
311 311
#endif
312 312
                    ret = env->exception_index;
......
316 316
                    /* simulate a real cpu exception. On i386, it can
317 317
                       trigger new exceptions, but we do not handle
318 318
                       double or triple faults yet. */
319
                    do_interrupt(env->exception_index, 
320
                                 env->exception_is_int, 
321
                                 env->error_code, 
319
                    do_interrupt(env->exception_index,
320
                                 env->exception_is_int,
321
                                 env->error_code,
322 322
                                 env->exception_next_eip, 0);
323 323
                    /* successfully delivered */
324 324
                    env->old_exception = -1;
......
339 339
#endif
340 340
                }
341 341
                env->exception_index = -1;
342
            } 
342
            }
343 343
#ifdef USE_KQEMU
344 344
            if (kqemu_is_ok(env) && env->interrupt_request == 0) {
345 345
                int ret;
......
369 369
            T0 = 0; /* force lookup of first TB */
370 370
            for(;;) {
371 371
#if defined(__sparc__) && !defined(HOST_SOLARIS)
372
                /* g1 can be modified by some libc? functions */ 
372
                /* g1 can be modified by some libc? functions */
373 373
                tmp_T0 = T0;
374
#endif	    
374
#endif	   
375 375
                interrupt_request = env->interrupt_request;
376 376
                if (__builtin_expect(interrupt_request, 0)) {
377 377
                    if (interrupt_request & CPU_INTERRUPT_DEBUG) {
......
399 399
                        T0 = 0;
400 400
#endif
401 401
                    } else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
402
                        (env->eflags & IF_MASK) && 
402
                        (env->eflags & IF_MASK) &&
403 403
                        !(env->hflags & HF_INHIBIT_IRQ_MASK)) {
404 404
                        int intno;
405 405
                        env->interrupt_request &= ~CPU_INTERRUPT_HARD;
......
551 551
#elif defined(TARGET_ALPHA)
552 552
                    cpu_dump_state(env, logfile, fprintf, 0);
553 553
#else
554
#error unsupported target CPU 
554
#error unsupported target CPU
555 555
#endif
556 556
                }
557 557
#endif
......
565 565
#endif
566 566
#if defined(__sparc__) && !defined(HOST_SOLARIS)
567 567
                T0 = tmp_T0;
568
#endif	    
568
#endif	   
569 569
                /* see if we can patch the calling TB. When the TB
570 570
                   spans two pages, we cannot safely do a direct
571 571
                   jump. */
......
576 576
#endif
577 577
                        tb->page_addr[1] == -1
578 578
#if defined(TARGET_I386) && defined(USE_CODE_COPY)
579
                    && (tb->cflags & CF_CODE_COPY) == 
579
                    && (tb->cflags & CF_CODE_COPY) ==
580 580
                    (((TranslationBlock *)(T0 & ~3))->cflags & CF_CODE_COPY)
581 581
#endif
582 582
                    ) {
......
584 584
                    tb_add_jump((TranslationBlock *)(long)(T0 & ~3), T0 & 3, tb);
585 585
#if defined(USE_CODE_COPY)
586 586
                    /* propagates the FP use info */
587
                    ((TranslationBlock *)(T0 & ~3))->cflags |= 
587
                    ((TranslationBlock *)(T0 & ~3))->cflags |=
588 588
                        (tb->cflags & CF_FP_USED);
589 589
#endif
590 590
                    spin_unlock(&tb_lock);
......
598 598
                __asm__ __volatile__("call	%0\n\t"
599 599
                                     "mov	%%o7,%%i0"
600 600
                                     : /* no outputs */
601
                                     : "r" (gen_func) 
601
                                     : "r" (gen_func)
602 602
                                     : "i0", "i1", "i2", "i3", "i4", "i5",
603 603
                                       "o0", "o1", "o2", "o3", "o4", "o5",
604 604
                                       "l0", "l1", "l2", "l3", "l4", "l5",
......
755 755
#include "hostregs_helper.h"
756 756

  
757 757
    /* fail safe : never use cpu_single_env outside cpu_exec() */
758
    cpu_single_env = NULL; 
758
    cpu_single_env = NULL;
759 759
    return ret;
760 760
}
761 761

  
......
782 782
    env = s;
783 783
    if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
784 784
        selector &= 0xffff;
785
        cpu_x86_load_seg_cache(env, seg_reg, selector, 
785
        cpu_x86_load_seg_cache(env, seg_reg, selector,
786 786
                               (selector << 4), 0xffff, 0);
787 787
    } else {
788 788
        load_seg(seg_reg, selector);
......
796 796

  
797 797
    saved_env = env;
798 798
    env = s;
799
    
799
   
800 800
    helper_fsave((target_ulong)ptr, data32);
801 801

  
802 802
    env = saved_env;
......
808 808

  
809 809
    saved_env = env;
810 810
    env = s;
811
    
811
   
812 812
    helper_frstor((target_ulong)ptr, data32);
813 813

  
814 814
    env = saved_env;
......
825 825
   write caused the exception and otherwise 0'. 'old_set' is the
826 826
   signal set which should be restored */
827 827
static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
828
                                    int is_write, sigset_t *old_set, 
828
                                    int is_write, sigset_t *old_set,
829 829
                                    void *puc)
830 830
{
831 831
    TranslationBlock *tb;
......
834 834
    if (cpu_single_env)
835 835
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
836 836
#if defined(DEBUG_SIGNAL)
837
    qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
837
    qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
838 838
                pc, address, is_write, *(unsigned long *)old_set);
839 839
#endif
840 840
    /* XXX: locking issue */
......
843 843
    }
844 844

  
845 845
    /* see if it is an MMU fault */
846
    ret = cpu_x86_handle_mmu_fault(env, address, is_write, 
846
    ret = cpu_x86_handle_mmu_fault(env, address, is_write,
847 847
                                   ((env->hflags & HF_CPL_MASK) == 3), 0);
848 848
    if (ret < 0)
849 849
        return 0; /* not an MMU fault */
......
858 858
    }
859 859
    if (ret == 1) {
860 860
#if 0
861
        printf("PF exception: EIP=0x%08x CR2=0x%08x error=0x%x\n", 
861
        printf("PF exception: EIP=0x%08x CR2=0x%08x error=0x%x\n",
862 862
               env->eip, env->cr[2], env->error_code);
863 863
#endif
864 864
        /* we restore the process signal mask as the sigreturn should
......
885 885
    if (cpu_single_env)
886 886
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
887 887
#if defined(DEBUG_SIGNAL)
888
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
888
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
889 889
           pc, address, is_write, *(unsigned long *)old_set);
890 890
#endif
891 891
    /* XXX: locking issue */
......
921 921
    if (cpu_single_env)
922 922
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
923 923
#if defined(DEBUG_SIGNAL)
924
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
924
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
925 925
           pc, address, is_write, *(unsigned long *)old_set);
926 926
#endif
927 927
    /* XXX: locking issue */
......
953 953
{
954 954
    TranslationBlock *tb;
955 955
    int ret;
956
    
956
   
957 957
    if (cpu_single_env)
958 958
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
959 959
#if defined(DEBUG_SIGNAL)
960
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
960
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
961 961
           pc, address, is_write, *(unsigned long *)old_set);
962 962
#endif
963 963
    /* XXX: locking issue */
......
981 981
    }
982 982
    if (ret == 1) {
983 983
#if 0
984
        printf("PF exception: NIP=0x%08x error=0x%x %p\n", 
984
        printf("PF exception: NIP=0x%08x error=0x%x %p\n",
985 985
               env->nip, env->error_code, tb);
986 986
#endif
987 987
    /* we restore the process signal mask as the sigreturn should
......
1007 1007
    if (cpu_single_env)
1008 1008
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1009 1009
#if defined(DEBUG_SIGNAL)
1010
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
1010
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
1011 1011
           pc, address, is_write, *(unsigned long *)old_set);
1012 1012
#endif
1013 1013
    /* XXX: locking issue */
......
1042 1042
{
1043 1043
    TranslationBlock *tb;
1044 1044
    int ret;
1045
    
1045
   
1046 1046
    if (cpu_single_env)
1047 1047
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1048 1048
#if defined(DEBUG_SIGNAL)
1049
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
1049
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
1050 1050
           pc, address, is_write, *(unsigned long *)old_set);
1051 1051
#endif
1052 1052
    /* XXX: locking issue */
......
1070 1070
    }
1071 1071
    if (ret == 1) {
1072 1072
#if 0
1073
        printf("PF exception: PC=0x" TARGET_FMT_lx " error=0x%x %p\n", 
1073
        printf("PF exception: PC=0x" TARGET_FMT_lx " error=0x%x %p\n",
1074 1074
               env->PC, env->error_code, tb);
1075 1075
#endif
1076 1076
    /* we restore the process signal mask as the sigreturn should
......
1092 1092
{
1093 1093
    TranslationBlock *tb;
1094 1094
    int ret;
1095
    
1095
   
1096 1096
    if (cpu_single_env)
1097 1097
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1098 1098
#if defined(DEBUG_SIGNAL)
1099
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
1099
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
1100 1100
           pc, address, is_write, *(unsigned long *)old_set);
1101 1101
#endif
1102 1102
    /* XXX: locking issue */
......
1119 1119
        cpu_restore_state(tb, env, pc, puc);
1120 1120
    }
1121 1121
#if 0
1122
        printf("PF exception: NIP=0x%08x error=0x%x %p\n", 
1122
        printf("PF exception: NIP=0x%08x error=0x%x %p\n",
1123 1123
               env->nip, env->error_code, tb);
1124 1124
#endif
1125 1125
    /* we restore the process signal mask as the sigreturn should
......
1137 1137
{
1138 1138
    TranslationBlock *tb;
1139 1139
    int ret;
1140
    
1140
   
1141 1141
    if (cpu_single_env)
1142 1142
        env = cpu_single_env; /* XXX: find a correct solution for multithread */
1143 1143
#if defined(DEBUG_SIGNAL)
1144
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 
1144
    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
1145 1145
           pc, address, is_write, *(unsigned long *)old_set);
1146 1146
#endif
1147 1147
    /* XXX: locking issue */
......
1164 1164
        cpu_restore_state(tb, env, pc, puc);
1165 1165
    }
1166 1166
#if 0
1167
        printf("PF exception: NIP=0x%08x error=0x%x %p\n", 
1167
        printf("PF exception: NIP=0x%08x error=0x%x %p\n",
1168 1168
               env->nip, env->error_code, tb);
1169 1169
#endif
1170 1170
    /* we restore the process signal mask as the sigreturn should
......
1193 1193
#endif
1194 1194

  
1195 1195
#if defined(USE_CODE_COPY)
1196
static void cpu_send_trap(unsigned long pc, int trap, 
1196
static void cpu_send_trap(unsigned long pc, int trap,
1197 1197
                          struct ucontext *uc)
1198 1198
{
1199 1199
    TranslationBlock *tb;
......
1212 1212
}
1213 1213
#endif
1214 1214

  
1215
int cpu_signal_handler(int host_signum, void *pinfo, 
1215
int cpu_signal_handler(int host_signum, void *pinfo,
1216 1216
                       void *puc)
1217 1217
{
1218 1218
    siginfo_t *info = pinfo;
......
1235 1235
        return 1;
1236 1236
    } else
1237 1237
#endif
1238
        return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1239
                                 trapno == 0xe ? 
1238
        return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1239
                                 trapno == 0xe ?
1240 1240
                                 (ERROR_sig(uc) >> 1) & 1 : 0,
1241 1241
                                 &uc->uc_sigmask, puc);
1242 1242
}
......
1251 1251
    unsigned long pc;
1252 1252

  
1253 1253
    pc = uc->uc_mcontext.gregs[REG_RIP];
1254
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1255
                             uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe ? 
1254
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1255
                             uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe ?
1256 1256
                             (uc->uc_mcontext.gregs[REG_ERR] >> 1) & 1 : 0,
1257 1257
                             &uc->uc_sigmask, puc);
1258 1258
}
......
1308 1308
# define TRAP_sig(context)			EXCEPREG_sig(exception, context) /* number of powerpc exception taken */
1309 1309
#endif /* __APPLE__ */
1310 1310

  
1311
int cpu_signal_handler(int host_signum, void *pinfo, 
1311
int cpu_signal_handler(int host_signum, void *pinfo,
1312 1312
                       void *puc)
1313 1313
{
1314 1314
    siginfo_t *info = pinfo;
......
1326 1326
    if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000))
1327 1327
        is_write = 1;
1328 1328
#endif
1329
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1329
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1330 1330
                             is_write, &uc->uc_sigmask, puc);
1331 1331
}
1332 1332

  
1333 1333
#elif defined(__alpha__)
1334 1334

  
1335
int cpu_signal_handler(int host_signum, void *pinfo, 
1335
int cpu_signal_handler(int host_signum, void *pinfo,
1336 1336
                           void *puc)
1337 1337
{
1338 1338
    siginfo_t *info = pinfo;
......
1357 1357
	is_write = 1;
1358 1358
    }
1359 1359

  
1360
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1360
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1361 1361
                             is_write, &uc->uc_sigmask, puc);
1362 1362
}
1363 1363
#elif defined(__sparc__)
1364 1364

  
1365
int cpu_signal_handler(int host_signum, void *pinfo, 
1365
int cpu_signal_handler(int host_signum, void *pinfo,
1366 1366
                       void *puc)
1367 1367
{
1368 1368
    siginfo_t *info = pinfo;
......
1371 1371
    unsigned long pc;
1372 1372
    int is_write;
1373 1373
    uint32_t insn;
1374
    
1374
   
1375 1375
    /* XXX: is there a standard glibc define ? */
1376 1376
    pc = regs[1];
1377 1377
    /* XXX: need kernel patch to get write flag faster */
......
1390 1390
	break;
1391 1391
      }
1392 1392
    }
1393
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1393
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1394 1394
                             is_write, sigmask, NULL);
1395 1395
}
1396 1396

  
1397 1397
#elif defined(__arm__)
1398 1398

  
1399
int cpu_signal_handler(int host_signum, void *pinfo, 
1399
int cpu_signal_handler(int host_signum, void *pinfo,
1400 1400
                       void *puc)
1401 1401
{
1402 1402
    siginfo_t *info = pinfo;
1403 1403
    struct ucontext *uc = puc;
1404 1404
    unsigned long pc;
1405 1405
    int is_write;
1406
    
1406
   
1407 1407
    pc = uc->uc_mcontext.gregs[R15];
1408 1408
    /* XXX: compute is_write */
1409 1409
    is_write = 0;
1410
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1410
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1411 1411
                             is_write,
1412 1412
                             &uc->uc_sigmask, puc);
1413 1413
}
1414 1414

  
1415 1415
#elif defined(__mc68000)
1416 1416

  
1417
int cpu_signal_handler(int host_signum, void *pinfo, 
1417
int cpu_signal_handler(int host_signum, void *pinfo,
1418 1418
                       void *puc)
1419 1419
{
1420 1420
    siginfo_t *info = pinfo;
1421 1421
    struct ucontext *uc = puc;
1422 1422
    unsigned long pc;
1423 1423
    int is_write;
1424
    
1424
   
1425 1425
    pc = uc->uc_mcontext.gregs[16];
1426 1426
    /* XXX: compute is_write */
1427 1427
    is_write = 0;
1428
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1428
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1429 1429
                             is_write,
1430 1430
                             &uc->uc_sigmask, puc);
1431 1431
}
......
1466 1466

  
1467 1467
#elif defined(__s390__)
1468 1468

  
1469
int cpu_signal_handler(int host_signum, void *pinfo, 
1469
int cpu_signal_handler(int host_signum, void *pinfo,
1470 1470
                       void *puc)
1471 1471
{
1472 1472
    siginfo_t *info = pinfo;
1473 1473
    struct ucontext *uc = puc;
1474 1474
    unsigned long pc;
1475 1475
    int is_write;
1476
    
1476
   
1477 1477
    pc = uc->uc_mcontext.psw.addr;
1478 1478
    /* XXX: compute is_write */
1479 1479
    is_write = 0;
1480
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1480
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1481 1481
                             is_write, &uc->uc_sigmask, puc);
1482 1482
}
1483 1483

  
1484 1484
#elif defined(__mips__)
1485 1485

  
1486
int cpu_signal_handler(int host_signum, void *pinfo, 
1486
int cpu_signal_handler(int host_signum, void *pinfo,
1487 1487
                       void *puc)
1488 1488
{
1489 1489
    siginfo_t *info = pinfo;
1490 1490
    struct ucontext *uc = puc;
1491 1491
    greg_t pc = uc->uc_mcontext.pc;
1492 1492
    int is_write;
1493
    
1493
   
1494 1494
    /* XXX: compute is_write */
1495 1495
    is_write = 0;
1496
    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
1496
    return handle_cpu_signal(pc, (unsigned long)info->si_addr,
1497 1497
                             is_write, &uc->uc_sigmask, puc);
1498 1498
}
1499 1499

  

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